Struct stm32g0::stm32g081::lpuart::RegisterBlock[][src]

#[repr(C)]pub struct RegisterBlock {
    pub cr1: CR1,
    pub cr2: CR2,
    pub cr3: CR3,
    pub brr: BRR,
    pub rqr: RQR,
    pub isr: ISR,
    pub icr: ICR,
    pub rdr: RDR,
    pub tdr: TDR,
    pub presc: PRESC,
    pub hwcfgr2: HWCFGR2,
    pub hwcfgr1: HWCFGR1,
    pub verr: VERR,
    pub ipidr: IPIDR,
    pub sidr: SIDR,
    // some fields omitted
}

Register block

Fields

cr1: CR1

0x00 - Control register 1

cr2: CR2

0x04 - Control register 2

cr3: CR3

0x08 - Control register 3

brr: BRR

0x0c - Baud rate register

rqr: RQR

0x18 - Request register

isr: ISR

0x1c - Interrupt & status register

icr: ICR

0x20 - Interrupt flag clear register

rdr: RDR

0x24 - Receive data register

tdr: TDR

0x28 - Transmit data register

presc: PRESC

0x2c - Prescaler register

hwcfgr2: HWCFGR2

0x3ec - LPUART Hardware Configuration register 2

hwcfgr1: HWCFGR1

0x3f0 - LPUART Hardware Configuration register 1

verr: VERR

0x3f4 - EXTI IP Version register

ipidr: IPIDR

0x3f8 - EXTI Identification register

sidr: SIDR

0x3fc - EXTI Size ID register

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