Type Definition stm32g0::stm32g030::dma::isr::R

type R = R<u32, ISR>;

Reader of register ISR

Implementations

impl R

pub fn gif1(&self) -> GIF1_R

Bit 0 - Channel 1 global interrupt flag

pub fn tcif1(&self) -> TCIF1_R

Bit 1 - Channel 1 transfer complete flag

pub fn htif1(&self) -> HTIF1_R

Bit 2 - Channel 1 half transfer flag

pub fn teif1(&self) -> TEIF1_R

Bit 3 - Channel 1 transfer error flag

pub fn gif2(&self) -> GIF2_R

Bit 4 - Channel 2 global interrupt flag

pub fn tcif2(&self) -> TCIF2_R

Bit 5 - Channel 2 transfer complete flag

pub fn htif2(&self) -> HTIF2_R

Bit 6 - Channel 2 half transfer flag

pub fn teif2(&self) -> TEIF2_R

Bit 7 - Channel 2 transfer error flag

pub fn gif3(&self) -> GIF3_R

Bit 8 - Channel 3 global interrupt flag

pub fn tcif3(&self) -> TCIF3_R

Bit 9 - Channel 3 transfer complete flag

pub fn htif3(&self) -> HTIF3_R

Bit 10 - Channel 3 half transfer flag

pub fn teif3(&self) -> TEIF3_R

Bit 11 - Channel 3 transfer error flag

pub fn gif4(&self) -> GIF4_R

Bit 12 - Channel 4 global interrupt flag

pub fn tcif4(&self) -> TCIF4_R

Bit 13 - Channel 4 transfer complete flag

pub fn htif4(&self) -> HTIF4_R

Bit 14 - Channel 4 half transfer flag

pub fn teif4(&self) -> TEIF4_R

Bit 15 - Channel 4 transfer error flag

pub fn gif5(&self) -> GIF5_R

Bit 16 - Channel 5 global interrupt flag

pub fn tcif5(&self) -> TCIF5_R

Bit 17 - Channel 5 transfer complete flag

pub fn htif5(&self) -> HTIF5_R

Bit 18 - Channel 5 half transfer flag

pub fn teif5(&self) -> TEIF5_R

Bit 19 - Channel 5 transfer error flag