#[repr(u8)]pub enum MMS {
Reset = 0,
Enable = 1,
Update = 2,
}
Expand description
Master mode selection These bits are used to select the information to be sent in master mode to slave timers for synchronization (TRGO). The combination is as follows: When the Counter Enable signal is controlled by the trigger input, there is a delay on TRGO, except if the master/slave mode is selected (see the MSM bit description in the TIMx_SMCR register). Note: The clock of the slave timer or ADC must be enabled prior to receive events from the master timer, and must not be changed on-the-fly while triggers are received from the master timer.
Value on reset: 0
Variants§
Reset = 0
0: Use UG bit from TIMx_EGR register
Enable = 1
1: Use CNT bit from TIMx_CEN register
Update = 2
2: Use the update event
Trait Implementations§
impl Copy for MMS
impl Eq for MMS
impl IsEnum for MMS
impl StructuralPartialEq for MMS
Auto Trait Implementations§
impl Freeze for MMS
impl RefUnwindSafe for MMS
impl Send for MMS
impl Sync for MMS
impl Unpin for MMS
impl UnwindSafe for MMS
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more