Enum PR

#[repr(u8)]
pub enum PR {
    DivideBy4 = 0,
    DivideBy8 = 1,
    DivideBy16 = 2,
    DivideBy32 = 3,
    DivideBy64 = 4,
    DivideBy128 = 5,
    DivideBy256 = 6,
}

Prescaler divider These bits are write access protected see . They are written by software to select the prescaler divider feeding the counter clock. PVU bit of the must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the status register (IWDG_SR) is reset.

Value on reset: 0

Variants

DivideBy4 = 0

0: Divider /4

DivideBy8 = 1

1: Divider /8

DivideBy16 = 2

2: Divider /16

DivideBy32 = 3

3: Divider /32

DivideBy64 = 4

4: Divider /64

DivideBy128 = 5

5: Divider /128

DivideBy256 = 6

6: Divider /256

Trait Implementations

impl Clone for PR

fn clone(&self) -> PR

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for PR

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl FieldSpec for PR

type Ux = u8

Raw field type (u8, u16, u32, …).

impl Format for PR

fn format(&self, f: Formatter<'_>)

Writes the defmt representation of self to fmt.

impl From<PR> for u8

fn from(variant: PR) -> Self

Converts to this type from the input type.

impl PartialEq for PR

fn eq(&self, other: &PR) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for PR

impl Eq for PR

impl IsEnum for PR

impl StructuralPartialEq for PR