Struct Timer

pub struct Timer<TIM> { /* private fields */ }

Timer wrapper

Implementations

impl Timer<SYST>

pub fn counter_hz(self) -> SysCounterHz

Creates SysCounterHz which takes Hertz as Duration

pub fn counter<const FREQ: u32>(self) -> SysCounter<FREQ>

Creates SysCounter with custom precision (core frequency recommended is known)

pub fn counter_us(self) -> SysCounterUs

Creates SysCounter 1 microsecond precision

impl Timer<SYST>

pub fn delay(self) -> SysDelay

impl<TIM: Instance + WithPwm> Timer<TIM>

pub fn pwm_hz<P, PINS>(self, _pins: PINS, freq: Hertz) -> PwmHz<TIM, P, PINS>

where PINS: Pins<TIM, P>,

impl Timer<TIM1>

pub fn pwm_input<PINS>( self, best_guess: Hertz, pins: PINS, ) -> PwmInput<TIM1, PINS>

where PINS: Pins<TIM1>,

Configures this timer for PWM input. Accepts the best_guess frequency of the signal Note: this should be as close as possible to the frequency of the PWM waveform for best accuracy.

This device will emit an interrupt on CC1, which occurs at two times in this mode:

1. When a new cycle is started: the duty cycle will be 1.00
2. When the period is captured. the duty cycle will be an observable value. See the pwm input example for an suitable interrupt handler.

impl Timer<TIM5>

pub fn pwm_input<PINS>( self, best_guess: Hertz, pins: PINS, ) -> PwmInput<TIM5, PINS>

where PINS: Pins<TIM5>,

Configures this timer for PWM input. Accepts the best_guess frequency of the signal Note: this should be as close as possible to the frequency of the PWM waveform for best accuracy.

This device will emit an interrupt on CC1, which occurs at two times in this mode:

1. When a new cycle is started: the duty cycle will be 1.00
2. When the period is captured. the duty cycle will be an observable value. See the pwm input example for an suitable interrupt handler.

impl Timer<TIM9>

pub fn pwm_input<PINS>( self, best_guess: Hertz, pins: PINS, ) -> PwmInput<TIM9, PINS>

where PINS: Pins<TIM9>,

Configures this timer for PWM input. Accepts the best_guess frequency of the signal Note: this should be as close as possible to the frequency of the PWM waveform for best accuracy.

This device will emit an interrupt on CC1, which occurs at two times in this mode:

1. When a new cycle is started: the duty cycle will be 1.00
2. When the period is captured. the duty cycle will be an observable value. See the pwm input example for an suitable interrupt handler.

impl Timer<SYST>

pub fn syst(tim: SYST, clocks: &Clocks) -> Self

Initialize SysTick timer

pub fn syst_external(tim: SYST, clocks: &Clocks) -> Self

Initialize SysTick timer and set it frequency to HCLK / 8

pub fn configure(&mut self, clocks: &Clocks)

pub fn configure_external(&mut self, clocks: &Clocks)

pub fn release(self) -> SYST

pub fn listen(&mut self, event: SysEvent)

Starts listening for an event

pub fn unlisten(&mut self, event: SysEvent)

Stops listening for an event

impl<TIM: Instance> Timer<TIM>

pub fn new(tim: TIM, clocks: &Clocks) -> Self

Initialize timer

pub fn configure(&mut self, clocks: &Clocks)

pub fn counter_hz(self) -> CounterHz<TIM>

pub fn release(self) -> TIM

pub fn listen(&mut self, event: Event)

Starts listening for an event

Note, you will also have to enable the TIM2 interrupt in the NVIC to start receiving events.

pub fn clear_interrupt(&mut self, event: Event)

Clears interrupt associated with event.

If the interrupt is not cleared, it will immediately retrigger after the ISR has finished.

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

impl<TIM: Instance + MasterTimer> Timer<TIM>

pub fn set_master_mode(&mut self, mode: TIM::Mms)