pub enum OVR_MIS {
Disabled = 0,
Enabled = 1,
}
Expand description
Overrun masked interrupt status
Value on reset: 0
Variants§
Disabled = 0
0: No interrupt is generated on overrun
Enabled = 1
1: An interrupt is generated if the DMA was not able to transfer the last data before new data (32-bit) are received and the OVR_IE bit is set in DCMI_IER
Trait Implementations§
impl Copy for OVR_MIS
impl Eq for OVR_MIS
impl StructuralPartialEq for OVR_MIS
Auto Trait Implementations§
impl Freeze for OVR_MIS
impl RefUnwindSafe for OVR_MIS
impl Send for OVR_MIS
impl Sync for OVR_MIS
impl Unpin for OVR_MIS
impl UnwindSafe for OVR_MIS
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more