Struct stm32f7::stm32f7x9::dfsdm::dfsdm_chcfg5r1::R [−][src]
pub struct R(_);
Expand description
Register DFSDM_CHCFG5R1
reader
Implementations
Bits 2:3 - SPI clock select for channel 5
Bits 16:23 - Output serial clock divider
Bit 30 - Output serial clock source selection
Methods from Deref<Target = R<DFSDM_CHCFG5R1_SPEC>>
Trait Implementations
Performs the conversion.