stm32f7_staging::stm32f779::dsi::dltcr

Struct DLTCRrs

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pub struct DLTCRrs;
Expand description

DSI Host Data Lane Timer Configuration Register

You can read this register and get dltcr::R. You can reset, write, write_with_zero this register using dltcr::W. You can also modify this register. See API.

See register structure

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impl RegisterSpec for DLTCRrs

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for DLTCRrs

reset() method sets DLTCR to value 0

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const RESET_VALUE: Self::Ux = <Self::Ux>::ZERO

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Writable for DLTCRrs

write(|w| ..) method takes dltcr::W writer structure

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type Safety = Unsafe

Is it safe to write any bits to register
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const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = <Self::Ux>::ZERO

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
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const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = <Self::Ux>::ZERO

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1
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impl Readable for DLTCRrs

read() method returns dltcr::R reader structure

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