Struct stm32f4xx_hal::pac::otg_fs_device::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 38 fields
    pub dcfg: Reg<DCFG_SPEC>,
    pub dctl: Reg<DCTL_SPEC>,
    pub dsts: Reg<DSTS_SPEC>,
    pub diepmsk: Reg<DIEPMSK_SPEC>,
    pub doepmsk: Reg<DOEPMSK_SPEC>,
    pub daint: Reg<DAINT_SPEC>,
    pub daintmsk: Reg<DAINTMSK_SPEC>,
    pub dvbusdis: Reg<DVBUSDIS_SPEC>,
    pub dvbuspulse: Reg<DVBUSPULSE_SPEC>,
    pub diepempmsk: Reg<DIEPEMPMSK_SPEC>,
    pub diepctl0: Reg<DIEPCTL0_SPEC>,
    pub diepint0: Reg<DIEPINT0_SPEC>,
    pub dieptsiz0: Reg<DIEPTSIZ0_SPEC>,
    pub dtxfsts0: Reg<DTXFSTS0_SPEC>,
    pub diepctl1: Reg<DIEPCTL_SPEC>,
    pub diepint1: Reg<DIEPINT1_SPEC>,
    pub dieptsiz1: Reg<DIEPTSIZ1_SPEC>,
    pub dtxfsts1: Reg<DTXFSTS1_SPEC>,
    pub diepctl2: Reg<DIEPCTL_SPEC>,
    pub diepint2: Reg<DIEPINT2_SPEC>,
    pub dieptsiz2: Reg<DIEPTSIZ2_SPEC>,
    pub dtxfsts2: Reg<DTXFSTS2_SPEC>,
    pub diepctl3: Reg<DIEPCTL_SPEC>,
    pub diepint3: Reg<DIEPINT3_SPEC>,
    pub dieptsiz3: Reg<DIEPTSIZ3_SPEC>,
    pub dtxfsts3: Reg<DTXFSTS3_SPEC>,
    pub doepctl0: Reg<DOEPCTL0_SPEC>,
    pub doepint0: Reg<DOEPINT0_SPEC>,
    pub doeptsiz0: Reg<DOEPTSIZ0_SPEC>,
    pub doepctl1: Reg<DOEPCTL_SPEC>,
    pub doepint1: Reg<DOEPINT1_SPEC>,
    pub doeptsiz1: Reg<DOEPTSIZ1_SPEC>,
    pub doepctl2: Reg<DOEPCTL_SPEC>,
    pub doepint2: Reg<DOEPINT2_SPEC>,
    pub doeptsiz2: Reg<DOEPTSIZ2_SPEC>,
    pub doepctl3: Reg<DOEPCTL_SPEC>,
    pub doepint3: Reg<DOEPINT3_SPEC>,
    pub doeptsiz3: Reg<DOEPTSIZ3_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§dcfg: Reg<DCFG_SPEC>

0x00 - OTG_FS device configuration register (OTG_FS_DCFG)

§dctl: Reg<DCTL_SPEC>

0x04 - OTG_FS device control register (OTG_FS_DCTL)

§dsts: Reg<DSTS_SPEC>

0x08 - OTG_FS device status register (OTG_FS_DSTS)

§diepmsk: Reg<DIEPMSK_SPEC>

0x10 - OTG_FS device IN endpoint common interrupt mask register (OTG_FS_DIEPMSK)

§doepmsk: Reg<DOEPMSK_SPEC>

0x14 - OTG_FS device OUT endpoint common interrupt mask register (OTG_FS_DOEPMSK)

§daint: Reg<DAINT_SPEC>

0x18 - OTG_FS device all endpoints interrupt register (OTG_FS_DAINT)

§daintmsk: Reg<DAINTMSK_SPEC>

0x1c - OTG_FS all endpoints interrupt mask register (OTG_FS_DAINTMSK)

§dvbusdis: Reg<DVBUSDIS_SPEC>

0x28 - OTG_FS device VBUS discharge time register

§dvbuspulse: Reg<DVBUSPULSE_SPEC>

0x2c - OTG_FS device VBUS pulsing time register

§diepempmsk: Reg<DIEPEMPMSK_SPEC>

0x34 - OTG_FS device IN endpoint FIFO empty interrupt mask register

§diepctl0: Reg<DIEPCTL0_SPEC>

0x100 - OTG_FS device control IN endpoint 0 control register (OTG_FS_DIEPCTL0)

§diepint0: Reg<DIEPINT0_SPEC>

0x108 - device endpoint-x interrupt register

§dieptsiz0: Reg<DIEPTSIZ0_SPEC>

0x110 - device endpoint-0 transfer size register

§dtxfsts0: Reg<DTXFSTS0_SPEC>

0x118 - OTG_FS device IN endpoint transmit FIFO status register

§diepctl1: Reg<DIEPCTL_SPEC>

0x120 - OTG_FS device endpoint %s IN control register

§diepint1: Reg<DIEPINT1_SPEC>

0x128 - device endpoint-1 interrupt register

§dieptsiz1: Reg<DIEPTSIZ1_SPEC>

0x130 - device endpoint-1 transfer size register

§dtxfsts1: Reg<DTXFSTS1_SPEC>

0x138 - OTG_FS device IN endpoint transmit FIFO status register

§diepctl2: Reg<DIEPCTL_SPEC>

0x140 - OTG_FS device endpoint %s IN control register

§diepint2: Reg<DIEPINT2_SPEC>

0x148 - device endpoint-2 interrupt register

§dieptsiz2: Reg<DIEPTSIZ2_SPEC>

0x150 - device endpoint-2 transfer size register

§dtxfsts2: Reg<DTXFSTS2_SPEC>

0x158 - OTG_FS device IN endpoint transmit FIFO status register

§diepctl3: Reg<DIEPCTL_SPEC>

0x160 - OTG_FS device endpoint %s IN control register

§diepint3: Reg<DIEPINT3_SPEC>

0x168 - device endpoint-3 interrupt register

§dieptsiz3: Reg<DIEPTSIZ3_SPEC>

0x170 - device endpoint-3 transfer size register

§dtxfsts3: Reg<DTXFSTS3_SPEC>

0x178 - OTG_FS device IN endpoint transmit FIFO status register

§doepctl0: Reg<DOEPCTL0_SPEC>

0x300 - device endpoint-0 control register

§doepint0: Reg<DOEPINT0_SPEC>

0x308 - device endpoint-0 interrupt register

§doeptsiz0: Reg<DOEPTSIZ0_SPEC>

0x310 - device OUT endpoint-0 transfer size register

§doepctl1: Reg<DOEPCTL_SPEC>

0x320 - OTG_FS device endpoint %s OUT control register

§doepint1: Reg<DOEPINT1_SPEC>

0x328 - device endpoint-1 interrupt register

§doeptsiz1: Reg<DOEPTSIZ1_SPEC>

0x330 - device OUT endpoint-1 transfer size register

§doepctl2: Reg<DOEPCTL_SPEC>

0x340 - OTG_FS device endpoint %s OUT control register

§doepint2: Reg<DOEPINT2_SPEC>

0x348 - device endpoint-2 interrupt register

§doeptsiz2: Reg<DOEPTSIZ2_SPEC>

0x350 - device OUT endpoint-2 transfer size register

§doepctl3: Reg<DOEPCTL_SPEC>

0x360 - OTG_FS device endpoint %s OUT control register

§doepint3: Reg<DOEPINT3_SPEC>

0x368 - device endpoint-3 interrupt register

§doeptsiz3: Reg<DOEPTSIZ3_SPEC>

0x370 - device OUT endpoint-3 transfer size register

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