Module stm32f4xx_hal::pac::dac
source · Expand description
Digital-to-analog converter
Modules§
- control register
- channel1 8-bit right aligned data holding register
- channel2 8-bit right-aligned data holding register
- DUAL DAC 8-bit right aligned data holding register
- channel1 12-bit left aligned data holding register
- channel2 12-bit left aligned data holding register
- DUAL DAC 12-bit left aligned data holding register
- channel1 12-bit right-aligned data holding register
- channel2 12-bit right aligned data holding register
- Dual DAC 12-bit right-aligned data holding register
- channel1 data output register
- channel2 data output register
- status register
- software trigger register
Structs§
- Register block
Type Aliases§
- CR register accessor: an alias for
Reg<CR_SPEC> - DHR8R1 register accessor: an alias for
Reg<DHR8R1_SPEC> - DHR8R2 register accessor: an alias for
Reg<DHR8R2_SPEC> - DHR8RD register accessor: an alias for
Reg<DHR8RD_SPEC> - DHR12L1 register accessor: an alias for
Reg<DHR12L1_SPEC> - DHR12L2 register accessor: an alias for
Reg<DHR12L2_SPEC> - DHR12LD register accessor: an alias for
Reg<DHR12LD_SPEC> - DHR12R1 register accessor: an alias for
Reg<DHR12R1_SPEC> - DHR12R2 register accessor: an alias for
Reg<DHR12R2_SPEC> - DHR12RD register accessor: an alias for
Reg<DHR12RD_SPEC> - DOR1 register accessor: an alias for
Reg<DOR1_SPEC> - DOR2 register accessor: an alias for
Reg<DOR2_SPEC> - SR register accessor: an alias for
Reg<SR_SPEC> - SWTRIGR register accessor: an alias for
Reg<SWTRIGR_SPEC>