[−][src]Struct stm32f4xx_hal::stm32::otg_hs_device::RegisterBlock
Register block
Fields
otg_hs_dcfg: OTG_HS_DCFG0x00 - OTG_HS device configuration register
otg_hs_dctl: OTG_HS_DCTL0x04 - OTG_HS device control register
otg_hs_dsts: OTG_HS_DSTS0x08 - OTG_HS device status register
otg_hs_diepmsk: OTG_HS_DIEPMSK0x10 - OTG_HS device IN endpoint common interrupt mask register
otg_hs_doepmsk: OTG_HS_DOEPMSK0x14 - OTG_HS device OUT endpoint common interrupt mask register
otg_hs_daint: OTG_HS_DAINT0x18 - OTG_HS device all endpoints interrupt register
otg_hs_daintmsk: OTG_HS_DAINTMSK0x1c - OTG_HS all endpoints interrupt mask register
otg_hs_dvbusdis: OTG_HS_DVBUSDIS0x28 - OTG_HS device VBUS discharge time register
otg_hs_dvbuspulse: OTG_HS_DVBUSPULSE0x2c - OTG_HS device VBUS pulsing time register
otg_hs_dthrctl: OTG_HS_DTHRCTL0x30 - OTG_HS Device threshold control register
otg_hs_diepempmsk: OTG_HS_DIEPEMPMSK0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register
otg_hs_deachint: OTG_HS_DEACHINT0x38 - OTG_HS device each endpoint interrupt register
otg_hs_deachintmsk: OTG_HS_DEACHINTMSK0x3c - OTG_HS device each endpoint interrupt register mask
otg_hs_diepeachmsk1: OTG_HS_DIEPEACHMSK10x40 - OTG_HS device each in endpoint-1 interrupt register
otg_hs_doepeachmsk1: OTG_HS_DOEPEACHMSK10x80 - OTG_HS device each OUT endpoint-1 interrupt register
otg_hs_diepctl0: OTG_HS_DIEPCTL00x100 - OTG device endpoint-0 control register
otg_hs_diepint0: OTG_HS_DIEPINT00x108 - OTG device endpoint-0 interrupt register
otg_hs_dieptsiz0: OTG_HS_DIEPTSIZ00x110 - OTG_HS device IN endpoint 0 transfer size register
otg_hs_diepdma1: OTG_HS_DIEPDMA10x114 - OTG_HS device endpoint-1 DMA address register
otg_hs_dtxfsts0: OTG_HS_DTXFSTS00x118 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl1: OTG_HS_DIEPCTL10x120 - OTG device endpoint-1 control register
otg_hs_diepint1: OTG_HS_DIEPINT10x128 - OTG device endpoint-1 interrupt register
otg_hs_dieptsiz1: OTG_HS_DIEPTSIZ10x130 - OTG_HS device endpoint transfer size register
otg_hs_diepdma2: OTG_HS_DIEPDMA20x134 - OTG_HS device endpoint-2 DMA address register
otg_hs_dtxfsts1: OTG_HS_DTXFSTS10x138 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl2: OTG_HS_DIEPCTL20x140 - OTG device endpoint-2 control register
otg_hs_diepint2: OTG_HS_DIEPINT20x148 - OTG device endpoint-2 interrupt register
otg_hs_dieptsiz2: OTG_HS_DIEPTSIZ20x150 - OTG_HS device endpoint transfer size register
otg_hs_diepdma3: OTG_HS_DIEPDMA30x154 - OTG_HS device endpoint-3 DMA address register
otg_hs_dtxfsts2: OTG_HS_DTXFSTS20x158 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl3: OTG_HS_DIEPCTL30x160 - OTG device endpoint-3 control register
otg_hs_diepint3: OTG_HS_DIEPINT30x168 - OTG device endpoint-3 interrupt register
otg_hs_dieptsiz3: OTG_HS_DIEPTSIZ30x170 - OTG_HS device endpoint transfer size register
otg_hs_diepdma4: OTG_HS_DIEPDMA40x174 - OTG_HS device endpoint-4 DMA address register
otg_hs_dtxfsts3: OTG_HS_DTXFSTS30x178 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl4: OTG_HS_DIEPCTL40x180 - OTG device endpoint-4 control register
otg_hs_diepint4: OTG_HS_DIEPINT40x188 - OTG device endpoint-4 interrupt register
otg_hs_dieptsiz4: OTG_HS_DIEPTSIZ40x190 - OTG_HS device endpoint transfer size register
otg_hs_diepdma5: OTG_HS_DIEPDMA50x194 - OTG_HS device endpoint-5 DMA address register
otg_hs_dtxfsts4: OTG_HS_DTXFSTS40x198 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl5: OTG_HS_DIEPCTL50x1a0 - OTG device endpoint-5 control register
otg_hs_diepint5: OTG_HS_DIEPINT50x1a8 - OTG device endpoint-5 interrupt register
otg_hs_dieptsiz5: OTG_HS_DIEPTSIZ50x1b0 - OTG_HS device endpoint transfer size register
otg_hs_dtxfsts5: OTG_HS_DTXFSTS50x1b8 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl6: OTG_HS_DIEPCTL60x1c0 - OTG device endpoint-6 control register
otg_hs_diepint6: OTG_HS_DIEPINT60x1c8 - OTG device endpoint-6 interrupt register
otg_hs_diepctl7: OTG_HS_DIEPCTL70x1e0 - OTG device endpoint-7 control register
otg_hs_diepint7: OTG_HS_DIEPINT70x1e8 - OTG device endpoint-7 interrupt register
otg_hs_doepctl0: OTG_HS_DOEPCTL00x300 - OTG_HS device control OUT endpoint 0 control register
otg_hs_doepint0: OTG_HS_DOEPINT00x308 - OTG_HS device endpoint-0 interrupt register
otg_hs_doeptsiz0: OTG_HS_DOEPTSIZ00x310 - OTG_HS device endpoint-1 transfer size register
otg_hs_doepctl1: OTG_HS_DOEPCTL10x320 - OTG device endpoint-1 control register
otg_hs_doepint1: OTG_HS_DOEPINT10x328 - OTG_HS device endpoint-1 interrupt register
otg_hs_doeptsiz1: OTG_HS_DOEPTSIZ10x330 - OTG_HS device endpoint-2 transfer size register
otg_hs_doepctl2: OTG_HS_DOEPCTL20x340 - OTG device endpoint-2 control register
otg_hs_doepint2: OTG_HS_DOEPINT20x348 - OTG_HS device endpoint-2 interrupt register
otg_hs_doeptsiz2: OTG_HS_DOEPTSIZ20x350 - OTG_HS device endpoint-3 transfer size register
otg_hs_doepctl3: OTG_HS_DOEPCTL30x360 - OTG device endpoint-3 control register
otg_hs_doepint3: OTG_HS_DOEPINT30x368 - OTG_HS device endpoint-3 interrupt register
otg_hs_doeptsiz3: OTG_HS_DOEPTSIZ30x370 - OTG_HS device endpoint-4 transfer size register
otg_hs_doepint4: OTG_HS_DOEPINT40x388 - OTG_HS device endpoint-4 interrupt register
otg_hs_doeptsiz4: OTG_HS_DOEPTSIZ40x390 - OTG_HS device endpoint-5 transfer size register
otg_hs_doepint5: OTG_HS_DOEPINT50x3a8 - OTG_HS device endpoint-5 interrupt register
otg_hs_doepint6: OTG_HS_DOEPINT60x3c8 - OTG_HS device endpoint-6 interrupt register
otg_hs_doepint7: OTG_HS_DOEPINT70x3e8 - OTG_HS device endpoint-7 interrupt register
Auto Trait Implementations
impl Send for RegisterBlock
impl !Sync for RegisterBlock
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