Struct PeripheralToMemory

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pub struct PeripheralToMemory;

Expand description

DMA from a peripheral to a memory location.

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impl Clone for PeripheralToMemory

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fn clone(&self) -> PeripheralToMemory

Returns a copy of the value. Read more

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fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

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impl Debug for PeripheralToMemory

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

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impl Direction for PeripheralToMemory

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fn new() -> Self

Creates a new instance of the type.

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fn direction() -> DmaDirection

Returns the DmaDirection of the type.

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impl Copy for PeripheralToMemory

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impl<ADC, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Adc<ADC>
where ADC: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

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impl<I2C, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<I2C>
where I2C: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

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impl<SPI, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<SPI>
where SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

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impl<Serial_, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<Serial_>
where Serial_: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

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impl<UART, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<UART>
where UART: DMASet<STREAM, CHANNEL, PeripheralToMemory> + CommonPins,

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impl DMASet<StreamX<DMA2, 7>, 7, PeripheralToMemory> for DMAR<TIM8>

Auto Trait Implementations§

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impl Freeze for PeripheralToMemory

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impl RefUnwindSafe for PeripheralToMemory

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impl Send for PeripheralToMemory

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impl Sync for PeripheralToMemory

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impl Unpin for PeripheralToMemory

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impl UnwindSafe for PeripheralToMemory

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)

Performs copy-assignment from self to dest. Read more

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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.

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fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

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impl<T, U> TryInto for T
where U: TryFrom<T>,

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type Error = >::Error

The type returned in the event of a conversion error.

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fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct PeripheralToMemoryCopy item path

Trait Implementations§

impl Clone for PeripheralToMemory

fn clone(&self) -> PeripheralToMemory

fn clone_from(&mut self, source: &Self)

impl Debug for PeripheralToMemory

fn fmt(&self, f: &mut Formatter<'_>) -> Result

impl Direction for PeripheralToMemory

fn new() -> Self

fn direction() -> DmaDirection

impl Copy for PeripheralToMemory

impl<ADC, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Adc<ADC>where ADC: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<I2C, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<I2C>where I2C: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<SPI, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<SPI>where SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<Serial_, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<Serial_>where Serial_: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<UART, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<UART>where UART: DMASet<STREAM, CHANNEL, PeripheralToMemory> + CommonPins,

impl DMASet<StreamX<DMA1, 0>, 0, PeripheralToMemory> for SPI3

impl DMASet<StreamX<DMA1, 0>, 1, PeripheralToMemory> for I2C1

impl DMASet<StreamX<DMA1, 0>, 2, PeripheralToMemory> for CCR1<TIM4>

impl DMASet<StreamX<DMA1, 0>, 4, PeripheralToMemory> for UART5

impl DMASet<StreamX<DMA1, 0>, 6, PeripheralToMemory> for CCR3<TIM5>

impl DMASet<StreamX<DMA1, 0>, 6, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 1>, 3, PeripheralToMemory> for CCR3<TIM2>

impl DMASet<StreamX<DMA1, 1>, 3, PeripheralToMemory> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 1>, 4, PeripheralToMemory> for USART3

impl DMASet<StreamX<DMA1, 1>, 6, PeripheralToMemory> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 1>, 6, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 2>, 0, PeripheralToMemory> for SPI3

impl DMASet<StreamX<DMA1, 2>, 3, PeripheralToMemory> for I2C3

impl DMASet<StreamX<DMA1, 2>, 4, PeripheralToMemory> for UART4

impl DMASet<StreamX<DMA1, 2>, 5, PeripheralToMemory> for CCR4<TIM3>

impl DMASet<StreamX<DMA1, 2>, 5, PeripheralToMemory> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 2>, 6, PeripheralToMemory> for CCR1<TIM5>

impl DMASet<StreamX<DMA1, 2>, 7, PeripheralToMemory> for I2C2

impl DMASet<StreamX<DMA1, 3>, 0, PeripheralToMemory> for SPI2

impl DMASet<StreamX<DMA1, 3>, 2, PeripheralToMemory> for CCR2<TIM4>

impl DMASet<StreamX<DMA1, 3>, 5, PeripheralToMemory> for UART7

impl DMASet<StreamX<DMA1, 3>, 6, PeripheralToMemory> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 3>, 6, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 3>, 7, PeripheralToMemory> for I2C2

impl DMASet<StreamX<DMA1, 4>, 5, PeripheralToMemory> for CCR1<TIM3>

impl DMASet<StreamX<DMA1, 4>, 5, PeripheralToMemory> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 4>, 6, PeripheralToMemory> for CCR2<TIM5>

impl DMASet<StreamX<DMA1, 5>, 1, PeripheralToMemory> for I2C1

impl DMASet<StreamX<DMA1, 5>, 3, PeripheralToMemory> for CCR1<TIM2>

impl DMASet<StreamX<DMA1, 5>, 4, PeripheralToMemory> for USART2

impl DMASet<StreamX<DMA1, 5>, 5, PeripheralToMemory> for CCR2<TIM3>

impl DMASet<StreamX<DMA1, 6>, 2, PeripheralToMemory> for DMAR<TIM4>

impl DMASet<StreamX<DMA1, 6>, 3, PeripheralToMemory> for CCR2<TIM2>

impl DMASet<StreamX<DMA1, 6>, 3, PeripheralToMemory> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 6>, 5, PeripheralToMemory> for UART8

impl DMASet<StreamX<DMA1, 6>, 6, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 7>, 2, PeripheralToMemory> for CCR3<TIM4>

impl DMASet<StreamX<DMA1, 7>, 3, PeripheralToMemory> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 7>, 3, PeripheralToMemory> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 7>, 5, PeripheralToMemory> for CCR3<TIM3>

impl DMASet<StreamX<DMA2, 0>, 0, PeripheralToMemory> for ADC1

impl DMASet<StreamX<DMA2, 0>, 2, PeripheralToMemory> for ADC3

impl DMASet<StreamX<DMA2, 0>, 3, PeripheralToMemory> for SPI1

impl DMASet<StreamX<DMA2, 0>, 4, PeripheralToMemory> for SPI4

impl DMASet<StreamX<DMA2, 0>, 6, PeripheralToMemory> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 1>, 0, PeripheralToMemory> for SAICH<SAI, false>

impl DMASet<StreamX<DMA2, 1>, 1, PeripheralToMemory> for DCMI

impl DMASet<StreamX<DMA2, 1>, 2, PeripheralToMemory> for ADC3

impl DMASet<StreamX<DMA2, 1>, 5, PeripheralToMemory> for USART6

impl DMASet<StreamX<DMA2, 1>, 6, PeripheralToMemory> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 1>, 7, PeripheralToMemory> for DMAR<TIM8>

impl DMASet<StreamX<DMA2, 2>, 0, PeripheralToMemory> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 2>, 0, PeripheralToMemory> for CCR2<TIM8>

impl DMASet<StreamX<DMA2, 2>, 0, PeripheralToMemory> for CCR3<TIM8>

impl DMASet<StreamX<DMA2, 2>, 1, PeripheralToMemory> for ADC2

impl DMASet<StreamX<DMA2, 2>, 3, PeripheralToMemory> for SPI1

impl DMASet<StreamX<DMA2, 2>, 4, PeripheralToMemory> for USART1

impl DMASet<StreamX<DMA2, 2>, 5, PeripheralToMemory> for USART6

impl DMASet<StreamX<DMA2, 2>, 6, PeripheralToMemory> for CCR2<TIM1>

impl DMASet<StreamX<DMA2, 2>, 7, PeripheralToMemory> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 3>, 0, PeripheralToMemory> for SAICH<SAI, false>

impl DMASet<StreamX<DMA2, 3>, 1, PeripheralToMemory> for ADC2

impl DMASet<StreamX<DMA2, 3>, 2, PeripheralToMemory> for SPI5

impl DMASet<StreamX<DMA2, 3>, 4, PeripheralToMemory> for SDIO

Struct PeripheralToMemory

impl<ADC, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Adc<ADC>
where ADC: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<I2C, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<I2C>
where I2C: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<SPI, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<SPI>
where SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<Serial_, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<Serial_>
where Serial_: DMASet<STREAM, CHANNEL, PeripheralToMemory>,

impl<UART, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<UART>
where UART: DMASet<STREAM, CHANNEL, PeripheralToMemory> + CommonPins,

impl<T> Any for T
where T: 'static + ?Sized,

impl<T> Borrow<T> for T
where T: ?Sized,

impl<T> BorrowMut<T> for T
where T: ?Sized,

impl<T> CloneToUninit for T
where T: Clone,

impl<T, U> Into<U> for T
where U: From<T>,

impl<T, U> TryFrom<U> for T
where U: Into<T>,

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,