Struct stm32f4xx_hal::stm32::CorePeripherals

pub struct CorePeripherals {
    pub CBP: CBP,
    pub CPUID: CPUID,
    pub DCB: DCB,
    pub DWT: DWT,
    pub FPB: FPB,
    pub FPU: FPU,
    pub ITM: ITM,
    pub MPU: MPU,
    pub NVIC: NVIC,
    pub SCB: SCB,
    pub SYST: SYST,
    pub TPIU: TPIU,
}

Core peripherals

Fields

CBP: CBP

Cache and branch predictor maintenance operations (not present on Cortex-M0 variants)

CPUID: CPUID

CPUID

DCB: DCB

Debug Control Block

DWT: DWT

Data Watchpoint and Trace unit

FPB: FPB

Flash Patch and Breakpoint unit (not present on Cortex-M0 variants)

FPU: FPU

Floating Point Unit (only present on thumbv7em-none-eabihf)

ITM: ITM

Instrumentation Trace Macrocell (not present on Cortex-M0 variants)

MPU: MPU

Memory Protection Unit

NVIC: NVIC

Nested Vector Interrupt Controller

SCB: SCB

System Control Block

SYST: SYST

SysTick: System Timer

TPIU: TPIU

Trace Port Interface Unit (not present on Cortex-M0 variants)

Implementations

impl Peripherals

pub fn take() -> Option<Peripherals>

Returns all the core peripherals once

pub unsafe fn steal() -> Peripherals

Unchecked version of Peripherals::take