Struct stm32f407g_disc::dma::Stream2

pub struct Stream2<DMA> { /* fields omitted */ }

Stream 2 on the DMA controller.

Trait Implementations

impl DMASet<Stream2<DMA1>, Channel0, PeripheralToMemory> for SPI3

impl DMASet<Stream2<DMA1>, Channel3, PeripheralToMemory> for I2C3

impl DMASet<Stream2<DMA1>, Channel4, PeripheralToMemory> for UART4

impl DMASet<Stream2<DMA1>, Channel5, MemoryToPeripheral> for DMAR<TIM3>

impl DMASet<Stream2<DMA1>, Channel5, MemoryToPeripheral> for CCR4<TIM3>

impl DMASet<Stream2<DMA1>, Channel5, PeripheralToMemory> for CCR4<TIM3>

impl DMASet<Stream2<DMA1>, Channel5, PeripheralToMemory> for DMAR<TIM3>

impl DMASet<Stream2<DMA1>, Channel6, MemoryToPeripheral> for CCR1<TIM5>

impl DMASet<Stream2<DMA1>, Channel6, PeripheralToMemory> for CCR1<TIM5>

impl DMASet<Stream2<DMA1>, Channel7, PeripheralToMemory> for I2C2

impl DMASet<Stream2<DMA2>, Channel0, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<Stream2<DMA2>, Channel0, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<Stream2<DMA2>, Channel0, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<Stream2<DMA2>, Channel0, MemoryToPeripheral> for CCR1<TIM8>

impl DMASet<Stream2<DMA2>, Channel0, MemoryToPeripheral> for CCR3<TIM8>

impl DMASet<Stream2<DMA2>, Channel0, MemoryToPeripheral> for CCR2<TIM8>

impl DMASet<Stream2<DMA2>, Channel0, PeripheralToMemory> for CCR2<TIM8>

impl DMASet<Stream2<DMA2>, Channel0, PeripheralToMemory> for CCR3<TIM8>

impl DMASet<Stream2<DMA2>, Channel0, PeripheralToMemory> for CCR1<TIM8>

impl DMASet<Stream2<DMA2>, Channel1, PeripheralToMemory> for ADC2

impl DMASet<Stream2<DMA2>, Channel3, PeripheralToMemory> for SPI1

impl DMASet<Stream2<DMA2>, Channel4, PeripheralToMemory> for Rx<USART1>

impl DMASet<Stream2<DMA2>, Channel4, PeripheralToMemory> for USART1

impl DMASet<Stream2<DMA2>, Channel5, PeripheralToMemory> for Rx<USART6>

impl DMASet<Stream2<DMA2>, Channel5, PeripheralToMemory> for USART6

impl DMASet<Stream2<DMA2>, Channel6, MemoryToPeripheral> for CCR2<TIM1>

impl DMASet<Stream2<DMA2>, Channel6, PeripheralToMemory> for CCR2<TIM1>

impl DMASet<Stream2<DMA2>, Channel7, MemoryToPeripheral> for CCR1<TIM8>

impl DMASet<Stream2<DMA2>, Channel7, PeripheralToMemory> for CCR1<TIM8>

impl<I> Stream for Stream2<I> where
    I: Instance, 

pub const NUMBER: usize

Number of the register stream.

pub fn clear_interrupts(&mut self)

Clear all interrupts for the DMA stream.

pub fn clear_transfer_complete_interrupt(&mut self)

Clear transfer complete interrupt (tcif) for the DMA stream.

pub fn clear_half_transfer_interrupt(&mut self)

Clear half transfer interrupt (htif) for the DMA stream.

pub fn clear_transfer_error_interrupt(&mut self)

Clear transfer error interrupt (teif) for the DMA stream.

pub fn clear_direct_mode_error_interrupt(&mut self)

Clear direct mode error interrupt (dmeif) for the DMA stream.

pub fn clear_fifo_error_interrupt(&mut self)

Clear fifo error interrupt (feif) for the DMA stream.

pub fn get_transfer_complete_flag() -> bool

Get transfer complete flag.

pub fn get_half_transfer_flag() -> bool

Get half transfer flag.

pub fn set_peripheral_address(&mut self, value: u32)

Set the peripheral address (par) for the DMA stream.

pub fn set_memory_address(&mut self, value: u32)

Set the memory address (m0ar) for the DMA stream.

pub fn get_memory_address(&self) -> u32

Get the memory address (m0ar) for the DMA stream.

pub fn set_memory_double_buffer_address(&mut self, value: u32)

Set the double buffer address (m1ar) for the DMA stream.

pub fn get_memory_double_buffer_address(&self) -> u32

Get the double buffer address (m1ar) for the DMA stream.

pub fn set_number_of_transfers(&mut self, value: u16)

Set the number of transfers (ndt) for the DMA stream.

pub fn get_number_of_transfers() -> u16

Get the number of transfers (ndt) for the DMA stream.

pub unsafe fn enable(&mut self)

Enable the DMA stream.

pub fn is_enabled() -> bool

Returns the state of the DMA stream.

pub fn disable(&mut self)

Disable the DMA stream.

pub fn set_channel<C>(&mut self, channel: C) where
    C: Channel, 

Set the channel for the (chsel) the DMA stream.

pub fn set_priority(&mut self, priority: Priority)

Set the priority (pl) the DMA stream.

pub unsafe fn set_memory_size(&mut self, size: u8)

Set the memory size (msize) for the DMA stream.

pub unsafe fn set_peripheral_size(&mut self, size: u8)

Set the peripheral memory size (psize) for the DMA stream.

pub fn set_memory_increment(&mut self, increment: bool)

Enable/disable memory increment (minc) for the DMA stream.

pub fn set_peripheral_increment(&mut self, increment: bool)

Enable/disable peripheral increment (pinc) for the DMA stream.

pub fn set_direction<D>(&mut self, direction: D) where
    D: Direction, 

Set the direction (dir) of the DMA stream.

pub fn set_interrupts_enable(
    &mut self,
    transfer_complete: bool,
    half_transfer: bool,
    transfer_error: bool,
    direct_mode_error: bool
)

Convenience method to configure the 4 common interrupts for the DMA stream.

pub fn get_interrupts_enable() -> (bool, bool, bool, bool)

Convenience method to get the value of the 4 common interrupts for the DMA stream. The order of the returns are: transfer_complete, half_transfer, transfer_error and direct_mode_error.

pub fn set_transfer_complete_interrupt_enable(
    &mut self,
    transfer_complete_interrupt: bool
)

Enable/disable the transfer complete interrupt (tcie) of the DMA stream.

pub fn set_half_transfer_interrupt_enable(
    &mut self,
    half_transfer_interrupt: bool
)

Enable/disable the half transfer interrupt (htie) of the DMA stream.

pub fn set_transfer_error_interrupt_enable(
    &mut self,
    transfer_error_interrupt: bool
)

Enable/disable the transfer error interrupt (teie) of the DMA stream.

pub fn set_direct_mode_error_interrupt_enable(
    &mut self,
    direct_mode_error_interrupt: bool
)

Enable/disable the direct mode error interrupt (dmeie) of the DMA stream.

pub fn set_fifo_error_interrupt_enable(&mut self, fifo_error_interrupt: bool)

Enable/disable the fifo error interrupt (feie) of the DMA stream.

pub fn set_double_buffer(&mut self, double_buffer: bool)

Enable/disable the double buffer (dbm) of the DMA stream.

pub fn set_fifo_threshold(&mut self, fifo_threshold: FifoThreshold)

Set the fifo threshold (fcr.fth) of the DMA stream.

pub fn set_fifo_enable(&mut self, fifo_enable: bool)

Enable/disable the fifo (dmdis) of the DMA stream.

pub fn set_memory_burst(&mut self, memory_burst: BurstMode)

Set memory burst mode (mburst) of the DMA stream.

pub fn set_peripheral_burst(&mut self, peripheral_burst: BurstMode)

Set peripheral burst mode (pburst) of the DMA stream.

pub fn fifo_level() -> FifoLevel

Get the current fifo level (fs) of the DMA stream.

pub fn current_buffer() -> CurrentBuffer

Get which buffer is currently in use by the DMA.