Struct stm32f407g_disc::dma::Stream7[][src]

pub struct Stream7<DMA> { /* fields omitted */ }

Stream 7 on the DMA controller.

Trait Implementations

impl DMASet<Stream7<DMA1>, Channel0, MemoryToPeripheral> for SPI3[src]

impl DMASet<Stream7<DMA1>, Channel1, MemoryToPeripheral> for I2C1[src]

impl DMASet<Stream7<DMA1>, Channel2, MemoryToPeripheral> for CCR3<TIM4>[src]

impl DMASet<Stream7<DMA1>, Channel2, PeripheralToMemory> for CCR3<TIM4>[src]

impl DMASet<Stream7<DMA1>, Channel3, MemoryToPeripheral> for CCR4<TIM2>[src]

impl DMASet<Stream7<DMA1>, Channel3, MemoryToPeripheral> for DMAR<TIM2>[src]

impl DMASet<Stream7<DMA1>, Channel3, PeripheralToMemory> for CCR4<TIM2>[src]

impl DMASet<Stream7<DMA1>, Channel3, PeripheralToMemory> for DMAR<TIM2>[src]

impl DMASet<Stream7<DMA1>, Channel4, MemoryToPeripheral> for UART5[src]

impl DMASet<Stream7<DMA1>, Channel5, MemoryToPeripheral> for CCR3<TIM3>[src]

impl DMASet<Stream7<DMA1>, Channel5, PeripheralToMemory> for CCR3<TIM3>[src]

impl DMASet<Stream7<DMA1>, Channel7, MemoryToPeripheral> for I2C2[src]

impl DMASet<Stream7<DMA2>, Channel0, MemoryToMemory<u16>> for MemoryToMemory<u16>[src]

impl DMASet<Stream7<DMA2>, Channel0, MemoryToMemory<u32>> for MemoryToMemory<u32>[src]

impl DMASet<Stream7<DMA2>, Channel0, MemoryToMemory<u8>> for MemoryToMemory<u8>[src]

impl DMASet<Stream7<DMA2>, Channel1, PeripheralToMemory> for DCMI[src]

impl DMASet<Stream7<DMA2>, Channel2, MemoryToPeripheral> for HASH[src]

impl DMASet<Stream7<DMA2>, Channel4, MemoryToPeripheral> for USART1[src]

impl DMASet<Stream7<DMA2>, Channel4, MemoryToPeripheral> for Tx<USART1>[src]

impl DMASet<Stream7<DMA2>, Channel5, MemoryToPeripheral> for Tx<USART6>[src]

impl DMASet<Stream7<DMA2>, Channel5, MemoryToPeripheral> for USART6[src]

impl DMASet<Stream7<DMA2>, Channel7, MemoryToPeripheral> for DMAR<TIM8>[src]

impl DMASet<Stream7<DMA2>, Channel7, MemoryToPeripheral> for CCR4<TIM8>[src]

impl DMASet<Stream7<DMA2>, Channel7, PeripheralToMemory> for CCR4<TIM8>[src]

impl DMASet<Stream7<DMA2>, Channel7, PeripheralToMemory> for DMAR<TIM8>[src]

impl<I> Stream for Stream7<I> where
    I: Instance
[src]

Auto Trait Implementations

impl<DMA> Send for Stream7<DMA> where
    DMA: Send

impl<DMA> Sync for Stream7<DMA> where
    DMA: Sync

impl<DMA> Unpin for Stream7<DMA> where
    DMA: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.