[−][src]Type Definition stm32f4::stm32f401::dma2::st::cr::W
type W = W<u32, CR>;
Writer for register CR
Implementations
impl W
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pub fn chsel(&mut self) -> CHSEL_W<'_>
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Bits 25:27 - Channel selection
pub fn mburst(&mut self) -> MBURST_W<'_>
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Bits 23:24 - Memory burst transfer configuration
pub fn pburst(&mut self) -> PBURST_W<'_>
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Bits 21:22 - Peripheral burst transfer configuration
pub fn ct(&mut self) -> CT_W<'_>
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Bit 19 - Current target (only in double buffer mode)
pub fn dbm(&mut self) -> DBM_W<'_>
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Bit 18 - Double buffer mode
pub fn pl(&mut self) -> PL_W<'_>
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Bits 16:17 - Priority level
pub fn pincos(&mut self) -> PINCOS_W<'_>
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Bit 15 - Peripheral increment offset size
pub fn msize(&mut self) -> MSIZE_W<'_>
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Bits 13:14 - Memory data size
pub fn psize(&mut self) -> PSIZE_W<'_>
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Bits 11:12 - Peripheral data size
pub fn minc(&mut self) -> MINC_W<'_>
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Bit 10 - Memory increment mode
pub fn pinc(&mut self) -> PINC_W<'_>
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Bit 9 - Peripheral increment mode
pub fn circ(&mut self) -> CIRC_W<'_>
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Bit 8 - Circular mode
pub fn dir(&mut self) -> DIR_W<'_>
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Bits 6:7 - Data transfer direction
pub fn pfctrl(&mut self) -> PFCTRL_W<'_>
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Bit 5 - Peripheral flow controller
pub fn tcie(&mut self) -> TCIE_W<'_>
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Bit 4 - Transfer complete interrupt enable
pub fn htie(&mut self) -> HTIE_W<'_>
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Bit 3 - Half transfer interrupt enable
pub fn teie(&mut self) -> TEIE_W<'_>
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Bit 2 - Transfer error interrupt enable
pub fn dmeie(&mut self) -> DMEIE_W<'_>
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Bit 1 - Direct mode error interrupt enable
pub fn en(&mut self) -> EN_W<'_>
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Bit 0 - Stream enable / flag stream ready when read low