Module clcr

DSI Host clock lane configuration register

Structs

CLCRrs

DSI Host clock lane configuration register

Enums

ACR

Automatic clock lane control This bit enables the automatic mechanism to stop providing clock in the clock lane when time allows.

DPCC

D-PHY clock control This bit controls the D-PHY clock state:

Type Aliases

ACR_R

Field ACR reader - Automatic clock lane control This bit enables the automatic mechanism to stop providing clock in the clock lane when time allows.

ACR_W

Field ACR writer - Automatic clock lane control This bit enables the automatic mechanism to stop providing clock in the clock lane when time allows.

DPCC_R

Field DPCC reader - D-PHY clock control This bit controls the D-PHY clock state:

DPCC_W

Field DPCC writer - D-PHY clock control This bit controls the D-PHY clock state:

R

Register CLCR reader

W

Register CLCR writer