Enum stm32f3xx_hal_v2::stm32::rcc::cfgr3::TIM1SW_A

pub enum TIM1SW_A {
    PCLK2,
    PLL,
}

Timer1 clock source selection

Value on reset: 0

Variants

PCLK2

0: PCLK2 clock (doubled frequency when prescaled)

PLL

1: PLL vco output (running up to 144 MHz)

Trait Implementations

impl Clone for TIM1SW_A

pub fn clone(&self) -> TIM1SW_A

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for TIM1SW_A

impl Debug for TIM1SW_A

pub fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq<TIM1SW_A> for TIM1SW_A

pub fn eq(&self, other: &TIM1SW_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use]pub fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for TIM1SW_A