pub enum TIM1SW {
Pclk2 = 0,
Pll = 1,
}
Expand description
Timer1 clock source selection
Value on reset: 0
Variants§
Pclk2 = 0
0: PCLK2 clock (doubled frequency when prescaled)
Pll = 1
1: PLL vco output (running up to 144 MHz)
Trait Implementations§
impl Copy for TIM1SW
impl Eq for TIM1SW
impl StructuralPartialEq for TIM1SW
Auto Trait Implementations§
impl Freeze for TIM1SW
impl RefUnwindSafe for TIM1SW
impl Send for TIM1SW
impl Sync for TIM1SW
impl Unpin for TIM1SW
impl UnwindSafe for TIM1SW
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more