Module stm32f1xx_hal::gpio

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Expand description

General Purpose I/Os

The GPIO pins are organised into groups of 16 pins which can be accessed through the gpioa, gpiob… modules. To get access to the pins, you first need to convert them into a HAL designed struct from the pac struct using the split function.

// Acquire the GPIOC peripheral
// NOTE: `dp` is the device peripherals from the `PAC` crate
let mut gpioa = dp.GPIOA.split();

This gives you a struct containing two control registers crl and crh, and all the pins px0..px15. These structs are what you use to interract with the pins to change their modes, or their inputs or outputs. For example, to set pa5 high, you would call

let output = gpioa.pa5.into_push_pull_output(&mut gpioa.crl);
output.set_high();

Modes

Each GPIO pin can be set to various modes:

  • Alternate: Pin mode required when the pin is driven by other peripherals
  • Dynamic: Pin mode is selected at runtime. See changing configurations for more details
  • Input
    • PullUp: Input connected to high with a weak pull up resistor. Will be high when nothing is connected
    • PullDown: Input connected to high with a weak pull up resistor. Will be low when nothing is connected
    • Floating: Input not pulled to high or low. Will be undefined when nothing is connected
  • Output
    • PushPull: Output which either drives the pin high or low
    • OpenDrain: Output which leaves the gate floating, or pulls it do ground in drain mode. Can be used as an input in the open configuration
  • Debugger: Some pins start out being used by the debugger. A pin in this mode can only be used if the JTAG peripheral has been turned off.

Changing modes

The simplest way to change the pin mode is to use the into_<mode> functions. These return a new struct with the correct mode that you can use the input or output functions on.

If you need a more temporary mode change, and can not use the into_<mode> functions for ownership reasons, you can use the as_<mode> functions to temporarily change the pin type, do some output or input, and then have it change back once done.

Dynamic Mode Change

The above mode change methods guarantee that you can only call input functions when the pin is in input mode, and output when in output modes, but can lead to some issues. Therefore, there is also a mode where the state is kept track of at runtime, allowing you to change the mode often, and without problems with ownership, or references, at the cost of some performance and the risk of runtime errors.

To make a pin dynamic, use the into_dynamic function, and then use the make_<mode> functions to change the mode

Accessing PA15, PB3, and PB14

These pins are used by the JTAG peripheral by default. To use them in your program, you need to disable that peripheral. This is done using the afio::MAPR::disable_jtag function

Interfacing with v1 traits

embedded-hal has two versions of the digital traits, v2 which is used by this crate and v1 which is deprecated but still used by a lot of drivers. If you want to use such a driver with this crate, you need to convert the digital pins to the v1 type.

This is done using embedded-hal::digital::v1_compat::OldOutputPin. For example:

let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
let mut mfrc522 = Mfrc522::new(spi, OldOutputPin::from(nss)).unwrap();

Re-exports

pub use gpioa::PA0;
pub use gpioa::PA1;
pub use gpioa::PA2;
pub use gpioa::PA3;
pub use gpioa::PA4;
pub use gpioa::PA5;
pub use gpioa::PA6;
pub use gpioa::PA7;
pub use gpioa::PA8;
pub use gpioa::PA9;
pub use gpioa::PA10;
pub use gpioa::PA11;
pub use gpioa::PA12;
pub use gpioa::PA13;
pub use gpioa::PA14;
pub use gpioa::PA15;
pub use gpiob::PB0;
pub use gpiob::PB1;
pub use gpiob::PB2;
pub use gpiob::PB3;
pub use gpiob::PB4;
pub use gpiob::PB5;
pub use gpiob::PB6;
pub use gpiob::PB7;
pub use gpiob::PB8;
pub use gpiob::PB9;
pub use gpiob::PB10;
pub use gpiob::PB11;
pub use gpiob::PB12;
pub use gpiob::PB13;
pub use gpiob::PB14;
pub use gpiob::PB15;
pub use gpioc::PC0;
pub use gpioc::PC1;
pub use gpioc::PC2;
pub use gpioc::PC3;
pub use gpioc::PC4;
pub use gpioc::PC5;
pub use gpioc::PC6;
pub use gpioc::PC7;
pub use gpioc::PC8;
pub use gpioc::PC9;
pub use gpioc::PC10;
pub use gpioc::PC11;
pub use gpioc::PC12;
pub use gpioc::PC13;
pub use gpioc::PC14;
pub use gpioc::PC15;
pub use gpiod::PD0;
pub use gpiod::PD1;
pub use gpiod::PD2;
pub use gpiod::PD3;
pub use gpiod::PD4;
pub use gpiod::PD5;
pub use gpiod::PD6;
pub use gpiod::PD7;
pub use gpiod::PD8;
pub use gpiod::PD9;
pub use gpiod::PD10;
pub use gpiod::PD11;
pub use gpiod::PD12;
pub use gpiod::PD13;
pub use gpiod::PD14;
pub use gpiod::PD15;
pub use gpioe::PE0;
pub use gpioe::PE1;
pub use gpioe::PE2;
pub use gpioe::PE3;
pub use gpioe::PE4;
pub use gpioe::PE5;
pub use gpioe::PE6;
pub use gpioe::PE7;
pub use gpioe::PE8;
pub use gpioe::PE9;
pub use gpioe::PE10;
pub use gpioe::PE11;
pub use gpioe::PE12;
pub use gpioe::PE13;
pub use gpioe::PE14;
pub use gpioe::PE15;
pub use gpiof::PF0;
pub use gpiof::PF1;
pub use gpiof::PF2;
pub use gpiof::PF3;
pub use gpiof::PF4;
pub use gpiof::PF5;
pub use gpiof::PF6;
pub use gpiof::PF7;
pub use gpiof::PF8;
pub use gpiof::PF9;
pub use gpiof::PF10;
pub use gpiof::PF11;
pub use gpiof::PF12;
pub use gpiof::PF13;
pub use gpiof::PF14;
pub use gpiof::PF15;
pub use gpiog::PG0;
pub use gpiog::PG1;
pub use gpiog::PG2;
pub use gpiog::PG3;
pub use gpiog::PG4;
pub use gpiog::PG5;
pub use gpiog::PG6;
pub use gpiog::PG7;
pub use gpiog::PG8;
pub use gpiog::PG9;
pub use gpiog::PG10;
pub use gpiog::PG11;
pub use gpiog::PG12;
pub use gpiog::PG13;
pub use gpiog::PG14;
pub use gpiog::PG15;

Modules

GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO

Structs

Alternate function
Analog mode (type state)
Opaque CR register
Used by the debugger (type state)
Floating input (type state)
Input mode (type state)
Open drain output (type state)
Output mode (type state)
Partially erased pin
Generic pin type
Pulled down input (type state)
Pulled up input (type state)
Push pull output (type state)

Enums

Tracks the current pin state for dynamic pins
Erased pin
Slew rates available for Output and relevant AlternateMode Pins
Digital output pin state

Traits

Marker trait for active states.
External Interrupt Pin
Extension trait to split a GPIO peripheral in independent pins and registers
Represents high or low configuration register
Allow setting of the slew rate of an IO pin

Type Definitions