Struct stm32f1::stm32f103::SCB

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pub struct SCB { /* fields omitted */ }

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System Control Block

Methods

impl SCB

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pub fn vect_active() -> VectActive

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Returns the active exception number

impl SCB

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pub fn enable_icache(&mut self)

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Enables I-Cache if currently disabled

pub fn disable_icache(&mut self)

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Disables I-Cache if currently enabled

pub fn icache_enabled() -> bool

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Returns whether the I-Cache is currently enabled

pub fn invalidate_icache(&mut self)

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Invalidates I-Cache

pub fn enable_dcache(&mut self, cpuid: &mut CPUID)

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Enables D-cache if currently disabled

pub fn disable_dcache(&mut self, cpuid: &mut CPUID)

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Disables D-cache if currently enabled

pub fn dcache_enabled() -> bool

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Returns whether the D-Cache is currently enabled

pub fn clean_dcache(&mut self, cpuid: &mut CPUID)

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Cleans D-cache

pub fn clean_invalidate_dcache(&mut self, cpuid: &mut CPUID)

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Cleans and invalidates D-cache

pub fn invalidate_dcache_by_address(&mut self, addr: usize, size: usize)

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Invalidates D-cache by address

addr: the address to invalidate size: size of the memory block, in number of bytes

Invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been invalidated.

pub fn clean_dcache_by_address(&mut self, addr: usize, size: usize)

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Cleans D-cache by address

addr: the address to clean size: size of the memory block, in number of bytes

Cleans cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned.

pub fn clean_invalidate_dcache_by_address(&mut self, addr: usize, size: usize)

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Cleans and invalidates D-cache by address

addr: the address to clean and invalidate size: size of the memory block, in number of bytes

Cleans and invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned and invalidated.

impl SCB

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pub fn set_sleepdeep(&mut self)

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Set the SLEEPDEEP bit in the SCR register

pub fn clear_sleepdeep(&mut self)

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Clear the SLEEPDEEP bit in the SCR register

impl SCB

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pub fn system_reset(&mut self) -> !

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Initiate a system reset request to reset the MCU

impl SCB

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pub fn set_pendsv()

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Set the PENDSVSET bit in the ICSR register which will pend the PendSV interrupt

pub fn is_pendsv_pending() -> bool

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Check if PENDSVSET bit in the ICSR register is set meaning PendSV interrupt is pending

pub fn clear_pendsv()

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Set the PENDSVCLR bit in the ICSR register which will clear a pending PendSV interrupt

pub fn set_pendst()

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Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

pub fn is_pendst_pending() -> bool

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Check if PENDSTSET bit in the ICSR register is set meaning SysTick interrupt is pending

pub fn clear_pendst()

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Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

impl SCB

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pub fn get_priority(system_handler: SystemHandler) -> u8

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Returns the hardware priority of system_handler

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

pub unsafe fn set_priority(&mut self, system_handler: SystemHandler, prio: u8)

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Sets the hardware priority of system_handler to prio

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

On ARMv6-M, updating a system handler priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single, atomic write operation.

Unsafety

Changing priority levels can break priority-based critical sections (see register::basepri) and compromise memory safety.

impl SCB

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pub fn ptr() -> *const RegisterBlock

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Returns a pointer to the register block

Trait Implementations

impl Send for SCB

impl Deref for SCB

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[+] Show hidden undocumented items

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &<SCB as Deref>::Target

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Dereferences the value.