pub enum PLLSRC_A {
HsiDiv2,
HseDivPrediv,
}
Expand description
PLL entry clock source
Value on reset: 0
Variants
HsiDiv2
0: HSI divided by 2 selected as PLL input clock
HseDivPrediv
1: HSE divided by PREDIV selected as PLL input clock
Trait Implementations
impl Copy for PLLSRC_A
impl StructuralPartialEq for PLLSRC_A
Auto Trait Implementations
impl RefUnwindSafe for PLLSRC_A
impl Send for PLLSRC_A
impl Sync for PLLSRC_A
impl Unpin for PLLSRC_A
impl UnwindSafe for PLLSRC_A
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more