Struct stm32f1::R [−][src]
Register/field reader
Result of the read
method of a register.
Also it can be used in the modify
method
Implementations
impl<U, T> R<U, T> where
U: Copy,
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U: Copy,
impl<FI> R<bool, FI>
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pub fn bit(&self) -> bool
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Value of the field as raw bits
pub fn bit_is_clear(&self) -> bool
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Returns true
if the bit is clear (0)
pub fn bit_is_set(&self) -> bool
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Returns true
if the bit is set (1)
impl R<bool, CBURSTRW_A>
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pub fn variant(&self) -> CBURSTRW_A
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Get enumerated values variant
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
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pub fn variant(&self) -> ASYNCWAIT_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
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pub fn variant(&self) -> EXTMOD_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
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pub fn variant(&self) -> WAITEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
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pub fn variant(&self) -> WREN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
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pub fn variant(&self) -> WAITCFG_A
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Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
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Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
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Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
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pub fn variant(&self) -> WAITPOL_A
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Get enumerated values variant
pub fn is_active_low(&self) -> bool
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Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
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Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
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pub fn variant(&self) -> BURSTEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
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pub fn variant(&self) -> FACCEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
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pub fn variant(&self) -> Variant<u8, MWID_A>
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Get enumerated values variant
pub fn is_bits8(&self) -> bool
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Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
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Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
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Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
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pub fn variant(&self) -> Variant<u8, MTYP_A>
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Get enumerated values variant
pub fn is_sram(&self) -> bool
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Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
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Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
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Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
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pub fn variant(&self) -> MUXEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
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pub fn variant(&self) -> MBKEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
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pub fn variant(&self) -> Variant<u8, CPSIZE_A>
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Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
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Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
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Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
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Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
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Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
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Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR1>>
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pub fn cburstrw(&self) -> CBURSTRW_R
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Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
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Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
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Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
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Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
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Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
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Bit 11 - WAITCFG
pub fn waitpol(&self) -> WAITPOL_R
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Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
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Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
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Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
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Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
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Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
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Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
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Bit 0 - MBKEN
pub fn wrapmod(&self) -> WRAPMOD_R
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Bit 10 - WRAPMOD
pub fn cpsize(&self) -> CPSIZE_R
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Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
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pub fn variant(&self) -> ACCMOD_A
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Get enumerated values variant
pub fn is_a(&self) -> bool
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Checks if the value of the field is A
pub fn is_b(&self) -> bool
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Checks if the value of the field is B
pub fn is_c(&self) -> bool
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Checks if the value of the field is C
pub fn is_d(&self) -> bool
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Checks if the value of the field is D
impl R<u32, Reg<u32, _BTR>>
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pub fn accmod(&self) -> ACCMOD_R
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Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
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Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
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Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
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Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
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Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
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Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
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Bits 0:3 - ADDSET
impl R<bool, CBURSTRW_A>
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pub fn variant(&self) -> CBURSTRW_A
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Get enumerated values variant
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
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pub fn variant(&self) -> ASYNCWAIT_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
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pub fn variant(&self) -> EXTMOD_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
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pub fn variant(&self) -> WAITEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
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pub fn variant(&self) -> WREN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
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pub fn variant(&self) -> WAITCFG_A
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Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
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Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
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Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
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pub fn variant(&self) -> WAITPOL_A
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Get enumerated values variant
pub fn is_active_low(&self) -> bool
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Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
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Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
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pub fn variant(&self) -> BURSTEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
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pub fn variant(&self) -> FACCEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
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pub fn variant(&self) -> Variant<u8, MWID_A>
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Get enumerated values variant
pub fn is_bits8(&self) -> bool
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Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
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Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
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Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
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pub fn variant(&self) -> Variant<u8, MTYP_A>
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Get enumerated values variant
pub fn is_sram(&self) -> bool
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Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
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Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
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Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
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pub fn variant(&self) -> MUXEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
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pub fn variant(&self) -> MBKEN_A
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Get enumerated values variant
pub fn is_disabled(&self) -> bool
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Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
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Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
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pub fn variant(&self) -> Variant<u8, CPSIZE_A>
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Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
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Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
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Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
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Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
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Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
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Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR>>
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pub fn cburstrw(&self) -> CBURSTRW_R
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Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
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Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
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Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
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Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
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Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
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Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
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Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
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Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
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Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
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Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
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Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
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Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
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Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
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Bit 0 - MBKEN
pub fn cpsize(&self) -> CPSIZE_R
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Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
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pub fn variant(&self) -> ACCMOD_A
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Get enumerated values variant
pub fn is_a(&self) -> bool
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Checks if the value of the field is A
pub fn is_b(&self) -> bool
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Checks if the value of the field is B
pub fn is_c(&self) -> bool
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Checks if the value of the field is C
pub fn is_d(&self) -> bool
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Checks if the value of the field is D
impl R<u32, Reg<u32, _BWTR>>
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pub fn accmod(&self) -> ACCMOD_R
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Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
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Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
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Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
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Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
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Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
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Bits 0:3 - ADDSET
pub fn busturn(&self) -> BUSTURN_R
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Bits 16:19 - Bus turnaround phase duration
impl R<bool, PDDS_A>
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pub fn variant(&self) -> PDDS_A
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Get enumerated values variant
pub fn is_stop_mode(&self) -> bool
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Checks if the value of the field is STOP_MODE
pub fn is_standby_mode(&self) -> bool
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Checks if the value of the field is STANDBY_MODE
impl R<u32, Reg<u32, _CR>>
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pub fn lpds(&self) -> LPDS_R
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Bit 0 - Low Power Deep Sleep
pub fn pdds(&self) -> PDDS_R
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Bit 1 - Power Down Deep Sleep
pub fn cwuf(&self) -> CWUF_R
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Bit 2 - Clear Wake-up Flag
pub fn csbf(&self) -> CSBF_R
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Bit 3 - Clear STANDBY Flag
pub fn pvde(&self) -> PVDE_R
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Bit 4 - Power Voltage Detector Enable
pub fn pls(&self) -> PLS_R
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Bits 5:7 - PVD Level Selection
pub fn dbp(&self) -> DBP_R
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Bit 8 - Disable Backup Domain write protection
impl R<u32, Reg<u32, _CSR>>
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pub fn wuf(&self) -> WUF_R
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Bit 0 - Wake-Up Flag
pub fn sbf(&self) -> SBF_R
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Bit 1 - STANDBY Flag
pub fn pvdo(&self) -> PVDO_R
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Bit 2 - PVD Output
pub fn ewup(&self) -> EWUP_R
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Bit 8 - Enable WKUP pin
impl R<bool, HSION_A>
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pub fn variant(&self) -> HSION_A
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Get enumerated values variant
pub fn is_off(&self) -> bool
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Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
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Checks if the value of the field is ON
impl R<bool, HSIRDY_A>
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pub fn variant(&self) -> HSIRDY_A
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Get enumerated values variant
pub fn is_not_ready(&self) -> bool
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Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
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Checks if the value of the field is READY
impl R<bool, HSEBYP_A>
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pub fn variant(&self) -> HSEBYP_A
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Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
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Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
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Checks if the value of the field is BYPASSED
impl R<bool, CSSON_A>
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pub fn variant(&self) -> CSSON_A
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Get enumerated values variant
pub fn is_off(&self) -> bool
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Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
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Checks if the value of the field is ON
impl R<u32, Reg<u32, _CR>>
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pub fn hsion(&self) -> HSION_R
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Bit 0 - Internal High Speed clock enable
pub fn hsirdy(&self) -> HSIRDY_R
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Bit 1 - Internal High Speed clock ready flag
pub fn hsitrim(&self) -> HSITRIM_R
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Bits 3:7 - Internal High Speed clock trimming
pub fn hsical(&self) -> HSICAL_R
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Bits 8:15 - Internal High Speed clock Calibration
pub fn hseon(&self) -> HSEON_R
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Bit 16 - External High Speed clock enable
pub fn hserdy(&self) -> HSERDY_R
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Bit 17 - External High Speed clock ready flag
pub fn hsebyp(&self) -> HSEBYP_R
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Bit 18 - External High Speed clock Bypass
pub fn csson(&self) -> CSSON_R
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Bit 19 - Clock Security System enable
pub fn pllon(&self) -> PLLON_R
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Bit 24 - PLL enable
pub fn pllrdy(&self) -> PLLRDY_R
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Bit 25 - PLL clock ready flag
impl R<u8, SW_A>
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pub fn variant(&self) -> Variant<u8, SW_A>
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Get enumerated values variant
pub fn is_hsi(&self) -> bool
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Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
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Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
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Checks if the value of the field is PLL
impl R<u8, SWS_A>
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pub fn variant(&self) -> Variant<u8, SWS_A>
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Get enumerated values variant
pub fn is_hsi(&self) -> bool
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Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
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Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
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Checks if the value of the field is PLL
impl R<u8, HPRE_A>
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pub fn variant(&self) -> Variant<u8, HPRE_A>
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Get enumerated values variant
pub fn is_div1(&self) -> bool
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Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
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Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
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Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
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Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
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Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
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Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
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Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
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Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
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Checks if the value of the field is DIV512
impl R<u8, PPRE1_A>
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pub fn variant(&self) -> Variant<u8, PPRE1_A>
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Get enumerated values variant
pub fn is_div1(&self) -> bool
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Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
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Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
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Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
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Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
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Checks if the value of the field is DIV16
impl R<u8, ADCPRE_A>
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pub fn variant(&self) -> ADCPRE_A
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Get enumerated values variant
pub fn is_div2(&self) -> bool
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Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
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Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool
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Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool
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Checks if the value of the field is DIV8
impl R<bool, PLLSRC_A>
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pub fn variant(&self) -> PLLSRC_A
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Get enumerated values variant
pub fn is_hsi_div2(&self) -> bool
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Checks if the value of the field is HSI_DIV2
pub fn is_hse_div_prediv(&self) -> bool
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Checks if the value of the field is HSE_DIV_PREDIV
impl R<bool, PLLXTPRE_A>
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pub fn variant(&self) -> PLLXTPRE_A
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Get enumerated values variant
pub fn is_div1(&self) -> bool
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Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
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Checks if the value of the field is DIV2
impl R<u8, PLLMUL_A>
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pub fn variant(&self) -> PLLMUL_A
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Get enumerated values variant
pub fn is_mul2(&self) -> bool
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Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool
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Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool
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Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool
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Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool
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Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool
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Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool
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Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
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Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool
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Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool
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Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool
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Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool
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Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool
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Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool
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Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool
[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool
[src]
Checks if the value of the field is MUL16X
impl R<u8, MCO_A>
[src]
pub fn variant(&self) -> Variant<u8, MCO_A>
[src]
Get enumerated values variant
pub fn is_no_mco(&self) -> bool
[src]
Checks if the value of the field is NOMCO
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn sw(&self) -> SW_R
[src]
Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
[src]
Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
[src]
Bits 4:7 - AHB prescaler
pub fn ppre1(&self) -> PPRE1_R
[src]
Bits 8:10 - APB Low speed prescaler (APB1)
pub fn ppre2(&self) -> PPRE2_R
[src]
Bits 11:13 - APB High speed prescaler (APB2)
pub fn adcpre(&self) -> ADCPRE_R
[src]
Bits 14:15 - ADC prescaler
pub fn pllsrc(&self) -> PLLSRC_R
[src]
Bit 16 - PLL entry clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
[src]
Bit 17 - HSE divider for PLL entry
pub fn pllmul(&self) -> PLLMUL_R
[src]
Bits 18:21 - PLL Multiplication Factor
pub fn mco(&self) -> MCO_R
[src]
Bits 24:26 - Microcontroller clock output
impl R<bool, LSIRDYF_A>
[src]
pub fn variant(&self) -> LSIRDYF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CSSF_A>
[src]
pub fn variant(&self) -> CSSF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LSIRDYIE_A>
[src]
pub fn variant(&self) -> LSIRDYIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CIR>>
[src]
pub fn lsirdyf(&self) -> LSIRDYF_R
[src]
Bit 0 - LSI Ready Interrupt flag
pub fn lserdyf(&self) -> LSERDYF_R
[src]
Bit 1 - LSE Ready Interrupt flag
pub fn hsirdyf(&self) -> HSIRDYF_R
[src]
Bit 2 - HSI Ready Interrupt flag
pub fn hserdyf(&self) -> HSERDYF_R
[src]
Bit 3 - HSE Ready Interrupt flag
pub fn pllrdyf(&self) -> PLLRDYF_R
[src]
Bit 4 - PLL Ready Interrupt flag
pub fn cssf(&self) -> CSSF_R
[src]
Bit 7 - Clock Security System Interrupt flag
pub fn lsirdyie(&self) -> LSIRDYIE_R
[src]
Bit 8 - LSI Ready Interrupt Enable
pub fn lserdyie(&self) -> LSERDYIE_R
[src]
Bit 9 - LSE Ready Interrupt Enable
pub fn hsirdyie(&self) -> HSIRDYIE_R
[src]
Bit 10 - HSI Ready Interrupt Enable
pub fn hserdyie(&self) -> HSERDYIE_R
[src]
Bit 11 - HSE Ready Interrupt Enable
pub fn pllrdyie(&self) -> PLLRDYIE_R
[src]
Bit 12 - PLL Ready Interrupt Enable
impl R<bool, AFIORST_A>
[src]
pub fn variant(&self) -> Variant<bool, AFIORST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RSTR>>
[src]
pub fn afiorst(&self) -> AFIORST_R
[src]
Bit 0 - Alternate function I/O reset
pub fn ioparst(&self) -> IOPARST_R
[src]
Bit 2 - IO port A reset
pub fn iopbrst(&self) -> IOPBRST_R
[src]
Bit 3 - IO port B reset
pub fn iopcrst(&self) -> IOPCRST_R
[src]
Bit 4 - IO port C reset
pub fn iopdrst(&self) -> IOPDRST_R
[src]
Bit 5 - IO port D reset
pub fn ioperst(&self) -> IOPERST_R
[src]
Bit 6 - IO port E reset
pub fn iopfrst(&self) -> IOPFRST_R
[src]
Bit 7 - IO port F reset
pub fn iopgrst(&self) -> IOPGRST_R
[src]
Bit 8 - IO port G reset
pub fn adc1rst(&self) -> ADC1RST_R
[src]
Bit 9 - ADC 1 interface reset
pub fn tim1rst(&self) -> TIM1RST_R
[src]
Bit 11 - TIM1 timer reset
pub fn spi1rst(&self) -> SPI1RST_R
[src]
Bit 12 - SPI 1 reset
pub fn usart1rst(&self) -> USART1RST_R
[src]
Bit 14 - USART1 reset
pub fn tim15rst(&self) -> TIM15RST_R
[src]
Bit 16 - TIM15 timer reset
pub fn tim16rst(&self) -> TIM16RST_R
[src]
Bit 17 - TIM16 timer reset
pub fn tim17rst(&self) -> TIM17RST_R
[src]
Bit 18 - TIM17 timer reset
impl R<bool, TIM2RST_A>
[src]
pub fn variant(&self) -> Variant<bool, TIM2RST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RSTR>>
[src]
pub fn tim2rst(&self) -> TIM2RST_R
[src]
Bit 0 - Timer 2 reset
pub fn tim3rst(&self) -> TIM3RST_R
[src]
Bit 1 - Timer 3 reset
pub fn tim4rst(&self) -> TIM4RST_R
[src]
Bit 2 - Timer 4 reset
pub fn tim5rst(&self) -> TIM5RST_R
[src]
Bit 3 - Timer 5 reset
pub fn tim6rst(&self) -> TIM6RST_R
[src]
Bit 4 - Timer 6 reset
pub fn tim7rst(&self) -> TIM7RST_R
[src]
Bit 5 - Timer 7 reset
pub fn tim12rst(&self) -> TIM12RST_R
[src]
Bit 6 - Timer 12 reset
pub fn tim13rst(&self) -> TIM13RST_R
[src]
Bit 7 - Timer 13 reset
pub fn tim14rst(&self) -> TIM14RST_R
[src]
Bit 8 - Timer 14 reset
pub fn wwdgrst(&self) -> WWDGRST_R
[src]
Bit 11 - Window watchdog reset
pub fn spi2rst(&self) -> SPI2RST_R
[src]
Bit 14 - SPI2 reset
pub fn spi3rst(&self) -> SPI3RST_R
[src]
Bit 15 - SPI3 reset
pub fn usart2rst(&self) -> USART2RST_R
[src]
Bit 17 - USART 2 reset
pub fn usart3rst(&self) -> USART3RST_R
[src]
Bit 18 - USART 3 reset
pub fn uart4rst(&self) -> UART4RST_R
[src]
Bit 19 - USART 4 reset
pub fn uart5rst(&self) -> UART5RST_R
[src]
Bit 20 - USART 5 reset
pub fn i2c1rst(&self) -> I2C1RST_R
[src]
Bit 21 - I2C1 reset
pub fn i2c2rst(&self) -> I2C2RST_R
[src]
Bit 22 - I2C2 reset
pub fn bkprst(&self) -> BKPRST_R
[src]
Bit 27 - Backup interface reset
pub fn pwrrst(&self) -> PWRRST_R
[src]
Bit 28 - Power interface reset
pub fn dacrst(&self) -> DACRST_R
[src]
Bit 29 - DAC interface reset
pub fn cecrst(&self) -> CECRST_R
[src]
Bit 30 - CEC reset
impl R<bool, DMA1EN_A>
[src]
pub fn variant(&self) -> DMA1EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBENR>>
[src]
pub fn dma1en(&self) -> DMA1EN_R
[src]
Bit 0 - DMA1 clock enable
pub fn dma2en(&self) -> DMA2EN_R
[src]
Bit 1 - DMA2 clock enable
pub fn sramen(&self) -> SRAMEN_R
[src]
Bit 2 - SRAM interface clock enable
pub fn flitfen(&self) -> FLITFEN_R
[src]
Bit 4 - FLITF clock enable
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 6 - CRC clock enable
pub fn fsmcen(&self) -> FSMCEN_R
[src]
Bit 8 - FSMC clock enable
impl R<bool, AFIOEN_A>
[src]
pub fn variant(&self) -> AFIOEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2ENR>>
[src]
pub fn afioen(&self) -> AFIOEN_R
[src]
Bit 0 - Alternate function I/O clock enable
pub fn iopaen(&self) -> IOPAEN_R
[src]
Bit 2 - I/O port A clock enable
pub fn iopben(&self) -> IOPBEN_R
[src]
Bit 3 - I/O port B clock enable
pub fn iopcen(&self) -> IOPCEN_R
[src]
Bit 4 - I/O port C clock enable
pub fn iopden(&self) -> IOPDEN_R
[src]
Bit 5 - I/O port D clock enable
pub fn iopeen(&self) -> IOPEEN_R
[src]
Bit 6 - I/O port E clock enable
pub fn iopfen(&self) -> IOPFEN_R
[src]
Bit 7 - I/O port F clock enable
pub fn iopgen(&self) -> IOPGEN_R
[src]
Bit 8 - I/O port G clock enable
pub fn adc1en(&self) -> ADC1EN_R
[src]
Bit 9 - ADC 1 interface clock enable
pub fn tim1en(&self) -> TIM1EN_R
[src]
Bit 11 - TIM1 Timer clock enable
pub fn spi1en(&self) -> SPI1EN_R
[src]
Bit 12 - SPI 1 clock enable
pub fn usart1en(&self) -> USART1EN_R
[src]
Bit 14 - USART1 clock enable
pub fn tim15en(&self) -> TIM15EN_R
[src]
Bit 16 - TIM15 Timer clock enable
pub fn tim16en(&self) -> TIM16EN_R
[src]
Bit 17 - TIM16 Timer clock enable
pub fn tim17en(&self) -> TIM17EN_R
[src]
Bit 18 - TIM17 Timer clock enable
impl R<bool, TIM2EN_A>
[src]
pub fn variant(&self) -> TIM2EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1ENR>>
[src]
pub fn tim2en(&self) -> TIM2EN_R
[src]
Bit 0 - Timer 2 clock enable
pub fn tim3en(&self) -> TIM3EN_R
[src]
Bit 1 - Timer 3 clock enable
pub fn tim4en(&self) -> TIM4EN_R
[src]
Bit 2 - Timer 4 clock enable
pub fn tim5en(&self) -> TIM5EN_R
[src]
Bit 3 - Timer 5 clock enable
pub fn tim6en(&self) -> TIM6EN_R
[src]
Bit 4 - Timer 6 clock enable
pub fn tim7en(&self) -> TIM7EN_R
[src]
Bit 5 - Timer 7 clock enable
pub fn tim12en(&self) -> TIM12EN_R
[src]
Bit 6 - Timer 12 clock enable
pub fn tim13en(&self) -> TIM13EN_R
[src]
Bit 7 - Timer 13 clock enable
pub fn tim14en(&self) -> TIM14EN_R
[src]
Bit 8 - Timer 14 clock enable
pub fn wwdgen(&self) -> WWDGEN_R
[src]
Bit 11 - Window watchdog clock enable
pub fn spi2en(&self) -> SPI2EN_R
[src]
Bit 14 - SPI 2 clock enable
pub fn spi3en(&self) -> SPI3EN_R
[src]
Bit 15 - SPI 3 clock enable
pub fn usart2en(&self) -> USART2EN_R
[src]
Bit 17 - USART 2 clock enable
pub fn usart3en(&self) -> USART3EN_R
[src]
Bit 18 - USART 3 clock enable
pub fn uart4en(&self) -> UART4EN_R
[src]
Bit 19 - UART 4 clock enable
pub fn uart5en(&self) -> UART5EN_R
[src]
Bit 20 - UART 5 clock enable
pub fn i2c1en(&self) -> I2C1EN_R
[src]
Bit 21 - I2C 1 clock enable
pub fn i2c2en(&self) -> I2C2EN_R
[src]
Bit 22 - I2C 2 clock enable
pub fn bkpen(&self) -> BKPEN_R
[src]
Bit 27 - Backup interface clock enable
pub fn pwren(&self) -> PWREN_R
[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R
[src]
Bit 29 - DAC interface clock enable
pub fn cecen(&self) -> CECEN_R
[src]
Bit 30 - CEC clock enable
impl R<bool, LSEON_A>
[src]
pub fn variant(&self) -> LSEON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSERDY_A>
[src]
pub fn variant(&self) -> LSERDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, LSEBYP_A>
[src]
pub fn variant(&self) -> LSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<u8, RTCSEL_A>
[src]
pub fn variant(&self) -> RTCSEL_A
[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool
[src]
Checks if the value of the field is NOCLOCK
pub fn is_lse(&self) -> bool
[src]
Checks if the value of the field is LSE
pub fn is_lsi(&self) -> bool
[src]
Checks if the value of the field is LSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
impl R<bool, RTCEN_A>
[src]
pub fn variant(&self) -> RTCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BDRST_A>
[src]
pub fn variant(&self) -> BDRST_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BDCR>>
[src]
pub fn lseon(&self) -> LSEON_R
[src]
Bit 0 - External Low Speed oscillator enable
pub fn lserdy(&self) -> LSERDY_R
[src]
Bit 1 - External Low Speed oscillator ready
pub fn lsebyp(&self) -> LSEBYP_R
[src]
Bit 2 - External Low Speed oscillator bypass
pub fn rtcsel(&self) -> RTCSEL_R
[src]
Bits 8:9 - RTC clock source selection
pub fn rtcen(&self) -> RTCEN_R
[src]
Bit 15 - RTC clock enable
pub fn bdrst(&self) -> BDRST_R
[src]
Bit 16 - Backup domain software reset
impl R<bool, LSION_A>
[src]
pub fn variant(&self) -> LSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSIRDY_A>
[src]
pub fn variant(&self) -> LSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, RMVF_A>
[src]
pub fn variant(&self) -> Variant<bool, RMVF_A>
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
impl R<bool, PINRSTF_A>
[src]
pub fn variant(&self) -> PINRSTF_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn lsion(&self) -> LSION_R
[src]
Bit 0 - Internal low speed oscillator enable
pub fn lsirdy(&self) -> LSIRDY_R
[src]
Bit 1 - Internal low speed oscillator ready
pub fn rmvf(&self) -> RMVF_R
[src]
Bit 24 - Remove reset flag
pub fn pinrstf(&self) -> PINRSTF_R
[src]
Bit 26 - PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R
[src]
Bit 27 - POR/PDR reset flag
pub fn sftrstf(&self) -> SFTRSTF_R
[src]
Bit 28 - Software reset flag
pub fn iwdgrstf(&self) -> IWDGRSTF_R
[src]
Bit 29 - Independent watchdog reset flag
pub fn wwdgrstf(&self) -> WWDGRSTF_R
[src]
Bit 30 - Window watchdog reset flag
pub fn lpwrrstf(&self) -> LPWRRSTF_R
[src]
Bit 31 - Low-power reset flag
impl R<u8, PREDIV1_A>
[src]
pub fn variant(&self) -> PREDIV1_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div3(&self) -> bool
[src]
Checks if the value of the field is DIV3
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div5(&self) -> bool
[src]
Checks if the value of the field is DIV5
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div7(&self) -> bool
[src]
Checks if the value of the field is DIV7
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div9(&self) -> bool
[src]
Checks if the value of the field is DIV9
pub fn is_div10(&self) -> bool
[src]
Checks if the value of the field is DIV10
pub fn is_div11(&self) -> bool
[src]
Checks if the value of the field is DIV11
pub fn is_div12(&self) -> bool
[src]
Checks if the value of the field is DIV12
pub fn is_div13(&self) -> bool
[src]
Checks if the value of the field is DIV13
pub fn is_div14(&self) -> bool
[src]
Checks if the value of the field is DIV14
pub fn is_div15(&self) -> bool
[src]
Checks if the value of the field is DIV15
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u32, Reg<u32, _CFGR2>>
[src]
impl R<u8, MODE0_A>
[src]
pub fn variant(&self) -> MODE0_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF0_A>
[src]
pub fn variant(&self) -> CNF0_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn mode0(&self) -> MODE0_R
[src]
Bits 0:1 - Port n.0 mode bits
pub fn cnf0(&self) -> CNF0_R
[src]
Bits 2:3 - Port n.0 configuration bits
pub fn mode1(&self) -> MODE1_R
[src]
Bits 4:5 - Port n.1 mode bits
pub fn cnf1(&self) -> CNF1_R
[src]
Bits 6:7 - Port n.1 configuration bits
pub fn mode2(&self) -> MODE2_R
[src]
Bits 8:9 - Port n.2 mode bits
pub fn cnf2(&self) -> CNF2_R
[src]
Bits 10:11 - Port n.2 configuration bits
pub fn mode3(&self) -> MODE3_R
[src]
Bits 12:13 - Port n.3 mode bits
pub fn cnf3(&self) -> CNF3_R
[src]
Bits 14:15 - Port n.3 configuration bits
pub fn mode4(&self) -> MODE4_R
[src]
Bits 16:17 - Port n.4 mode bits
pub fn cnf4(&self) -> CNF4_R
[src]
Bits 18:19 - Port n.4 configuration bits
pub fn mode5(&self) -> MODE5_R
[src]
Bits 20:21 - Port n.5 mode bits
pub fn cnf5(&self) -> CNF5_R
[src]
Bits 22:23 - Port n.5 configuration bits
pub fn mode6(&self) -> MODE6_R
[src]
Bits 24:25 - Port n.6 mode bits
pub fn cnf6(&self) -> CNF6_R
[src]
Bits 26:27 - Port n.6 configuration bits
pub fn mode7(&self) -> MODE7_R
[src]
Bits 28:29 - Port n.7 mode bits
pub fn cnf7(&self) -> CNF7_R
[src]
Bits 30:31 - Port n.7 configuration bits
impl R<u8, MODE8_A>
[src]
pub fn variant(&self) -> MODE8_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF8_A>
[src]
pub fn variant(&self) -> CNF8_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn mode8(&self) -> MODE8_R
[src]
Bits 0:1 - Port n.8 mode bits
pub fn cnf8(&self) -> CNF8_R
[src]
Bits 2:3 - Port n.8 configuration bits
pub fn mode9(&self) -> MODE9_R
[src]
Bits 4:5 - Port n.9 mode bits
pub fn cnf9(&self) -> CNF9_R
[src]
Bits 6:7 - Port n.9 configuration bits
pub fn mode10(&self) -> MODE10_R
[src]
Bits 8:9 - Port n.10 mode bits
pub fn cnf10(&self) -> CNF10_R
[src]
Bits 10:11 - Port n.10 configuration bits
pub fn mode11(&self) -> MODE11_R
[src]
Bits 12:13 - Port n.11 mode bits
pub fn cnf11(&self) -> CNF11_R
[src]
Bits 14:15 - Port n.11 configuration bits
pub fn mode12(&self) -> MODE12_R
[src]
Bits 16:17 - Port n.12 mode bits
pub fn cnf12(&self) -> CNF12_R
[src]
Bits 18:19 - Port n.12 configuration bits
pub fn mode13(&self) -> MODE13_R
[src]
Bits 20:21 - Port n.13 mode bits
pub fn cnf13(&self) -> CNF13_R
[src]
Bits 22:23 - Port n.13 configuration bits
pub fn mode14(&self) -> MODE14_R
[src]
Bits 24:25 - Port n.14 mode bits
pub fn cnf14(&self) -> CNF14_R
[src]
Bits 26:27 - Port n.14 configuration bits
pub fn mode15(&self) -> MODE15_R
[src]
Bits 28:29 - Port n.15 mode bits
pub fn cnf15(&self) -> CNF15_R
[src]
Bits 30:31 - Port n.15 configuration bits
impl R<bool, IDR0_A>
[src]
pub fn variant(&self) -> IDR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _IDR>>
[src]
pub fn idr0(&self) -> IDR0_R
[src]
Bit 0 - Port input data
pub fn idr1(&self) -> IDR1_R
[src]
Bit 1 - Port input data
pub fn idr2(&self) -> IDR2_R
[src]
Bit 2 - Port input data
pub fn idr3(&self) -> IDR3_R
[src]
Bit 3 - Port input data
pub fn idr4(&self) -> IDR4_R
[src]
Bit 4 - Port input data
pub fn idr5(&self) -> IDR5_R
[src]
Bit 5 - Port input data
pub fn idr6(&self) -> IDR6_R
[src]
Bit 6 - Port input data
pub fn idr7(&self) -> IDR7_R
[src]
Bit 7 - Port input data
pub fn idr8(&self) -> IDR8_R
[src]
Bit 8 - Port input data
pub fn idr9(&self) -> IDR9_R
[src]
Bit 9 - Port input data
pub fn idr10(&self) -> IDR10_R
[src]
Bit 10 - Port input data
pub fn idr11(&self) -> IDR11_R
[src]
Bit 11 - Port input data
pub fn idr12(&self) -> IDR12_R
[src]
Bit 12 - Port input data
pub fn idr13(&self) -> IDR13_R
[src]
Bit 13 - Port input data
pub fn idr14(&self) -> IDR14_R
[src]
Bit 14 - Port input data
pub fn idr15(&self) -> IDR15_R
[src]
Bit 15 - Port input data
impl R<bool, ODR0_A>
[src]
pub fn variant(&self) -> ODR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _ODR>>
[src]
pub fn odr0(&self) -> ODR0_R
[src]
Bit 0 - Port output data
pub fn odr1(&self) -> ODR1_R
[src]
Bit 1 - Port output data
pub fn odr2(&self) -> ODR2_R
[src]
Bit 2 - Port output data
pub fn odr3(&self) -> ODR3_R
[src]
Bit 3 - Port output data
pub fn odr4(&self) -> ODR4_R
[src]
Bit 4 - Port output data
pub fn odr5(&self) -> ODR5_R
[src]
Bit 5 - Port output data
pub fn odr6(&self) -> ODR6_R
[src]
Bit 6 - Port output data
pub fn odr7(&self) -> ODR7_R
[src]
Bit 7 - Port output data
pub fn odr8(&self) -> ODR8_R
[src]
Bit 8 - Port output data
pub fn odr9(&self) -> ODR9_R
[src]
Bit 9 - Port output data
pub fn odr10(&self) -> ODR10_R
[src]
Bit 10 - Port output data
pub fn odr11(&self) -> ODR11_R
[src]
Bit 11 - Port output data
pub fn odr12(&self) -> ODR12_R
[src]
Bit 12 - Port output data
pub fn odr13(&self) -> ODR13_R
[src]
Bit 13 - Port output data
pub fn odr14(&self) -> ODR14_R
[src]
Bit 14 - Port output data
pub fn odr15(&self) -> ODR15_R
[src]
Bit 15 - Port output data
impl R<bool, LCK0_A>
[src]
pub fn variant(&self) -> LCK0_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCK10_A>
[src]
pub fn variant(&self) -> LCK10_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCKK_A>
[src]
pub fn variant(&self) -> LCKK_A
[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool
[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _LCKR>>
[src]
pub fn lck0(&self) -> LCK0_R
[src]
Bit 0 - Port A Lock bit 0
pub fn lck1(&self) -> LCK1_R
[src]
Bit 1 - Port A Lock bit 1
pub fn lck2(&self) -> LCK2_R
[src]
Bit 2 - Port A Lock bit 2
pub fn lck3(&self) -> LCK3_R
[src]
Bit 3 - Port A Lock bit 3
pub fn lck4(&self) -> LCK4_R
[src]
Bit 4 - Port A Lock bit 4
pub fn lck5(&self) -> LCK5_R
[src]
Bit 5 - Port A Lock bit 5
pub fn lck6(&self) -> LCK6_R
[src]
Bit 6 - Port A Lock bit 6
pub fn lck7(&self) -> LCK7_R
[src]
Bit 7 - Port A Lock bit 7
pub fn lck8(&self) -> LCK8_R
[src]
Bit 8 - Port A Lock bit 8
pub fn lck9(&self) -> LCK9_R
[src]
Bit 9 - Port A Lock bit 9
pub fn lck10(&self) -> LCK10_R
[src]
Bit 10 - Port A Lock bit 10
pub fn lck11(&self) -> LCK11_R
[src]
Bit 11 - Port A Lock bit 11
pub fn lck12(&self) -> LCK12_R
[src]
Bit 12 - Port A Lock bit 12
pub fn lck13(&self) -> LCK13_R
[src]
Bit 13 - Port A Lock bit 13
pub fn lck14(&self) -> LCK14_R
[src]
Bit 14 - Port A Lock bit 14
pub fn lck15(&self) -> LCK15_R
[src]
Bit 15 - Port A Lock bit 15
pub fn lckk(&self) -> LCKK_R
[src]
Bit 16 - Lock key
impl R<u32, Reg<u32, _EVCR>>
[src]
pub fn pin(&self) -> PIN_R
[src]
Bits 0:3 - Pin selection
pub fn port(&self) -> PORT_R
[src]
Bits 4:6 - Port selection
pub fn evoe(&self) -> EVOE_R
[src]
Bit 7 - Event Output Enable
impl R<u32, Reg<u32, _MAPR>>
[src]
pub fn spi1_remap(&self) -> SPI1_REMAP_R
[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAP_R
[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAP_R
[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAP_R
[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAP_R
[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAP_R
[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAP_R
[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAP_R
[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAP_R
[src]
Bit 12 - TIM4 remapping
pub fn pd01_remap(&self) -> PD01_REMAP_R
[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R
[src]
Bit 16 - Set and cleared by software
impl R<u32, Reg<u32, _EXTICR1>>
[src]
pub fn exti0(&self) -> EXTI0_R
[src]
Bits 0:3 - EXTI0 configuration
pub fn exti1(&self) -> EXTI1_R
[src]
Bits 4:7 - EXTI1 configuration
pub fn exti2(&self) -> EXTI2_R
[src]
Bits 8:11 - EXTI2 configuration
pub fn exti3(&self) -> EXTI3_R
[src]
Bits 12:15 - EXTI3 configuration
impl R<u32, Reg<u32, _EXTICR2>>
[src]
pub fn exti4(&self) -> EXTI4_R
[src]
Bits 0:3 - EXTI4 configuration
pub fn exti5(&self) -> EXTI5_R
[src]
Bits 4:7 - EXTI5 configuration
pub fn exti6(&self) -> EXTI6_R
[src]
Bits 8:11 - EXTI6 configuration
pub fn exti7(&self) -> EXTI7_R
[src]
Bits 12:15 - EXTI7 configuration
impl R<u32, Reg<u32, _EXTICR3>>
[src]
pub fn exti8(&self) -> EXTI8_R
[src]
Bits 0:3 - EXTI8 configuration
pub fn exti9(&self) -> EXTI9_R
[src]
Bits 4:7 - EXTI9 configuration
pub fn exti10(&self) -> EXTI10_R
[src]
Bits 8:11 - EXTI10 configuration
pub fn exti11(&self) -> EXTI11_R
[src]
Bits 12:15 - EXTI11 configuration
impl R<u32, Reg<u32, _EXTICR4>>
[src]
pub fn exti12(&self) -> EXTI12_R
[src]
Bits 0:3 - EXTI12 configuration
pub fn exti13(&self) -> EXTI13_R
[src]
Bits 4:7 - EXTI13 configuration
pub fn exti14(&self) -> EXTI14_R
[src]
Bits 8:11 - EXTI14 configuration
pub fn exti15(&self) -> EXTI15_R
[src]
Bits 12:15 - EXTI15 configuration
impl R<u32, Reg<u32, _MAPR2>>
[src]
pub fn tim15_remap(&self) -> TIM15_REMAP_R
[src]
Bit 0 - TIM15 remapping
pub fn tim16_remap(&self) -> TIM16_REMAP_R
[src]
Bit 1 - TIM16 remapping
pub fn tim17_remap(&self) -> TIM17_REMAP_R
[src]
Bit 2 - TIM17 remapping
pub fn tim13_remap(&self) -> TIM13_REMAP_R
[src]
Bit 8 - TIM13 remapping
pub fn tim14_remap(&self) -> TIM14_REMAP_R
[src]
Bit 9 - TIM14 remapping
pub fn fsmc_nadv(&self) -> FSMC_NADV_R
[src]
Bit 10 - NADV connect/disconnect
pub fn cec_remap(&self) -> CEC_REMAP_R
[src]
Bit 3 - CEC remapping
pub fn tim1_dma_remap(&self) -> TIM1_DMA_REMAP_R
[src]
Bit 4 - TIM1 DMA remapping
pub fn tim67_dac_dma_remap(&self) -> TIM67_DAC_DMA_REMAP_R
[src]
Bit 11 - TIM67_DAC DMA remapping
pub fn tim12_remap(&self) -> TIM12_REMAP_R
[src]
Bit 12 - TIM12 remapping
pub fn misc_remap(&self) -> MISC_REMAP_R
[src]
Bit 13 - Miscellaneous features remapping
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _IMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Interrupt Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Interrupt Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Interrupt Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Interrupt Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Interrupt Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Interrupt Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Interrupt Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Interrupt Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Interrupt Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Interrupt Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Interrupt Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Interrupt Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Interrupt Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Interrupt Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Interrupt Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Interrupt Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Interrupt Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Interrupt Mask on line 17
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Event Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Event Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Event Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Event Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Event Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Event Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Event Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Event Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Event Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Event Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Event Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Event Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Event Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Event Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Event Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Event Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Event Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Event Mask on line 17
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Rising trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Rising trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Rising trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Rising trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Rising trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Rising trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Rising trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Rising trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Rising trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Rising trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Rising trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Rising trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Rising trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Rising trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Rising trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Rising trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Rising trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Rising trigger event configuration of line 17
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Falling trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Falling trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Falling trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Falling trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Falling trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Falling trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Falling trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Falling trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Falling trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Falling trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Falling trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Falling trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Falling trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Falling trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Falling trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Falling trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Falling trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Falling trigger event configuration of line 17
impl R<bool, SWIER0_A>
[src]
pub fn variant(&self) -> Variant<bool, SWIER0_A>
[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool
[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIER>>
[src]
pub fn swier0(&self) -> SWIER0_R
[src]
Bit 0 - Software Interrupt on line 0
pub fn swier1(&self) -> SWIER1_R
[src]
Bit 1 - Software Interrupt on line 1
pub fn swier2(&self) -> SWIER2_R
[src]
Bit 2 - Software Interrupt on line 2
pub fn swier3(&self) -> SWIER3_R
[src]
Bit 3 - Software Interrupt on line 3
pub fn swier4(&self) -> SWIER4_R
[src]
Bit 4 - Software Interrupt on line 4
pub fn swier5(&self) -> SWIER5_R
[src]
Bit 5 - Software Interrupt on line 5
pub fn swier6(&self) -> SWIER6_R
[src]
Bit 6 - Software Interrupt on line 6
pub fn swier7(&self) -> SWIER7_R
[src]
Bit 7 - Software Interrupt on line 7
pub fn swier8(&self) -> SWIER8_R
[src]
Bit 8 - Software Interrupt on line 8
pub fn swier9(&self) -> SWIER9_R
[src]
Bit 9 - Software Interrupt on line 9
pub fn swier10(&self) -> SWIER10_R
[src]
Bit 10 - Software Interrupt on line 10
pub fn swier11(&self) -> SWIER11_R
[src]
Bit 11 - Software Interrupt on line 11
pub fn swier12(&self) -> SWIER12_R
[src]
Bit 12 - Software Interrupt on line 12
pub fn swier13(&self) -> SWIER13_R
[src]
Bit 13 - Software Interrupt on line 13
pub fn swier14(&self) -> SWIER14_R
[src]
Bit 14 - Software Interrupt on line 14
pub fn swier15(&self) -> SWIER15_R
[src]
Bit 15 - Software Interrupt on line 15
pub fn swier16(&self) -> SWIER16_R
[src]
Bit 16 - Software Interrupt on line 16
pub fn swier17(&self) -> SWIER17_R
[src]
Bit 17 - Software Interrupt on line 17
impl R<bool, PR0_A>
[src]
pub fn variant(&self) -> PR0_A
[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool
[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PR>>
[src]
pub fn pr0(&self) -> PR0_R
[src]
Bit 0 - Pending bit 0
pub fn pr1(&self) -> PR1_R
[src]
Bit 1 - Pending bit 1
pub fn pr2(&self) -> PR2_R
[src]
Bit 2 - Pending bit 2
pub fn pr3(&self) -> PR3_R
[src]
Bit 3 - Pending bit 3
pub fn pr4(&self) -> PR4_R
[src]
Bit 4 - Pending bit 4
pub fn pr5(&self) -> PR5_R
[src]
Bit 5 - Pending bit 5
pub fn pr6(&self) -> PR6_R
[src]
Bit 6 - Pending bit 6
pub fn pr7(&self) -> PR7_R
[src]
Bit 7 - Pending bit 7
pub fn pr8(&self) -> PR8_R
[src]
Bit 8 - Pending bit 8
pub fn pr9(&self) -> PR9_R
[src]
Bit 9 - Pending bit 9
pub fn pr10(&self) -> PR10_R
[src]
Bit 10 - Pending bit 10
pub fn pr11(&self) -> PR11_R
[src]
Bit 11 - Pending bit 11
pub fn pr12(&self) -> PR12_R
[src]
Bit 12 - Pending bit 12
pub fn pr13(&self) -> PR13_R
[src]
Bit 13 - Pending bit 13
pub fn pr14(&self) -> PR14_R
[src]
Bit 14 - Pending bit 14
pub fn pr15(&self) -> PR15_R
[src]
Bit 15 - Pending bit 15
pub fn pr16(&self) -> PR16_R
[src]
Bit 16 - Pending bit 16
pub fn pr17(&self) -> PR17_R
[src]
Bit 17 - Pending bit 17
impl R<bool, EN_A>
[src]
pub fn variant(&self) -> EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HTIE_A>
[src]
pub fn variant(&self) -> HTIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TEIE_A>
[src]
pub fn variant(&self) -> TEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool
[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool
[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CIRC_A>
[src]
pub fn variant(&self) -> CIRC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PINC_A>
[src]
pub fn variant(&self) -> PINC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, PSIZE_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, PL_A>
[src]
pub fn variant(&self) -> PL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool
[src]
Checks if the value of the field is VERYHIGH
impl R<bool, MEM2MEM_A>
[src]
pub fn variant(&self) -> MEM2MEM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en(&self) -> EN_R
[src]
Bit 0 - Channel enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 1 - Transfer complete interrupt enable
pub fn htie(&self) -> HTIE_R
[src]
Bit 2 - Half Transfer interrupt enable
pub fn teie(&self) -> TEIE_R
[src]
Bit 3 - Transfer error interrupt enable
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Data transfer direction
pub fn circ(&self) -> CIRC_R
[src]
Bit 5 - Circular mode
pub fn pinc(&self) -> PINC_R
[src]
Bit 6 - Peripheral increment mode
pub fn minc(&self) -> MINC_R
[src]
Bit 7 - Memory increment mode
pub fn psize(&self) -> PSIZE_R
[src]
Bits 8:9 - Peripheral size
pub fn msize(&self) -> MSIZE_R
[src]
Bits 10:11 - Memory size
pub fn pl(&self) -> PL_R
[src]
Bits 12:13 - Channel Priority level
pub fn mem2mem(&self) -> MEM2MEM_R
[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _NDTR>>
[src]
impl R<u32, Reg<u32, _PAR>>
[src]
impl R<u32, Reg<u32, _MAR>>
[src]
impl R<bool, GIF1_A>
[src]
pub fn variant(&self) -> GIF1_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<bool, TCIF1_A>
[src]
pub fn variant(&self) -> TCIF1_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTIF1_A>
[src]
pub fn variant(&self) -> HTIF1_A
[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool
[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
impl R<bool, TEIF1_A>
[src]
pub fn variant(&self) -> TEIF1_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _ISR>>
[src]
pub fn gif1(&self) -> GIF1_R
[src]
Bit 0 - Channel 1 Global interrupt flag
pub fn tcif1(&self) -> TCIF1_R
[src]
Bit 1 - Channel 1 Transfer Complete flag
pub fn htif1(&self) -> HTIF1_R
[src]
Bit 2 - Channel 1 Half Transfer Complete flag
pub fn teif1(&self) -> TEIF1_R
[src]
Bit 3 - Channel 1 Transfer Error flag
pub fn gif2(&self) -> GIF2_R
[src]
Bit 4 - Channel 2 Global interrupt flag
pub fn tcif2(&self) -> TCIF2_R
[src]
Bit 5 - Channel 2 Transfer Complete flag
pub fn htif2(&self) -> HTIF2_R
[src]
Bit 6 - Channel 2 Half Transfer Complete flag
pub fn teif2(&self) -> TEIF2_R
[src]
Bit 7 - Channel 2 Transfer Error flag
pub fn gif3(&self) -> GIF3_R
[src]
Bit 8 - Channel 3 Global interrupt flag
pub fn tcif3(&self) -> TCIF3_R
[src]
Bit 9 - Channel 3 Transfer Complete flag
pub fn htif3(&self) -> HTIF3_R
[src]
Bit 10 - Channel 3 Half Transfer Complete flag
pub fn teif3(&self) -> TEIF3_R
[src]
Bit 11 - Channel 3 Transfer Error flag
pub fn gif4(&self) -> GIF4_R
[src]
Bit 12 - Channel 4 Global interrupt flag
pub fn tcif4(&self) -> TCIF4_R
[src]
Bit 13 - Channel 4 Transfer Complete flag
pub fn htif4(&self) -> HTIF4_R
[src]
Bit 14 - Channel 4 Half Transfer Complete flag
pub fn teif4(&self) -> TEIF4_R
[src]
Bit 15 - Channel 4 Transfer Error flag
pub fn gif5(&self) -> GIF5_R
[src]
Bit 16 - Channel 5 Global interrupt flag
pub fn tcif5(&self) -> TCIF5_R
[src]
Bit 17 - Channel 5 Transfer Complete flag
pub fn htif5(&self) -> HTIF5_R
[src]
Bit 18 - Channel 5 Half Transfer Complete flag
pub fn teif5(&self) -> TEIF5_R
[src]
Bit 19 - Channel 5 Transfer Error flag
pub fn gif6(&self) -> GIF6_R
[src]
Bit 20 - Channel 6 Global interrupt flag
pub fn tcif6(&self) -> TCIF6_R
[src]
Bit 21 - Channel 6 Transfer Complete flag
pub fn htif6(&self) -> HTIF6_R
[src]
Bit 22 - Channel 6 Half Transfer Complete flag
pub fn teif6(&self) -> TEIF6_R
[src]
Bit 23 - Channel 6 Transfer Error flag
pub fn gif7(&self) -> GIF7_R
[src]
Bit 24 - Channel 7 Global interrupt flag
pub fn tcif7(&self) -> TCIF7_R
[src]
Bit 25 - Channel 7 Transfer Complete flag
pub fn htif7(&self) -> HTIF7_R
[src]
Bit 26 - Channel 7 Half Transfer Complete flag
pub fn teif7(&self) -> TEIF7_R
[src]
Bit 27 - Channel 7 Transfer Error flag
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn secie(&self) -> SECIE_R
[src]
Bit 0 - Second interrupt Enable
pub fn alrie(&self) -> ALRIE_R
[src]
Bit 1 - Alarm interrupt Enable
pub fn owie(&self) -> OWIE_R
[src]
Bit 2 - Overflow interrupt Enable
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn secf(&self) -> SECF_R
[src]
Bit 0 - Second Flag
pub fn alrf(&self) -> ALRF_R
[src]
Bit 1 - Alarm Flag
pub fn owf(&self) -> OWF_R
[src]
Bit 2 - Overflow Flag
pub fn rsf(&self) -> RSF_R
[src]
Bit 3 - Registers Synchronized Flag
pub fn cnf(&self) -> CNF_R
[src]
Bit 4 - Configuration Flag
pub fn rtoff(&self) -> RTOFF_R
[src]
Bit 5 - RTC operation OFF
impl R<u32, Reg<u32, _DIVH>>
[src]
impl R<u32, Reg<u32, _DIVL>>
[src]
impl R<u32, Reg<u32, _CNTH>>
[src]
impl R<u32, Reg<u32, _CNTL>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BKP_DR>>
[src]
impl R<bool, ASOE_A>
[src]
pub fn variant(&self) -> ASOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ASOS_A>
[src]
pub fn variant(&self) -> ASOS_A
[src]
Get enumerated values variant
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<u32, Reg<u32, _RTCCR>>
[src]
pub fn cal(&self) -> CAL_R
[src]
Bits 0:6 - Calibration value
pub fn cco(&self) -> CCO_R
[src]
Bit 7 - Calibration Clock Output
pub fn asoe(&self) -> ASOE_R
[src]
Bit 8 - Alarm or second output enable
pub fn asos(&self) -> ASOS_R
[src]
Bit 9 - Alarm or second output selection
impl R<bool, TPE_A>
[src]
pub fn variant(&self) -> TPE_A
[src]
Get enumerated values variant
pub fn is_general(&self) -> bool
[src]
Checks if the value of the field is GENERAL
pub fn is_alternate(&self) -> bool
[src]
Checks if the value of the field is ALTERNATE
impl R<bool, TPAL_A>
[src]
pub fn variant(&self) -> TPAL_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CR>>
[src]
pub fn tpe(&self) -> TPE_R
[src]
Bit 0 - Tamper pin enable
pub fn tpal(&self) -> TPAL_R
[src]
Bit 1 - Tamper pin active level
impl R<bool, TPIE_A>
[src]
pub fn variant(&self) -> TPIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tpie(&self) -> TPIE_R
[src]
Bit 2 - Tamper Pin interrupt enable
pub fn tef(&self) -> TEF_R
[src]
Bit 8 - Tamper Event Flag
pub fn tif(&self) -> TIF_R
[src]
Bit 9 - Tamper Interrupt Flag
impl R<u8, PR_A>
[src]
pub fn variant(&self) -> PR_A
[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PR>>
[src]
impl R<u32, Reg<u32, _RLR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pvu(&self) -> PVU_R
[src]
Bit 0 - Watchdog prescaler value update
pub fn rvu(&self) -> RVU_R
[src]
Bit 1 - Watchdog counter reload value update
impl R<bool, WDGA_A>
[src]
pub fn variant(&self) -> WDGA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn t(&self) -> T_R
[src]
Bits 0:6 - 7-bit counter (MSB to LSB)
pub fn wdga(&self) -> WDGA_R
[src]
Bit 7 - Activation bit
impl R<bool, EWI_A>
[src]
pub fn variant(&self) -> Variant<bool, EWI_A>
[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
impl R<u8, WDGTB_A>
[src]
pub fn variant(&self) -> WDGTB_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFR>>
[src]
pub fn w(&self) -> W_R
[src]
Bits 0:6 - 7-bit window value
pub fn ewi(&self) -> EWI_R
[src]
Bit 9 - Early Wakeup Interrupt
pub fn wdgtb(&self) -> WDGTB_R
[src]
Bits 7:8 - Timer Base
impl R<bool, EWIF_A>
[src]
pub fn variant(&self) -> EWIF_A
[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1IE_A>
[src]
pub fn variant(&self) -> CC1IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1DE_A>
[src]
pub fn variant(&self) -> CC1DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 15:18 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 15:18 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
pub fn occs(&self) -> OCCS_R
[src]
Bit 3 - OCREF clear selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:14 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> Variant<u8, MMS_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<bool, SWRST_A>
[src]
pub fn variant(&self) -> SWRST_A
[src]
Get enumerated values variant
pub fn is_not_reset(&self) -> bool
[src]
Checks if the value of the field is NOTRESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, ALERT_A>
[src]
pub fn variant(&self) -> ALERT_A
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
pub fn is_drive(&self) -> bool
[src]
Checks if the value of the field is DRIVE
impl R<bool, PEC_A>
[src]
pub fn variant(&self) -> PEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, POS_A>
[src]
pub fn variant(&self) -> POS_A
[src]
Get enumerated values variant
pub fn is_current(&self) -> bool
[src]
Checks if the value of the field is CURRENT
pub fn is_next(&self) -> bool
[src]
Checks if the value of the field is NEXT
impl R<bool, ACK_A>
[src]
pub fn variant(&self) -> ACK_A
[src]
Get enumerated values variant
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
impl R<bool, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, START_A>
[src]
pub fn variant(&self) -> START_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<bool, NOSTRETCH_A>
[src]
pub fn variant(&self) -> NOSTRETCH_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ENGC_A>
[src]
pub fn variant(&self) -> ENGC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENPEC_A>
[src]
pub fn variant(&self) -> ENPEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENARP_A>
[src]
pub fn variant(&self) -> ENARP_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SMBTYPE_A>
[src]
pub fn variant(&self) -> SMBTYPE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<bool, SMBUS_A>
[src]
pub fn variant(&self) -> SMBUS_A
[src]
Get enumerated values variant
pub fn is_i2c(&self) -> bool
[src]
Checks if the value of the field is I2C
pub fn is_smbus(&self) -> bool
[src]
Checks if the value of the field is SMBUS
impl R<bool, PE_A>
[src]
pub fn variant(&self) -> PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 15 - Software reset
pub fn alert(&self) -> ALERT_R
[src]
Bit 13 - SMBus alert
pub fn pec(&self) -> PEC_R
[src]
Bit 12 - Packet error checking
pub fn pos(&self) -> POS_R
[src]
Bit 11 - Acknowledge/PEC Position (for data reception)
pub fn ack(&self) -> ACK_R
[src]
Bit 10 - Acknowledge enable
pub fn stop(&self) -> STOP_R
[src]
Bit 9 - Stop generation
pub fn start(&self) -> START_R
[src]
Bit 8 - Start generation
pub fn nostretch(&self) -> NOSTRETCH_R
[src]
Bit 7 - Clock stretching disable (Slave mode)
pub fn engc(&self) -> ENGC_R
[src]
Bit 6 - General call enable
pub fn enpec(&self) -> ENPEC_R
[src]
Bit 5 - PEC enable
pub fn enarp(&self) -> ENARP_R
[src]
Bit 4 - ARP enable
pub fn smbtype(&self) -> SMBTYPE_R
[src]
Bit 3 - SMBus type
pub fn smbus(&self) -> SMBUS_R
[src]
Bit 1 - SMBus mode
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
impl R<bool, LAST_A>
[src]
pub fn variant(&self) -> LAST_A
[src]
Get enumerated values variant
pub fn is_not_last(&self) -> bool
[src]
Checks if the value of the field is NOTLAST
pub fn is_last(&self) -> bool
[src]
Checks if the value of the field is LAST
impl R<bool, DMAEN_A>
[src]
pub fn variant(&self) -> DMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITBUFEN_A>
[src]
pub fn variant(&self) -> ITBUFEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITEVTEN_A>
[src]
pub fn variant(&self) -> ITEVTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITERREN_A>
[src]
pub fn variant(&self) -> ITERREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn last(&self) -> LAST_R
[src]
Bit 12 - DMA last transfer
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 11 - DMA requests enable
pub fn itbufen(&self) -> ITBUFEN_R
[src]
Bit 10 - Buffer interrupt enable
pub fn itevten(&self) -> ITEVTEN_R
[src]
Bit 9 - Event interrupt enable
pub fn iterren(&self) -> ITERREN_R
[src]
Bit 8 - Error interrupt enable
pub fn freq(&self) -> FREQ_R
[src]
Bits 0:5 - Peripheral clock frequency
impl R<bool, ADDMODE_A>
[src]
pub fn variant(&self) -> ADDMODE_A
[src]
Get enumerated values variant
pub fn is_add7(&self) -> bool
[src]
Checks if the value of the field is ADD7
pub fn is_add10(&self) -> bool
[src]
Checks if the value of the field is ADD10
impl R<u32, Reg<u32, _OAR1>>
[src]
pub fn addmode(&self) -> ADDMODE_R
[src]
Bit 15 - Addressing mode (slave mode)
pub fn add(&self) -> ADD_R
[src]
Bits 0:9 - Interface address
impl R<bool, ENDUAL_A>
[src]
pub fn variant(&self) -> ENDUAL_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u32, Reg<u32, _OAR2>>
[src]
pub fn add2(&self) -> ADD2_R
[src]
Bits 1:7 - Interface address
pub fn endual(&self) -> ENDUAL_R
[src]
Bit 0 - Dual addressing mode enable
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, SMBALERT_A>
[src]
pub fn variant(&self) -> SMBALERT_A
[src]
Get enumerated values variant
pub fn is_no_alert(&self) -> bool
[src]
Checks if the value of the field is NOALERT
pub fn is_alert(&self) -> bool
[src]
Checks if the value of the field is ALERT
impl R<bool, TIMEOUT_A>
[src]
pub fn variant(&self) -> TIMEOUT_A
[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool
[src]
Checks if the value of the field is NOTIMEOUT
pub fn is_timeout(&self) -> bool
[src]
Checks if the value of the field is TIMEOUT
impl R<bool, PECERR_A>
[src]
pub fn variant(&self) -> PECERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, AF_A>
[src]
pub fn variant(&self) -> AF_A
[src]
Get enumerated values variant
pub fn is_no_failure(&self) -> bool
[src]
Checks if the value of the field is NOFAILURE
pub fn is_failure(&self) -> bool
[src]
Checks if the value of the field is FAILURE
impl R<bool, ARLO_A>
[src]
pub fn variant(&self) -> ARLO_A
[src]
Get enumerated values variant
pub fn is_no_lost(&self) -> bool
[src]
Checks if the value of the field is NOLOST
pub fn is_lost(&self) -> bool
[src]
Checks if the value of the field is LOST
impl R<bool, BERR_A>
[src]
pub fn variant(&self) -> BERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<bool, STOPF_A>
[src]
pub fn variant(&self) -> STOPF_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, BTF_A>
[src]
pub fn variant(&self) -> BTF_A
[src]
Get enumerated values variant
pub fn is_not_finished(&self) -> bool
[src]
Checks if the value of the field is NOTFINISHED
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<bool, ADDR_A>
[src]
pub fn variant(&self) -> ADDR_A
[src]
Get enumerated values variant
pub fn is_not_match(&self) -> bool
[src]
Checks if the value of the field is NOTMATCH
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, SB_A>
[src]
pub fn variant(&self) -> SB_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<u32, Reg<u32, _SR1>>
[src]
pub fn smbalert(&self) -> SMBALERT_R
[src]
Bit 15 - SMBus alert
pub fn timeout(&self) -> TIMEOUT_R
[src]
Bit 14 - Timeout or Tlow error
pub fn pecerr(&self) -> PECERR_R
[src]
Bit 12 - PEC Error in reception
pub fn ovr(&self) -> OVR_R
[src]
Bit 11 - Overrun/Underrun
pub fn af(&self) -> AF_R
[src]
Bit 10 - Acknowledge failure
pub fn arlo(&self) -> ARLO_R
[src]
Bit 9 - Arbitration lost (master mode)
pub fn berr(&self) -> BERR_R
[src]
Bit 8 - Bus error
pub fn tx_e(&self) -> TXE_R
[src]
Bit 7 - Data register empty (transmitters)
pub fn rx_ne(&self) -> RXNE_R
[src]
Bit 6 - Data register not empty (receivers)
pub fn stopf(&self) -> STOPF_R
[src]
Bit 4 - Stop detection (slave mode)
pub fn add10(&self) -> ADD10_R
[src]
Bit 3 - 10-bit header sent (Master mode)
pub fn btf(&self) -> BTF_R
[src]
Bit 2 - Byte transfer finished
pub fn addr(&self) -> ADDR_R
[src]
Bit 1 - Address sent (master mode)/matched (slave mode)
pub fn sb(&self) -> SB_R
[src]
Bit 0 - Start bit (Master mode)
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn pec(&self) -> PEC_R
[src]
Bits 8:15 - acket error checking register
pub fn dualf(&self) -> DUALF_R
[src]
Bit 7 - Dual flag (Slave mode)
pub fn smbhost(&self) -> SMBHOST_R
[src]
Bit 6 - SMBus host header (Slave mode)
pub fn smbdefault(&self) -> SMBDEFAULT_R
[src]
Bit 5 - SMBus device default address (Slave mode)
pub fn gencall(&self) -> GENCALL_R
[src]
Bit 4 - General call address (Slave mode)
pub fn tra(&self) -> TRA_R
[src]
Bit 2 - Transmitter/receiver
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Bus busy
pub fn msl(&self) -> MSL_R
[src]
Bit 0 - Master/slave
impl R<bool, F_S_A>
[src]
pub fn variant(&self) -> F_S_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_fast(&self) -> bool
[src]
Checks if the value of the field is FAST
impl R<bool, DUTY_A>
[src]
pub fn variant(&self) -> DUTY_A
[src]
Get enumerated values variant
pub fn is_duty2_1(&self) -> bool
[src]
Checks if the value of the field is DUTY2_1
pub fn is_duty16_9(&self) -> bool
[src]
Checks if the value of the field is DUTY16_9
impl R<u32, Reg<u32, _CCR>>
[src]
pub fn f_s(&self) -> F_S_R
[src]
Bit 15 - I2C master mode selection
pub fn duty(&self) -> DUTY_R
[src]
Bit 14 - Fast mode duty cycle
pub fn ccr(&self) -> CCR_R
[src]
Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)
impl R<u32, Reg<u32, _TRISE>>
[src]
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cts(&self) -> CTS_R
[src]
Bit 9 - CTS flag
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - mantissa of USARTDIV
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - fraction of USARTDIV
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool
[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool
[src]
Checks if the value of the field is STOP1P5
impl R<bool, CLKEN_A>
[src]
pub fn variant(&self) -> CLKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first(&self) -> bool
[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn clken(&self) -> CLKEN_R
[src]
Bit 11 - Clock enable
pub fn cpol(&self) -> CPOL_R
[src]
Bit 10 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 9 - Clock phase
pub fn lbcl(&self) -> LBCL_R
[src]
Bit 8 - Last bit clock pulse
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
impl R<bool, CTSIE_A>
[src]
pub fn variant(&self) -> CTSIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSE_A>
[src]
pub fn variant(&self) -> CTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSE_A>
[src]
pub fn variant(&self) -> RTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>
[src]
pub fn variant(&self) -> SCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, NACK_A>
[src]
pub fn variant(&self) -> NACK_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn ctsie(&self) -> CTSIE_R
[src]
Bit 10 - CTS interrupt enable
pub fn ctse(&self) -> CTSE_R
[src]
Bit 9 - CTS enable
pub fn rtse(&self) -> RTSE_R
[src]
Bit 8 - RTS enable
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn scen(&self) -> SCEN_R
[src]
Bit 5 - Smartcard mode enable
pub fn nack(&self) -> NACK_R
[src]
Bit 4 - Smartcard NACK enable
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _GTPR>>
[src]
pub fn gt(&self) -> GT_R
[src]
Bits 8:15 - Guard time value
pub fn psc(&self) -> PSC_R
[src]
Bits 0:7 - Prescaler value
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel 1
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel 2
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel 3
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel 4
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, EN1_A>
[src]
pub fn variant(&self) -> EN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFF1_A>
[src]
pub fn variant(&self) -> BOFF1_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, TEN1_A>
[src]
pub fn variant(&self) -> TEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL1_A>
[src]
pub fn variant(&self) -> Variant<u8, TSEL1_A>
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim3_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim15_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM15_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE1_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE1_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAEN1_A>
[src]
pub fn variant(&self) -> DMAEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL2_A>
[src]
pub fn variant(&self) -> TSEL2_A
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim8_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim5_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_tim4_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE2_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE2_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAUDRIE1_A>
[src]
pub fn variant(&self) -> DMAUDRIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en1(&self) -> EN1_R
[src]
Bit 0 - DAC channel1 enable
pub fn boff1(&self) -> BOFF1_R
[src]
Bit 1 - DAC channel1 output buffer disable
pub fn ten1(&self) -> TEN1_R
[src]
Bit 2 - DAC channel1 trigger enable
pub fn tsel1(&self) -> TSEL1_R
[src]
Bits 3:5 - DAC channel1 trigger selection
pub fn wave1(&self) -> WAVE1_R
[src]
Bits 6:7 - DAC channel1 noise/triangle wave generation enable
pub fn mamp1(&self) -> MAMP1_R
[src]
Bits 8:11 - DAC channel1 mask/amplitude selector
pub fn dmaen1(&self) -> DMAEN1_R
[src]
Bit 12 - DAC channel1 DMA enable
pub fn en2(&self) -> EN2_R
[src]
Bit 16 - DAC channel2 enable
pub fn boff2(&self) -> BOFF2_R
[src]
Bit 17 - DAC channel2 output buffer disable
pub fn ten2(&self) -> TEN2_R
[src]
Bit 18 - DAC channel2 trigger enable
pub fn tsel2(&self) -> TSEL2_R
[src]
Bits 19:21 - DAC channel2 trigger selection
pub fn wave2(&self) -> WAVE2_R
[src]
Bits 22:23 - DAC channel2 noise/triangle wave generation enable
pub fn mamp2(&self) -> MAMP2_R
[src]
Bits 24:27 - DAC channel2 mask/amplitude selector
pub fn dmaen2(&self) -> DMAEN2_R
[src]
Bit 28 - DAC channel2 DMA enable
pub fn dmaudrie1(&self) -> DMAUDRIE1_R
[src]
Bit 13 - DAC channel1 DMA underrun interrupt enable
pub fn dmaudrie2(&self) -> DMAUDRIE2_R
[src]
Bit 29 - DAC channel2 DMA underrun interrupt enable
impl R<u32, Reg<u32, _DHR12R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:11 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 4:15 - DAC channel2 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:7 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 16:27 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12LD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 20:31 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR8RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 8:15 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DOR1>>
[src]
pub fn dacc1dor(&self) -> DACC1DOR_R
[src]
Bits 0:11 - DAC channel1 data output
impl R<u32, Reg<u32, _DOR2>>
[src]
pub fn dacc2dor(&self) -> DACC2DOR_R
[src]
Bits 0:11 - DAC channel2 data output
impl R<bool, DMAUDR1_A>
[src]
pub fn variant(&self) -> DMAUDR1_A
[src]
Get enumerated values variant
pub fn is_no_underrun(&self) -> bool
[src]
Checks if the value of the field is NOUNDERRUN
pub fn is_underrun(&self) -> bool
[src]
Checks if the value of the field is UNDERRUN
impl R<u32, Reg<u32, _SR>>
[src]
pub fn dmaudr1(&self) -> DMAUDR1_R
[src]
Bit 13 - DAC channel1 DMA underrun flag
pub fn dmaudr2(&self) -> DMAUDR2_R
[src]
Bit 29 - DAC channel2 DMA underrun flag
impl R<u32, Reg<u32, _IDCODE>>
[src]
pub fn dev_id(&self) -> DEV_ID_R
[src]
Bits 0:11 - DEV_ID
pub fn rev_id(&self) -> REV_ID_R
[src]
Bits 16:31 - REV_ID
impl R<u32, Reg<u32, _CR>>
[src]
pub fn dbg_sleep(&self) -> DBG_SLEEP_R
[src]
Bit 0 - DBG_SLEEP
pub fn dbg_stop(&self) -> DBG_STOP_R
[src]
Bit 1 - DBG_STOP
pub fn dbg_standby(&self) -> DBG_STANDBY_R
[src]
Bit 2 - DBG_STANDBY
pub fn trace_ioen(&self) -> TRACE_IOEN_R
[src]
Bit 5 - TRACE_IOEN
pub fn trace_mode(&self) -> TRACE_MODE_R
[src]
Bits 6:7 - TRACE_MODE
pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R
[src]
Bit 8 - DBG_IWDG_STOP
pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R
[src]
Bit 9 - DBG_WWDG_STOP
pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R
[src]
Bit 10 - DBG_TIM1_STOP
pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R
[src]
Bit 11 - DBG_TIM2_STOP
pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R
[src]
Bit 12 - DBG_TIM3_STOP
pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R
[src]
Bit 13 - DBG_TIM4_STOP
pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R
[src]
Bit 15 - DBG_I2C1_SMBUS_TIMEOUT
pub fn dbg_i2c2_smbus_timeout(&self) -> DBG_I2C2_SMBUS_TIMEOUT_R
[src]
Bit 16 - DBG_I2C2_SMBUS_TIMEOUT
pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R
[src]
Bit 18 - DBG_TIM5_STOP
pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R
[src]
Bit 19 - DBG_TIM6_STOP
pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R
[src]
Bit 20 - DBG_TIM7_STOP
pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R
[src]
Bit 22 - DBG_TIM15_STOP
pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R
[src]
Bit 23 - DBG_TIM16_STOP
pub fn dbg_tim17_stop(&self) -> DBG_TIM17_STOP_R
[src]
Bit 24 - DBG_TIM17_STOP
pub fn dbg_tim12_stop(&self) -> DBG_TIM12_STOP_R
[src]
Bit 25 - DBG_TIM12_STOP
pub fn dbg_tim13_stop(&self) -> DBG_TIM13_STOP_R
[src]
Bit 26 - DBG_TIM13_STOP
pub fn dbg_tim14_stop(&self) -> DBG_TIM14_STOP_R
[src]
Bit 27 - DBG_TIM14_STOP
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - DIV_Fraction
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - DIV_Mantissa
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> Variant<u8, STOP_A>
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _IDR>>
[src]
impl R<u32, Reg<u32, _ACR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn eop(&self) -> EOP_R
[src]
Bit 5 - End of operation
pub fn wrprterr(&self) -> WRPRTERR_R
[src]
Bit 4 - Write protection error
pub fn pgerr(&self) -> PGERR_R
[src]
Bit 2 - Programming error
pub fn bsy(&self) -> BSY_R
[src]
Bit 0 - Busy
impl R<u32, Reg<u32, _CR>>
[src]
pub fn pg(&self) -> PG_R
[src]
Bit 0 - Programming
pub fn per(&self) -> PER_R
[src]
Bit 1 - Page Erase
pub fn mer(&self) -> MER_R
[src]
Bit 2 - Mass Erase
pub fn optpg(&self) -> OPTPG_R
[src]
Bit 4 - Option byte programming
pub fn opter(&self) -> OPTER_R
[src]
Bit 5 - Option byte erase
pub fn strt(&self) -> STRT_R
[src]
Bit 6 - Start
pub fn lock(&self) -> LOCK_R
[src]
Bit 7 - Lock
pub fn optwre(&self) -> OPTWRE_R
[src]
Bit 9 - Option bytes write enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 10 - Error interrupt enable
pub fn eopie(&self) -> EOPIE_R
[src]
Bit 12 - End of operation interrupt enable
impl R<u32, Reg<u32, _OBR>>
[src]
pub fn opterr(&self) -> OPTERR_R
[src]
Bit 0 - Option byte error
pub fn rdprt(&self) -> RDPRT_R
[src]
Bit 1 - Read protection
pub fn wdg_sw(&self) -> WDG_SW_R
[src]
Bit 2 - WDG_SW
pub fn n_rst_stop(&self) -> NRST_STOP_R
[src]
Bit 3 - nRST_STOP
pub fn n_rst_stdby(&self) -> NRST_STDBY_R
[src]
Bit 4 - nRST_STDBY
pub fn data0(&self) -> DATA0_R
[src]
Bits 10:17 - Data0
pub fn data1(&self) -> DATA1_R
[src]
Bits 18:25 - Data1
impl R<u32, Reg<u32, _WRPR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<u32, Reg<u32, _CCR1>>
[src]
impl R<u32, Reg<u32, _CCR2>>
[src]
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_not_stopped(&self) -> bool
[src]
Checks if the value of the field is NOTSTOPPED
pub fn is_stopped(&self) -> bool
[src]
Checks if the value of the field is STOPPED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, OIS1N_A>
[src]
pub fn variant(&self) -> OIS1N_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, OIS1_A>
[src]
pub fn variant(&self) -> OIS1_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<bool, CCUS_A>
[src]
pub fn variant(&self) -> CCUS_A
[src]
Get enumerated values variant
pub fn is_default(&self) -> bool
[src]
Checks if the value of the field is DEFAULT
pub fn is_with_rising_edge(&self) -> bool
[src]
Checks if the value of the field is WITHRISINGEDGE
impl R<bool, CCPC_A>
[src]
pub fn variant(&self) -> CCPC_A
[src]
Get enumerated values variant
pub fn is_not_preloaded(&self) -> bool
[src]
Checks if the value of the field is NOTPRELOADED
pub fn is_preloaded(&self) -> bool
[src]
Checks if the value of the field is PRELOADED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, CC1DE_A>
[src]
pub fn variant(&self) -> CC1DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BIE_A>
[src]
pub fn variant(&self) -> BIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, COMIE_A>
[src]
pub fn variant(&self) -> COMIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1IE_A>
[src]
pub fn variant(&self) -> CC1IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<u32, Reg<u32, _CCR1>>
[src]
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
pub fn ie(&self) -> IE_R
[src]
Bit 1 - Interrupt enable
pub fn btem(&self) -> BTEM_R
[src]
Bit 2 - Bit timing error mode
pub fn bpem(&self) -> BPEM_R
[src]
Bit 3 - Bit period error mode
impl R<u32, Reg<u32, _OAR>>
[src]
impl R<u32, Reg<u32, _PRES>>
[src]
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn bte(&self) -> BTE_R
[src]
Bit 0 - Bit timing error
pub fn bpe(&self) -> BPE_R
[src]
Bit 1 - Bit period error
pub fn rbtfe(&self) -> RBTFE_R
[src]
Bit 2 - Rx block transfer finished error
pub fn sbe(&self) -> SBE_R
[src]
Bit 3 - Start bit error
pub fn acke(&self) -> ACKE_R
[src]
Bit 4 - Block acknowledge error
pub fn line(&self) -> LINE_R
[src]
Bit 5 - Line error
pub fn tbtfe(&self) -> TBTFE_R
[src]
Bit 6 - Tx block transfer finished error
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tsom(&self) -> TSOM_R
[src]
Bit 0 - Tx start of message
pub fn teom(&self) -> TEOM_R
[src]
Bit 1 - Tx end of message
pub fn terr(&self) -> TERR_R
[src]
Bit 2 - Tx error
pub fn tbtrf(&self) -> TBTRF_R
[src]
Bit 3 - Tx byte transfer request or block transfer finished
pub fn rsom(&self) -> RSOM_R
[src]
Bit 4 - Rx start of message
pub fn reom(&self) -> REOM_R
[src]
Bit 5 - Rx end of message
pub fn rerr(&self) -> RERR_R
[src]
Bit 6 - Rx error
pub fn rbtf(&self) -> RBTF_R
[src]
Bit 7 - Rx byte/block transfer finished
impl R<u32, Reg<u32, _TXD>>
[src]
impl R<u32, Reg<u32, _RXD>>
[src]
impl R<u32, Reg<u32, _ACTRL>>
[src]
pub fn disfold(&self) -> DISFOLD_R
[src]
Bit 2 - DISFOLD
pub fn fpexcodis(&self) -> FPEXCODIS_R
[src]
Bit 10 - FPEXCODIS
pub fn disramode(&self) -> DISRAMODE_R
[src]
Bit 11 - DISRAMODE
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R
[src]
Bit 12 - DISITMATBFLUSH
impl R<u32, Reg<u32, _STIR>>
[src]
impl R<u32, Reg<u32, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 0 - Counter enable
pub fn tickint(&self) -> TICKINT_R
[src]
Bit 1 - SysTick exception request enable
pub fn clksource(&self) -> CLKSOURCE_R
[src]
Bit 2 - Clock source selection
pub fn countflag(&self) -> COUNTFLAG_R
[src]
Bit 16 - COUNTFLAG
impl R<u32, Reg<u32, _LOAD_>>
[src]
impl R<u32, Reg<u32, _VAL>>
[src]
impl R<u32, Reg<u32, _CALIB>>
[src]
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR1>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u32, Reg<u32, _PCR2>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM2>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT2>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - Attribute memory x databus HiZ time
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - Attribute memory x hold time
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - Attribute memory x wait time
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - Attribute memory x setup time
impl R<u32, Reg<u32, _ECCR2>>
[src]
impl R<u32, Reg<u32, _PCR3>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR3>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM3>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT3>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _ECCR3>>
[src]
impl R<u32, Reg<u32, _PCR4>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR4>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM4>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT4>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _PIO4>>
[src]
pub fn iohizx(&self) -> IOHIZX_R
[src]
Bits 24:31 - IOHIZx
pub fn ioholdx(&self) -> IOHOLDX_R
[src]
Bits 16:23 - IOHOLDx
pub fn iowaitx(&self) -> IOWAITX_R
[src]
Bits 8:15 - IOWAITx
pub fn iosetx(&self) -> IOSETX_R
[src]
Bits 0:7 - IOSETx
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BWTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - Bus turnaround phase duration
impl R<bool, PDDS_A>
[src]
pub fn variant(&self) -> PDDS_A
[src]
Get enumerated values variant
pub fn is_stop_mode(&self) -> bool
[src]
Checks if the value of the field is STOP_MODE
pub fn is_standby_mode(&self) -> bool
[src]
Checks if the value of the field is STANDBY_MODE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn lpds(&self) -> LPDS_R
[src]
Bit 0 - Low Power Deep Sleep
pub fn pdds(&self) -> PDDS_R
[src]
Bit 1 - Power Down Deep Sleep
pub fn cwuf(&self) -> CWUF_R
[src]
Bit 2 - Clear Wake-up Flag
pub fn csbf(&self) -> CSBF_R
[src]
Bit 3 - Clear STANDBY Flag
pub fn pvde(&self) -> PVDE_R
[src]
Bit 4 - Power Voltage Detector Enable
pub fn pls(&self) -> PLS_R
[src]
Bits 5:7 - PVD Level Selection
pub fn dbp(&self) -> DBP_R
[src]
Bit 8 - Disable Backup Domain write protection
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn wuf(&self) -> WUF_R
[src]
Bit 0 - Wake-Up Flag
pub fn sbf(&self) -> SBF_R
[src]
Bit 1 - STANDBY Flag
pub fn pvdo(&self) -> PVDO_R
[src]
Bit 2 - PVD Output
pub fn ewup(&self) -> EWUP_R
[src]
Bit 8 - Enable WKUP pin
impl R<bool, HSION_A>
[src]
pub fn variant(&self) -> HSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, HSIRDY_A>
[src]
pub fn variant(&self) -> HSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, HSEBYP_A>
[src]
pub fn variant(&self) -> HSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<bool, CSSON_A>
[src]
pub fn variant(&self) -> CSSON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<u32, Reg<u32, _CR>>
[src]
pub fn hsion(&self) -> HSION_R
[src]
Bit 0 - Internal High Speed clock enable
pub fn hsirdy(&self) -> HSIRDY_R
[src]
Bit 1 - Internal High Speed clock ready flag
pub fn hsitrim(&self) -> HSITRIM_R
[src]
Bits 3:7 - Internal High Speed clock trimming
pub fn hsical(&self) -> HSICAL_R
[src]
Bits 8:15 - Internal High Speed clock Calibration
pub fn hseon(&self) -> HSEON_R
[src]
Bit 16 - External High Speed clock enable
pub fn hserdy(&self) -> HSERDY_R
[src]
Bit 17 - External High Speed clock ready flag
pub fn hsebyp(&self) -> HSEBYP_R
[src]
Bit 18 - External High Speed clock Bypass
pub fn csson(&self) -> CSSON_R
[src]
Bit 19 - Clock Security System enable
pub fn pllon(&self) -> PLLON_R
[src]
Bit 24 - PLL enable
pub fn pllrdy(&self) -> PLLRDY_R
[src]
Bit 25 - PLL clock ready flag
impl R<u8, SW_A>
[src]
pub fn variant(&self) -> Variant<u8, SW_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, SWS_A>
[src]
pub fn variant(&self) -> Variant<u8, SWS_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, HPRE_A>
[src]
pub fn variant(&self) -> Variant<u8, HPRE_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
impl R<u8, PPRE1_A>
[src]
pub fn variant(&self) -> Variant<u8, PPRE1_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPRE_A>
[src]
pub fn variant(&self) -> ADCPRE_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSRC_A>
[src]
pub fn variant(&self) -> PLLSRC_A
[src]
Get enumerated values variant
pub fn is_hsi_div2(&self) -> bool
[src]
Checks if the value of the field is HSI_DIV2
pub fn is_hse_div_prediv(&self) -> bool
[src]
Checks if the value of the field is HSE_DIV_PREDIV
impl R<bool, PLLXTPRE_A>
[src]
pub fn variant(&self) -> PLLXTPRE_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMUL_A>
[src]
pub fn variant(&self) -> PLLMUL_A
[src]
Get enumerated values variant
pub fn is_mul2(&self) -> bool
[src]
Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool
[src]
Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool
[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool
[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool
[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool
[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool
[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool
[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool
[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool
[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool
[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool
[src]
Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool
[src]
Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool
[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool
[src]
Checks if the value of the field is MUL16X
impl R<u8, MCO_A>
[src]
pub fn variant(&self) -> Variant<u8, MCO_A>
[src]
Get enumerated values variant
pub fn is_no_mco(&self) -> bool
[src]
Checks if the value of the field is NOMCO
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn sw(&self) -> SW_R
[src]
Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
[src]
Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
[src]
Bits 4:7 - AHB prescaler
pub fn ppre1(&self) -> PPRE1_R
[src]
Bits 8:10 - APB Low speed prescaler (APB1)
pub fn ppre2(&self) -> PPRE2_R
[src]
Bits 11:13 - APB High speed prescaler (APB2)
pub fn adcpre(&self) -> ADCPRE_R
[src]
Bits 14:15 - ADC prescaler
pub fn pllsrc(&self) -> PLLSRC_R
[src]
Bit 16 - PLL entry clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
[src]
Bit 17 - HSE divider for PLL entry
pub fn pllmul(&self) -> PLLMUL_R
[src]
Bits 18:21 - PLL Multiplication Factor
pub fn mco(&self) -> MCO_R
[src]
Bits 24:26 - Microcontroller clock output
impl R<bool, LSIRDYF_A>
[src]
pub fn variant(&self) -> LSIRDYF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CSSF_A>
[src]
pub fn variant(&self) -> CSSF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LSIRDYIE_A>
[src]
pub fn variant(&self) -> LSIRDYIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CIR>>
[src]
pub fn lsirdyf(&self) -> LSIRDYF_R
[src]
Bit 0 - LSI Ready Interrupt flag
pub fn lserdyf(&self) -> LSERDYF_R
[src]
Bit 1 - LSE Ready Interrupt flag
pub fn hsirdyf(&self) -> HSIRDYF_R
[src]
Bit 2 - HSI Ready Interrupt flag
pub fn hserdyf(&self) -> HSERDYF_R
[src]
Bit 3 - HSE Ready Interrupt flag
pub fn pllrdyf(&self) -> PLLRDYF_R
[src]
Bit 4 - PLL Ready Interrupt flag
pub fn cssf(&self) -> CSSF_R
[src]
Bit 7 - Clock Security System Interrupt flag
pub fn lsirdyie(&self) -> LSIRDYIE_R
[src]
Bit 8 - LSI Ready Interrupt Enable
pub fn lserdyie(&self) -> LSERDYIE_R
[src]
Bit 9 - LSE Ready Interrupt Enable
pub fn hsirdyie(&self) -> HSIRDYIE_R
[src]
Bit 10 - HSI Ready Interrupt Enable
pub fn hserdyie(&self) -> HSERDYIE_R
[src]
Bit 11 - HSE Ready Interrupt Enable
pub fn pllrdyie(&self) -> PLLRDYIE_R
[src]
Bit 12 - PLL Ready Interrupt Enable
impl R<bool, AFIORST_A>
[src]
pub fn variant(&self) -> Variant<bool, AFIORST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RSTR>>
[src]
pub fn afiorst(&self) -> AFIORST_R
[src]
Bit 0 - Alternate function I/O reset
pub fn ioparst(&self) -> IOPARST_R
[src]
Bit 2 - IO port A reset
pub fn iopbrst(&self) -> IOPBRST_R
[src]
Bit 3 - IO port B reset
pub fn iopcrst(&self) -> IOPCRST_R
[src]
Bit 4 - IO port C reset
pub fn iopdrst(&self) -> IOPDRST_R
[src]
Bit 5 - IO port D reset
pub fn ioperst(&self) -> IOPERST_R
[src]
Bit 6 - IO port E reset
pub fn adc1rst(&self) -> ADC1RST_R
[src]
Bit 9 - ADC 1 interface reset
pub fn spi1rst(&self) -> SPI1RST_R
[src]
Bit 12 - SPI 1 reset
pub fn usart1rst(&self) -> USART1RST_R
[src]
Bit 14 - USART1 reset
pub fn tim9rst(&self) -> TIM9RST_R
[src]
Bit 19 - TIM9 timer reset
pub fn tim10rst(&self) -> TIM10RST_R
[src]
Bit 20 - TIM10 timer reset
pub fn tim11rst(&self) -> TIM11RST_R
[src]
Bit 21 - TIM11 timer reset
pub fn iopfrst(&self) -> IOPFRST_R
[src]
Bit 7 - IO port F reset
pub fn iopgrst(&self) -> IOPGRST_R
[src]
Bit 8 - IO port G reset
impl R<bool, TIM2RST_A>
[src]
pub fn variant(&self) -> Variant<bool, TIM2RST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RSTR>>
[src]
pub fn tim2rst(&self) -> TIM2RST_R
[src]
Bit 0 - Timer 2 reset
pub fn tim3rst(&self) -> TIM3RST_R
[src]
Bit 1 - Timer 3 reset
pub fn tim4rst(&self) -> TIM4RST_R
[src]
Bit 2 - Timer 4 reset
pub fn tim5rst(&self) -> TIM5RST_R
[src]
Bit 3 - Timer 5 reset
pub fn tim6rst(&self) -> TIM6RST_R
[src]
Bit 4 - Timer 6 reset
pub fn tim7rst(&self) -> TIM7RST_R
[src]
Bit 5 - Timer 7 reset
pub fn tim12rst(&self) -> TIM12RST_R
[src]
Bit 6 - Timer 12 reset
pub fn tim13rst(&self) -> TIM13RST_R
[src]
Bit 7 - Timer 13 reset
pub fn tim14rst(&self) -> TIM14RST_R
[src]
Bit 8 - Timer 14 reset
pub fn wwdgrst(&self) -> WWDGRST_R
[src]
Bit 11 - Window watchdog reset
pub fn spi2rst(&self) -> SPI2RST_R
[src]
Bit 14 - SPI2 reset
pub fn spi3rst(&self) -> SPI3RST_R
[src]
Bit 15 - SPI3 reset
pub fn usart2rst(&self) -> USART2RST_R
[src]
Bit 17 - USART 2 reset
pub fn usart3rst(&self) -> USART3RST_R
[src]
Bit 18 - USART 3 reset
pub fn uart4rst(&self) -> UART4RST_R
[src]
Bit 19 - UART 4 reset
pub fn uart5rst(&self) -> UART5RST_R
[src]
Bit 20 - UART 5 reset
pub fn i2c1rst(&self) -> I2C1RST_R
[src]
Bit 21 - I2C1 reset
pub fn i2c2rst(&self) -> I2C2RST_R
[src]
Bit 22 - I2C2 reset
pub fn bkprst(&self) -> BKPRST_R
[src]
Bit 27 - Backup interface reset
pub fn pwrrst(&self) -> PWRRST_R
[src]
Bit 28 - Power interface reset
pub fn dacrst(&self) -> DACRST_R
[src]
Bit 29 - DAC interface reset
impl R<bool, DMA1EN_A>
[src]
pub fn variant(&self) -> DMA1EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBENR>>
[src]
pub fn dma1en(&self) -> DMA1EN_R
[src]
Bit 0 - DMA1 clock enable
pub fn dma2en(&self) -> DMA2EN_R
[src]
Bit 1 - DMA2 clock enable
pub fn sramen(&self) -> SRAMEN_R
[src]
Bit 2 - SRAM interface clock enable
pub fn flitfen(&self) -> FLITFEN_R
[src]
Bit 4 - FLITF clock enable
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 6 - CRC clock enable
pub fn fsmcen(&self) -> FSMCEN_R
[src]
Bit 8 - FSMC clock enable
impl R<bool, AFIOEN_A>
[src]
pub fn variant(&self) -> AFIOEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2ENR>>
[src]
pub fn afioen(&self) -> AFIOEN_R
[src]
Bit 0 - Alternate function I/O clock enable
pub fn iopaen(&self) -> IOPAEN_R
[src]
Bit 2 - I/O port A clock enable
pub fn iopben(&self) -> IOPBEN_R
[src]
Bit 3 - I/O port B clock enable
pub fn iopcen(&self) -> IOPCEN_R
[src]
Bit 4 - I/O port C clock enable
pub fn iopden(&self) -> IOPDEN_R
[src]
Bit 5 - I/O port D clock enable
pub fn iopeen(&self) -> IOPEEN_R
[src]
Bit 6 - I/O port E clock enable
pub fn iopfen(&self) -> IOPFEN_R
[src]
Bit 7 - I/O port F clock enable
pub fn iopgen(&self) -> IOPGEN_R
[src]
Bit 8 - I/O port G clock enable
pub fn adc1en(&self) -> ADC1EN_R
[src]
Bit 9 - ADC 1 interface clock enable
pub fn spi1en(&self) -> SPI1EN_R
[src]
Bit 12 - SPI 1 clock enable
pub fn usart1en(&self) -> USART1EN_R
[src]
Bit 14 - USART1 clock enable
pub fn tim9en(&self) -> TIM9EN_R
[src]
Bit 19 - TIM9 Timer clock enable
pub fn tim10en(&self) -> TIM10EN_R
[src]
Bit 20 - TIM10 Timer clock enable
pub fn tim11en(&self) -> TIM11EN_R
[src]
Bit 21 - TIM11 Timer clock enable
impl R<bool, TIM2EN_A>
[src]
pub fn variant(&self) -> TIM2EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1ENR>>
[src]
pub fn tim2en(&self) -> TIM2EN_R
[src]
Bit 0 - Timer 2 clock enable
pub fn tim3en(&self) -> TIM3EN_R
[src]
Bit 1 - Timer 3 clock enable
pub fn tim4en(&self) -> TIM4EN_R
[src]
Bit 2 - Timer 4 clock enable
pub fn tim5en(&self) -> TIM5EN_R
[src]
Bit 3 - Timer 5 clock enable
pub fn tim6en(&self) -> TIM6EN_R
[src]
Bit 4 - Timer 6 clock enable
pub fn tim7en(&self) -> TIM7EN_R
[src]
Bit 5 - Timer 7 clock enable
pub fn tim12en(&self) -> TIM12EN_R
[src]
Bit 6 - Timer 12 clock enable
pub fn tim13en(&self) -> TIM13EN_R
[src]
Bit 7 - Timer 13 clock enable
pub fn tim14en(&self) -> TIM14EN_R
[src]
Bit 8 - Timer 14 clock enable
pub fn wwdgen(&self) -> WWDGEN_R
[src]
Bit 11 - Window watchdog clock enable
pub fn spi2en(&self) -> SPI2EN_R
[src]
Bit 14 - SPI 2 clock enable
pub fn spi3en(&self) -> SPI3EN_R
[src]
Bit 15 - SPI 3 clock enable
pub fn usart2en(&self) -> USART2EN_R
[src]
Bit 17 - USART 2 clock enable
pub fn usart3en(&self) -> USART3EN_R
[src]
Bit 18 - USART 3 clock enable
pub fn uart4en(&self) -> UART4EN_R
[src]
Bit 19 - UART 4 clock enable
pub fn uart5en(&self) -> UART5EN_R
[src]
Bit 20 - UART 5 clock enable
pub fn i2c1en(&self) -> I2C1EN_R
[src]
Bit 21 - I2C 1 clock enable
pub fn i2c2en(&self) -> I2C2EN_R
[src]
Bit 22 - I2C 2 clock enable
pub fn bkpen(&self) -> BKPEN_R
[src]
Bit 27 - Backup interface clock enable
pub fn pwren(&self) -> PWREN_R
[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R
[src]
Bit 29 - DAC interface clock enable
impl R<bool, LSEON_A>
[src]
pub fn variant(&self) -> LSEON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSERDY_A>
[src]
pub fn variant(&self) -> LSERDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, LSEBYP_A>
[src]
pub fn variant(&self) -> LSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<u8, RTCSEL_A>
[src]
pub fn variant(&self) -> RTCSEL_A
[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool
[src]
Checks if the value of the field is NOCLOCK
pub fn is_lse(&self) -> bool
[src]
Checks if the value of the field is LSE
pub fn is_lsi(&self) -> bool
[src]
Checks if the value of the field is LSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
impl R<bool, RTCEN_A>
[src]
pub fn variant(&self) -> RTCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BDRST_A>
[src]
pub fn variant(&self) -> BDRST_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BDCR>>
[src]
pub fn lseon(&self) -> LSEON_R
[src]
Bit 0 - External Low Speed oscillator enable
pub fn lserdy(&self) -> LSERDY_R
[src]
Bit 1 - External Low Speed oscillator ready
pub fn lsebyp(&self) -> LSEBYP_R
[src]
Bit 2 - External Low Speed oscillator bypass
pub fn rtcsel(&self) -> RTCSEL_R
[src]
Bits 8:9 - RTC clock source selection
pub fn rtcen(&self) -> RTCEN_R
[src]
Bit 15 - RTC clock enable
pub fn bdrst(&self) -> BDRST_R
[src]
Bit 16 - Backup domain software reset
impl R<bool, LSION_A>
[src]
pub fn variant(&self) -> LSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSIRDY_A>
[src]
pub fn variant(&self) -> LSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, RMVF_A>
[src]
pub fn variant(&self) -> Variant<bool, RMVF_A>
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
impl R<bool, PINRSTF_A>
[src]
pub fn variant(&self) -> PINRSTF_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn lsion(&self) -> LSION_R
[src]
Bit 0 - Internal low speed oscillator enable
pub fn lsirdy(&self) -> LSIRDY_R
[src]
Bit 1 - Internal low speed oscillator ready
pub fn rmvf(&self) -> RMVF_R
[src]
Bit 24 - Remove reset flag
pub fn pinrstf(&self) -> PINRSTF_R
[src]
Bit 26 - PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R
[src]
Bit 27 - POR/PDR reset flag
pub fn sftrstf(&self) -> SFTRSTF_R
[src]
Bit 28 - Software reset flag
pub fn iwdgrstf(&self) -> IWDGRSTF_R
[src]
Bit 29 - Independent watchdog reset flag
pub fn wwdgrstf(&self) -> WWDGRSTF_R
[src]
Bit 30 - Window watchdog reset flag
pub fn lpwrrstf(&self) -> LPWRRSTF_R
[src]
Bit 31 - Low-power reset flag
impl R<u8, MODE0_A>
[src]
pub fn variant(&self) -> MODE0_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF0_A>
[src]
pub fn variant(&self) -> CNF0_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn mode0(&self) -> MODE0_R
[src]
Bits 0:1 - Port n.0 mode bits
pub fn cnf0(&self) -> CNF0_R
[src]
Bits 2:3 - Port n.0 configuration bits
pub fn mode1(&self) -> MODE1_R
[src]
Bits 4:5 - Port n.1 mode bits
pub fn cnf1(&self) -> CNF1_R
[src]
Bits 6:7 - Port n.1 configuration bits
pub fn mode2(&self) -> MODE2_R
[src]
Bits 8:9 - Port n.2 mode bits
pub fn cnf2(&self) -> CNF2_R
[src]
Bits 10:11 - Port n.2 configuration bits
pub fn mode3(&self) -> MODE3_R
[src]
Bits 12:13 - Port n.3 mode bits
pub fn cnf3(&self) -> CNF3_R
[src]
Bits 14:15 - Port n.3 configuration bits
pub fn mode4(&self) -> MODE4_R
[src]
Bits 16:17 - Port n.4 mode bits
pub fn cnf4(&self) -> CNF4_R
[src]
Bits 18:19 - Port n.4 configuration bits
pub fn mode5(&self) -> MODE5_R
[src]
Bits 20:21 - Port n.5 mode bits
pub fn cnf5(&self) -> CNF5_R
[src]
Bits 22:23 - Port n.5 configuration bits
pub fn mode6(&self) -> MODE6_R
[src]
Bits 24:25 - Port n.6 mode bits
pub fn cnf6(&self) -> CNF6_R
[src]
Bits 26:27 - Port n.6 configuration bits
pub fn mode7(&self) -> MODE7_R
[src]
Bits 28:29 - Port n.7 mode bits
pub fn cnf7(&self) -> CNF7_R
[src]
Bits 30:31 - Port n.7 configuration bits
impl R<u8, MODE8_A>
[src]
pub fn variant(&self) -> MODE8_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF8_A>
[src]
pub fn variant(&self) -> CNF8_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn mode8(&self) -> MODE8_R
[src]
Bits 0:1 - Port n.8 mode bits
pub fn cnf8(&self) -> CNF8_R
[src]
Bits 2:3 - Port n.8 configuration bits
pub fn mode9(&self) -> MODE9_R
[src]
Bits 4:5 - Port n.9 mode bits
pub fn cnf9(&self) -> CNF9_R
[src]
Bits 6:7 - Port n.9 configuration bits
pub fn mode10(&self) -> MODE10_R
[src]
Bits 8:9 - Port n.10 mode bits
pub fn cnf10(&self) -> CNF10_R
[src]
Bits 10:11 - Port n.10 configuration bits
pub fn mode11(&self) -> MODE11_R
[src]
Bits 12:13 - Port n.11 mode bits
pub fn cnf11(&self) -> CNF11_R
[src]
Bits 14:15 - Port n.11 configuration bits
pub fn mode12(&self) -> MODE12_R
[src]
Bits 16:17 - Port n.12 mode bits
pub fn cnf12(&self) -> CNF12_R
[src]
Bits 18:19 - Port n.12 configuration bits
pub fn mode13(&self) -> MODE13_R
[src]
Bits 20:21 - Port n.13 mode bits
pub fn cnf13(&self) -> CNF13_R
[src]
Bits 22:23 - Port n.13 configuration bits
pub fn mode14(&self) -> MODE14_R
[src]
Bits 24:25 - Port n.14 mode bits
pub fn cnf14(&self) -> CNF14_R
[src]
Bits 26:27 - Port n.14 configuration bits
pub fn mode15(&self) -> MODE15_R
[src]
Bits 28:29 - Port n.15 mode bits
pub fn cnf15(&self) -> CNF15_R
[src]
Bits 30:31 - Port n.15 configuration bits
impl R<bool, IDR0_A>
[src]
pub fn variant(&self) -> IDR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _IDR>>
[src]
pub fn idr0(&self) -> IDR0_R
[src]
Bit 0 - Port input data
pub fn idr1(&self) -> IDR1_R
[src]
Bit 1 - Port input data
pub fn idr2(&self) -> IDR2_R
[src]
Bit 2 - Port input data
pub fn idr3(&self) -> IDR3_R
[src]
Bit 3 - Port input data
pub fn idr4(&self) -> IDR4_R
[src]
Bit 4 - Port input data
pub fn idr5(&self) -> IDR5_R
[src]
Bit 5 - Port input data
pub fn idr6(&self) -> IDR6_R
[src]
Bit 6 - Port input data
pub fn idr7(&self) -> IDR7_R
[src]
Bit 7 - Port input data
pub fn idr8(&self) -> IDR8_R
[src]
Bit 8 - Port input data
pub fn idr9(&self) -> IDR9_R
[src]
Bit 9 - Port input data
pub fn idr10(&self) -> IDR10_R
[src]
Bit 10 - Port input data
pub fn idr11(&self) -> IDR11_R
[src]
Bit 11 - Port input data
pub fn idr12(&self) -> IDR12_R
[src]
Bit 12 - Port input data
pub fn idr13(&self) -> IDR13_R
[src]
Bit 13 - Port input data
pub fn idr14(&self) -> IDR14_R
[src]
Bit 14 - Port input data
pub fn idr15(&self) -> IDR15_R
[src]
Bit 15 - Port input data
impl R<bool, ODR0_A>
[src]
pub fn variant(&self) -> ODR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _ODR>>
[src]
pub fn odr0(&self) -> ODR0_R
[src]
Bit 0 - Port output data
pub fn odr1(&self) -> ODR1_R
[src]
Bit 1 - Port output data
pub fn odr2(&self) -> ODR2_R
[src]
Bit 2 - Port output data
pub fn odr3(&self) -> ODR3_R
[src]
Bit 3 - Port output data
pub fn odr4(&self) -> ODR4_R
[src]
Bit 4 - Port output data
pub fn odr5(&self) -> ODR5_R
[src]
Bit 5 - Port output data
pub fn odr6(&self) -> ODR6_R
[src]
Bit 6 - Port output data
pub fn odr7(&self) -> ODR7_R
[src]
Bit 7 - Port output data
pub fn odr8(&self) -> ODR8_R
[src]
Bit 8 - Port output data
pub fn odr9(&self) -> ODR9_R
[src]
Bit 9 - Port output data
pub fn odr10(&self) -> ODR10_R
[src]
Bit 10 - Port output data
pub fn odr11(&self) -> ODR11_R
[src]
Bit 11 - Port output data
pub fn odr12(&self) -> ODR12_R
[src]
Bit 12 - Port output data
pub fn odr13(&self) -> ODR13_R
[src]
Bit 13 - Port output data
pub fn odr14(&self) -> ODR14_R
[src]
Bit 14 - Port output data
pub fn odr15(&self) -> ODR15_R
[src]
Bit 15 - Port output data
impl R<bool, LCK0_A>
[src]
pub fn variant(&self) -> LCK0_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCK10_A>
[src]
pub fn variant(&self) -> LCK10_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCKK_A>
[src]
pub fn variant(&self) -> LCKK_A
[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool
[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _LCKR>>
[src]
pub fn lck0(&self) -> LCK0_R
[src]
Bit 0 - Port A Lock bit 0
pub fn lck1(&self) -> LCK1_R
[src]
Bit 1 - Port A Lock bit 1
pub fn lck2(&self) -> LCK2_R
[src]
Bit 2 - Port A Lock bit 2
pub fn lck3(&self) -> LCK3_R
[src]
Bit 3 - Port A Lock bit 3
pub fn lck4(&self) -> LCK4_R
[src]
Bit 4 - Port A Lock bit 4
pub fn lck5(&self) -> LCK5_R
[src]
Bit 5 - Port A Lock bit 5
pub fn lck6(&self) -> LCK6_R
[src]
Bit 6 - Port A Lock bit 6
pub fn lck7(&self) -> LCK7_R
[src]
Bit 7 - Port A Lock bit 7
pub fn lck8(&self) -> LCK8_R
[src]
Bit 8 - Port A Lock bit 8
pub fn lck9(&self) -> LCK9_R
[src]
Bit 9 - Port A Lock bit 9
pub fn lck10(&self) -> LCK10_R
[src]
Bit 10 - Port A Lock bit 10
pub fn lck11(&self) -> LCK11_R
[src]
Bit 11 - Port A Lock bit 11
pub fn lck12(&self) -> LCK12_R
[src]
Bit 12 - Port A Lock bit 12
pub fn lck13(&self) -> LCK13_R
[src]
Bit 13 - Port A Lock bit 13
pub fn lck14(&self) -> LCK14_R
[src]
Bit 14 - Port A Lock bit 14
pub fn lck15(&self) -> LCK15_R
[src]
Bit 15 - Port A Lock bit 15
pub fn lckk(&self) -> LCKK_R
[src]
Bit 16 - Lock key
impl R<u32, Reg<u32, _EVCR>>
[src]
pub fn pin(&self) -> PIN_R
[src]
Bits 0:3 - Pin selection
pub fn port(&self) -> PORT_R
[src]
Bits 4:6 - Port selection
pub fn evoe(&self) -> EVOE_R
[src]
Bit 7 - Event Output Enable
impl R<u32, Reg<u32, _MAPR>>
[src]
pub fn spi1_remap(&self) -> SPI1_REMAP_R
[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAP_R
[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAP_R
[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAP_R
[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAP_R
[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAP_R
[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAP_R
[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAP_R
[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAP_R
[src]
Bit 12 - TIM4 remapping
pub fn can_remap(&self) -> CAN_REMAP_R
[src]
Bits 13:14 - CAN1 remapping
pub fn pd01_remap(&self) -> PD01_REMAP_R
[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R
[src]
Bit 16 - Set and cleared by software
pub fn adc1_etrginj_remap(&self) -> ADC1_ETRGINJ_REMAP_R
[src]
Bit 17 - ADC 1 External trigger injected conversion remapping
pub fn adc1_etrgreg_remap(&self) -> ADC1_ETRGREG_REMAP_R
[src]
Bit 18 - ADC 1 external trigger regular conversion remapping
pub fn adc2_etrginj_remap(&self) -> ADC2_ETRGINJ_REMAP_R
[src]
Bit 19 - ADC 2 external trigger injected conversion remapping
pub fn adc2_etrgreg_remap(&self) -> ADC2_ETRGREG_REMAP_R
[src]
Bit 20 - ADC 2 external trigger regular conversion remapping
impl R<u32, Reg<u32, _EXTICR1>>
[src]
pub fn exti0(&self) -> EXTI0_R
[src]
Bits 0:3 - EXTI0 configuration
pub fn exti1(&self) -> EXTI1_R
[src]
Bits 4:7 - EXTI1 configuration
pub fn exti2(&self) -> EXTI2_R
[src]
Bits 8:11 - EXTI2 configuration
pub fn exti3(&self) -> EXTI3_R
[src]
Bits 12:15 - EXTI3 configuration
impl R<u32, Reg<u32, _EXTICR2>>
[src]
pub fn exti4(&self) -> EXTI4_R
[src]
Bits 0:3 - EXTI4 configuration
pub fn exti5(&self) -> EXTI5_R
[src]
Bits 4:7 - EXTI5 configuration
pub fn exti6(&self) -> EXTI6_R
[src]
Bits 8:11 - EXTI6 configuration
pub fn exti7(&self) -> EXTI7_R
[src]
Bits 12:15 - EXTI7 configuration
impl R<u32, Reg<u32, _EXTICR3>>
[src]
pub fn exti8(&self) -> EXTI8_R
[src]
Bits 0:3 - EXTI8 configuration
pub fn exti9(&self) -> EXTI9_R
[src]
Bits 4:7 - EXTI9 configuration
pub fn exti10(&self) -> EXTI10_R
[src]
Bits 8:11 - EXTI10 configuration
pub fn exti11(&self) -> EXTI11_R
[src]
Bits 12:15 - EXTI11 configuration
impl R<u32, Reg<u32, _EXTICR4>>
[src]
pub fn exti12(&self) -> EXTI12_R
[src]
Bits 0:3 - EXTI12 configuration
pub fn exti13(&self) -> EXTI13_R
[src]
Bits 4:7 - EXTI13 configuration
pub fn exti14(&self) -> EXTI14_R
[src]
Bits 8:11 - EXTI14 configuration
pub fn exti15(&self) -> EXTI15_R
[src]
Bits 12:15 - EXTI15 configuration
impl R<u32, Reg<u32, _MAPR2>>
[src]
pub fn tim9_remap(&self) -> TIM9_REMAP_R
[src]
Bit 5 - TIM9 remapping
pub fn tim10_remap(&self) -> TIM10_REMAP_R
[src]
Bit 6 - TIM10 remapping
pub fn tim11_remap(&self) -> TIM11_REMAP_R
[src]
Bit 7 - TIM11 remapping
pub fn tim13_remap(&self) -> TIM13_REMAP_R
[src]
Bit 8 - TIM13 remapping
pub fn tim14_remap(&self) -> TIM14_REMAP_R
[src]
Bit 9 - TIM14 remapping
pub fn fsmc_nadv(&self) -> FSMC_NADV_R
[src]
Bit 10 - NADV connect/disconnect
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _IMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Interrupt Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Interrupt Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Interrupt Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Interrupt Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Interrupt Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Interrupt Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Interrupt Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Interrupt Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Interrupt Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Interrupt Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Interrupt Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Interrupt Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Interrupt Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Interrupt Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Interrupt Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Interrupt Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Interrupt Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Interrupt Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Interrupt Mask on line 18
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Event Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Event Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Event Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Event Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Event Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Event Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Event Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Event Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Event Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Event Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Event Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Event Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Event Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Event Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Event Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Event Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Event Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Event Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Event Mask on line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Rising trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Rising trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Rising trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Rising trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Rising trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Rising trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Rising trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Rising trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Rising trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Rising trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Rising trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Rising trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Rising trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Rising trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Rising trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Rising trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Rising trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Rising trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Rising trigger event configuration of line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Falling trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Falling trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Falling trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Falling trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Falling trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Falling trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Falling trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Falling trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Falling trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Falling trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Falling trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Falling trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Falling trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Falling trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Falling trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Falling trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Falling trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Falling trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Falling trigger event configuration of line 18
impl R<bool, SWIER0_A>
[src]
pub fn variant(&self) -> Variant<bool, SWIER0_A>
[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool
[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIER>>
[src]
pub fn swier0(&self) -> SWIER0_R
[src]
Bit 0 - Software Interrupt on line 0
pub fn swier1(&self) -> SWIER1_R
[src]
Bit 1 - Software Interrupt on line 1
pub fn swier2(&self) -> SWIER2_R
[src]
Bit 2 - Software Interrupt on line 2
pub fn swier3(&self) -> SWIER3_R
[src]
Bit 3 - Software Interrupt on line 3
pub fn swier4(&self) -> SWIER4_R
[src]
Bit 4 - Software Interrupt on line 4
pub fn swier5(&self) -> SWIER5_R
[src]
Bit 5 - Software Interrupt on line 5
pub fn swier6(&self) -> SWIER6_R
[src]
Bit 6 - Software Interrupt on line 6
pub fn swier7(&self) -> SWIER7_R
[src]
Bit 7 - Software Interrupt on line 7
pub fn swier8(&self) -> SWIER8_R
[src]
Bit 8 - Software Interrupt on line 8
pub fn swier9(&self) -> SWIER9_R
[src]
Bit 9 - Software Interrupt on line 9
pub fn swier10(&self) -> SWIER10_R
[src]
Bit 10 - Software Interrupt on line 10
pub fn swier11(&self) -> SWIER11_R
[src]
Bit 11 - Software Interrupt on line 11
pub fn swier12(&self) -> SWIER12_R
[src]
Bit 12 - Software Interrupt on line 12
pub fn swier13(&self) -> SWIER13_R
[src]
Bit 13 - Software Interrupt on line 13
pub fn swier14(&self) -> SWIER14_R
[src]
Bit 14 - Software Interrupt on line 14
pub fn swier15(&self) -> SWIER15_R
[src]
Bit 15 - Software Interrupt on line 15
pub fn swier16(&self) -> SWIER16_R
[src]
Bit 16 - Software Interrupt on line 16
pub fn swier17(&self) -> SWIER17_R
[src]
Bit 17 - Software Interrupt on line 17
pub fn swier18(&self) -> SWIER18_R
[src]
Bit 18 - Software Interrupt on line 18
impl R<bool, PR0_A>
[src]
pub fn variant(&self) -> PR0_A
[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool
[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PR>>
[src]
pub fn pr0(&self) -> PR0_R
[src]
Bit 0 - Pending bit 0
pub fn pr1(&self) -> PR1_R
[src]
Bit 1 - Pending bit 1
pub fn pr2(&self) -> PR2_R
[src]
Bit 2 - Pending bit 2
pub fn pr3(&self) -> PR3_R
[src]
Bit 3 - Pending bit 3
pub fn pr4(&self) -> PR4_R
[src]
Bit 4 - Pending bit 4
pub fn pr5(&self) -> PR5_R
[src]
Bit 5 - Pending bit 5
pub fn pr6(&self) -> PR6_R
[src]
Bit 6 - Pending bit 6
pub fn pr7(&self) -> PR7_R
[src]
Bit 7 - Pending bit 7
pub fn pr8(&self) -> PR8_R
[src]
Bit 8 - Pending bit 8
pub fn pr9(&self) -> PR9_R
[src]
Bit 9 - Pending bit 9
pub fn pr10(&self) -> PR10_R
[src]
Bit 10 - Pending bit 10
pub fn pr11(&self) -> PR11_R
[src]
Bit 11 - Pending bit 11
pub fn pr12(&self) -> PR12_R
[src]
Bit 12 - Pending bit 12
pub fn pr13(&self) -> PR13_R
[src]
Bit 13 - Pending bit 13
pub fn pr14(&self) -> PR14_R
[src]
Bit 14 - Pending bit 14
pub fn pr15(&self) -> PR15_R
[src]
Bit 15 - Pending bit 15
pub fn pr16(&self) -> PR16_R
[src]
Bit 16 - Pending bit 16
pub fn pr17(&self) -> PR17_R
[src]
Bit 17 - Pending bit 17
pub fn pr18(&self) -> PR18_R
[src]
Bit 18 - Pending bit 18
impl R<bool, EN_A>
[src]
pub fn variant(&self) -> EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HTIE_A>
[src]
pub fn variant(&self) -> HTIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TEIE_A>
[src]
pub fn variant(&self) -> TEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool
[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool
[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CIRC_A>
[src]
pub fn variant(&self) -> CIRC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PINC_A>
[src]
pub fn variant(&self) -> PINC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, PSIZE_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, PL_A>
[src]
pub fn variant(&self) -> PL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool
[src]
Checks if the value of the field is VERYHIGH
impl R<bool, MEM2MEM_A>
[src]
pub fn variant(&self) -> MEM2MEM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en(&self) -> EN_R
[src]
Bit 0 - Channel enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 1 - Transfer complete interrupt enable
pub fn htie(&self) -> HTIE_R
[src]
Bit 2 - Half Transfer interrupt enable
pub fn teie(&self) -> TEIE_R
[src]
Bit 3 - Transfer error interrupt enable
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Data transfer direction
pub fn circ(&self) -> CIRC_R
[src]
Bit 5 - Circular mode
pub fn pinc(&self) -> PINC_R
[src]
Bit 6 - Peripheral increment mode
pub fn minc(&self) -> MINC_R
[src]
Bit 7 - Memory increment mode
pub fn psize(&self) -> PSIZE_R
[src]
Bits 8:9 - Peripheral size
pub fn msize(&self) -> MSIZE_R
[src]
Bits 10:11 - Memory size
pub fn pl(&self) -> PL_R
[src]
Bits 12:13 - Channel Priority level
pub fn mem2mem(&self) -> MEM2MEM_R
[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _NDTR>>
[src]
impl R<u32, Reg<u32, _PAR>>
[src]
impl R<u32, Reg<u32, _MAR>>
[src]
impl R<bool, GIF1_A>
[src]
pub fn variant(&self) -> GIF1_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<bool, TCIF1_A>
[src]
pub fn variant(&self) -> TCIF1_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTIF1_A>
[src]
pub fn variant(&self) -> HTIF1_A
[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool
[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
impl R<bool, TEIF1_A>
[src]
pub fn variant(&self) -> TEIF1_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _ISR>>
[src]
pub fn gif1(&self) -> GIF1_R
[src]
Bit 0 - Channel 1 Global interrupt flag
pub fn tcif1(&self) -> TCIF1_R
[src]
Bit 1 - Channel 1 Transfer Complete flag
pub fn htif1(&self) -> HTIF1_R
[src]
Bit 2 - Channel 1 Half Transfer Complete flag
pub fn teif1(&self) -> TEIF1_R
[src]
Bit 3 - Channel 1 Transfer Error flag
pub fn gif2(&self) -> GIF2_R
[src]
Bit 4 - Channel 2 Global interrupt flag
pub fn tcif2(&self) -> TCIF2_R
[src]
Bit 5 - Channel 2 Transfer Complete flag
pub fn htif2(&self) -> HTIF2_R
[src]
Bit 6 - Channel 2 Half Transfer Complete flag
pub fn teif2(&self) -> TEIF2_R
[src]
Bit 7 - Channel 2 Transfer Error flag
pub fn gif3(&self) -> GIF3_R
[src]
Bit 8 - Channel 3 Global interrupt flag
pub fn tcif3(&self) -> TCIF3_R
[src]
Bit 9 - Channel 3 Transfer Complete flag
pub fn htif3(&self) -> HTIF3_R
[src]
Bit 10 - Channel 3 Half Transfer Complete flag
pub fn teif3(&self) -> TEIF3_R
[src]
Bit 11 - Channel 3 Transfer Error flag
pub fn gif4(&self) -> GIF4_R
[src]
Bit 12 - Channel 4 Global interrupt flag
pub fn tcif4(&self) -> TCIF4_R
[src]
Bit 13 - Channel 4 Transfer Complete flag
pub fn htif4(&self) -> HTIF4_R
[src]
Bit 14 - Channel 4 Half Transfer Complete flag
pub fn teif4(&self) -> TEIF4_R
[src]
Bit 15 - Channel 4 Transfer Error flag
pub fn gif5(&self) -> GIF5_R
[src]
Bit 16 - Channel 5 Global interrupt flag
pub fn tcif5(&self) -> TCIF5_R
[src]
Bit 17 - Channel 5 Transfer Complete flag
pub fn htif5(&self) -> HTIF5_R
[src]
Bit 18 - Channel 5 Half Transfer Complete flag
pub fn teif5(&self) -> TEIF5_R
[src]
Bit 19 - Channel 5 Transfer Error flag
pub fn gif6(&self) -> GIF6_R
[src]
Bit 20 - Channel 6 Global interrupt flag
pub fn tcif6(&self) -> TCIF6_R
[src]
Bit 21 - Channel 6 Transfer Complete flag
pub fn htif6(&self) -> HTIF6_R
[src]
Bit 22 - Channel 6 Half Transfer Complete flag
pub fn teif6(&self) -> TEIF6_R
[src]
Bit 23 - Channel 6 Transfer Error flag
pub fn gif7(&self) -> GIF7_R
[src]
Bit 24 - Channel 7 Global interrupt flag
pub fn tcif7(&self) -> TCIF7_R
[src]
Bit 25 - Channel 7 Transfer Complete flag
pub fn htif7(&self) -> HTIF7_R
[src]
Bit 26 - Channel 7 Half Transfer Complete flag
pub fn teif7(&self) -> TEIF7_R
[src]
Bit 27 - Channel 7 Transfer Error flag
impl R<bool, SECIE_A>
[src]
pub fn variant(&self) -> SECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ALRIE_A>
[src]
pub fn variant(&self) -> ALRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OWIE_A>
[src]
pub fn variant(&self) -> OWIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn secie(&self) -> SECIE_R
[src]
Bit 0 - Second interrupt Enable
pub fn alrie(&self) -> ALRIE_R
[src]
Bit 1 - Alarm interrupt Enable
pub fn owie(&self) -> OWIE_R
[src]
Bit 2 - Overflow interrupt Enable
impl R<bool, SECF_A>
[src]
pub fn variant(&self) -> SECF_A
[src]
Get enumerated values variant
pub fn is_no_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is NOPRESCALEROVERFLOW
pub fn is_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is PRESCALEROVERFLOW
impl R<bool, ALRF_A>
[src]
pub fn variant(&self) -> ALRF_A
[src]
Get enumerated values variant
pub fn is_no_alarm(&self) -> bool
[src]
Checks if the value of the field is NOALARM
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
impl R<bool, OWF_A>
[src]
pub fn variant(&self) -> OWF_A
[src]
Get enumerated values variant
pub fn is_no_overflow(&self) -> bool
[src]
Checks if the value of the field is NOOVERFLOW
pub fn is_overflow(&self) -> bool
[src]
Checks if the value of the field is OVERFLOW
impl R<bool, RSF_A>
[src]
pub fn variant(&self) -> RSF_A
[src]
Get enumerated values variant
pub fn is_not_synchronized(&self) -> bool
[src]
Checks if the value of the field is NOTSYNCHRONIZED
pub fn is_synchronized(&self) -> bool
[src]
Checks if the value of the field is SYNCHRONIZED
impl R<bool, CNF_A>
[src]
pub fn variant(&self) -> CNF_A
[src]
Get enumerated values variant
pub fn is_exit(&self) -> bool
[src]
Checks if the value of the field is EXIT
pub fn is_enter(&self) -> bool
[src]
Checks if the value of the field is ENTER
impl R<bool, RTOFF_A>
[src]
pub fn variant(&self) -> RTOFF_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn secf(&self) -> SECF_R
[src]
Bit 0 - Second Flag
pub fn alrf(&self) -> ALRF_R
[src]
Bit 1 - Alarm Flag
pub fn owf(&self) -> OWF_R
[src]
Bit 2 - Overflow Flag
pub fn rsf(&self) -> RSF_R
[src]
Bit 3 - Registers Synchronized Flag
pub fn cnf(&self) -> CNF_R
[src]
Bit 4 - Configuration Flag
pub fn rtoff(&self) -> RTOFF_R
[src]
Bit 5 - RTC operation OFF
impl R<u32, Reg<u32, _DIVH>>
[src]
impl R<u32, Reg<u32, _DIVL>>
[src]
impl R<u32, Reg<u32, _CNTH>>
[src]
impl R<u32, Reg<u32, _CNTL>>
[src]
impl R<u8, PR_A>
[src]
pub fn variant(&self) -> PR_A
[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PR>>
[src]
impl R<u32, Reg<u32, _RLR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pvu(&self) -> PVU_R
[src]
Bit 0 - Watchdog prescaler value update
pub fn rvu(&self) -> RVU_R
[src]
Bit 1 - Watchdog counter reload value update
impl R<bool, WDGA_A>
[src]
pub fn variant(&self) -> WDGA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn t(&self) -> T_R
[src]
Bits 0:6 - 7-bit counter (MSB to LSB)
pub fn wdga(&self) -> WDGA_R
[src]
Bit 7 - Activation bit
impl R<bool, EWI_A>
[src]
pub fn variant(&self) -> Variant<bool, EWI_A>
[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
impl R<u8, WDGTB_A>
[src]
pub fn variant(&self) -> WDGTB_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFR>>
[src]
pub fn w(&self) -> W_R
[src]
Bits 0:6 - 7-bit window value
pub fn ewi(&self) -> EWI_R
[src]
Bit 9 - Early Wakeup Interrupt
pub fn wdgtb(&self) -> WDGTB_R
[src]
Bits 7:8 - Timer Base
impl R<bool, EWIF_A>
[src]
pub fn variant(&self) -> EWIF_A
[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> Variant<u8, MMS_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<bool, SWRST_A>
[src]
pub fn variant(&self) -> SWRST_A
[src]
Get enumerated values variant
pub fn is_not_reset(&self) -> bool
[src]
Checks if the value of the field is NOTRESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, ALERT_A>
[src]
pub fn variant(&self) -> ALERT_A
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
pub fn is_drive(&self) -> bool
[src]
Checks if the value of the field is DRIVE
impl R<bool, PEC_A>
[src]
pub fn variant(&self) -> PEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, POS_A>
[src]
pub fn variant(&self) -> POS_A
[src]
Get enumerated values variant
pub fn is_current(&self) -> bool
[src]
Checks if the value of the field is CURRENT
pub fn is_next(&self) -> bool
[src]
Checks if the value of the field is NEXT
impl R<bool, ACK_A>
[src]
pub fn variant(&self) -> ACK_A
[src]
Get enumerated values variant
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
impl R<bool, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, START_A>
[src]
pub fn variant(&self) -> START_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<bool, NOSTRETCH_A>
[src]
pub fn variant(&self) -> NOSTRETCH_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ENGC_A>
[src]
pub fn variant(&self) -> ENGC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENPEC_A>
[src]
pub fn variant(&self) -> ENPEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENARP_A>
[src]
pub fn variant(&self) -> ENARP_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SMBTYPE_A>
[src]
pub fn variant(&self) -> SMBTYPE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<bool, SMBUS_A>
[src]
pub fn variant(&self) -> SMBUS_A
[src]
Get enumerated values variant
pub fn is_i2c(&self) -> bool
[src]
Checks if the value of the field is I2C
pub fn is_smbus(&self) -> bool
[src]
Checks if the value of the field is SMBUS
impl R<bool, PE_A>
[src]
pub fn variant(&self) -> PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 15 - Software reset
pub fn alert(&self) -> ALERT_R
[src]
Bit 13 - SMBus alert
pub fn pec(&self) -> PEC_R
[src]
Bit 12 - Packet error checking
pub fn pos(&self) -> POS_R
[src]
Bit 11 - Acknowledge/PEC Position (for data reception)
pub fn ack(&self) -> ACK_R
[src]
Bit 10 - Acknowledge enable
pub fn stop(&self) -> STOP_R
[src]
Bit 9 - Stop generation
pub fn start(&self) -> START_R
[src]
Bit 8 - Start generation
pub fn nostretch(&self) -> NOSTRETCH_R
[src]
Bit 7 - Clock stretching disable (Slave mode)
pub fn engc(&self) -> ENGC_R
[src]
Bit 6 - General call enable
pub fn enpec(&self) -> ENPEC_R
[src]
Bit 5 - PEC enable
pub fn enarp(&self) -> ENARP_R
[src]
Bit 4 - ARP enable
pub fn smbtype(&self) -> SMBTYPE_R
[src]
Bit 3 - SMBus type
pub fn smbus(&self) -> SMBUS_R
[src]
Bit 1 - SMBus mode
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
impl R<bool, LAST_A>
[src]
pub fn variant(&self) -> LAST_A
[src]
Get enumerated values variant
pub fn is_not_last(&self) -> bool
[src]
Checks if the value of the field is NOTLAST
pub fn is_last(&self) -> bool
[src]
Checks if the value of the field is LAST
impl R<bool, DMAEN_A>
[src]
pub fn variant(&self) -> DMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITBUFEN_A>
[src]
pub fn variant(&self) -> ITBUFEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITEVTEN_A>
[src]
pub fn variant(&self) -> ITEVTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITERREN_A>
[src]
pub fn variant(&self) -> ITERREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn last(&self) -> LAST_R
[src]
Bit 12 - DMA last transfer
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 11 - DMA requests enable
pub fn itbufen(&self) -> ITBUFEN_R
[src]
Bit 10 - Buffer interrupt enable
pub fn itevten(&self) -> ITEVTEN_R
[src]
Bit 9 - Event interrupt enable
pub fn iterren(&self) -> ITERREN_R
[src]
Bit 8 - Error interrupt enable
pub fn freq(&self) -> FREQ_R
[src]
Bits 0:5 - Peripheral clock frequency
impl R<bool, ADDMODE_A>
[src]
pub fn variant(&self) -> ADDMODE_A
[src]
Get enumerated values variant
pub fn is_add7(&self) -> bool
[src]
Checks if the value of the field is ADD7
pub fn is_add10(&self) -> bool
[src]
Checks if the value of the field is ADD10
impl R<u32, Reg<u32, _OAR1>>
[src]
pub fn addmode(&self) -> ADDMODE_R
[src]
Bit 15 - Addressing mode (slave mode)
pub fn add(&self) -> ADD_R
[src]
Bits 0:9 - Interface address
impl R<bool, ENDUAL_A>
[src]
pub fn variant(&self) -> ENDUAL_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u32, Reg<u32, _OAR2>>
[src]
pub fn add2(&self) -> ADD2_R
[src]
Bits 1:7 - Interface address
pub fn endual(&self) -> ENDUAL_R
[src]
Bit 0 - Dual addressing mode enable
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, SMBALERT_A>
[src]
pub fn variant(&self) -> SMBALERT_A
[src]
Get enumerated values variant
pub fn is_no_alert(&self) -> bool
[src]
Checks if the value of the field is NOALERT
pub fn is_alert(&self) -> bool
[src]
Checks if the value of the field is ALERT
impl R<bool, TIMEOUT_A>
[src]
pub fn variant(&self) -> TIMEOUT_A
[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool
[src]
Checks if the value of the field is NOTIMEOUT
pub fn is_timeout(&self) -> bool
[src]
Checks if the value of the field is TIMEOUT
impl R<bool, PECERR_A>
[src]
pub fn variant(&self) -> PECERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, AF_A>
[src]
pub fn variant(&self) -> AF_A
[src]
Get enumerated values variant
pub fn is_no_failure(&self) -> bool
[src]
Checks if the value of the field is NOFAILURE
pub fn is_failure(&self) -> bool
[src]
Checks if the value of the field is FAILURE
impl R<bool, ARLO_A>
[src]
pub fn variant(&self) -> ARLO_A
[src]
Get enumerated values variant
pub fn is_no_lost(&self) -> bool
[src]
Checks if the value of the field is NOLOST
pub fn is_lost(&self) -> bool
[src]
Checks if the value of the field is LOST
impl R<bool, BERR_A>
[src]
pub fn variant(&self) -> BERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<bool, STOPF_A>
[src]
pub fn variant(&self) -> STOPF_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, BTF_A>
[src]
pub fn variant(&self) -> BTF_A
[src]
Get enumerated values variant
pub fn is_not_finished(&self) -> bool
[src]
Checks if the value of the field is NOTFINISHED
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<bool, ADDR_A>
[src]
pub fn variant(&self) -> ADDR_A
[src]
Get enumerated values variant
pub fn is_not_match(&self) -> bool
[src]
Checks if the value of the field is NOTMATCH
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, SB_A>
[src]
pub fn variant(&self) -> SB_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<u32, Reg<u32, _SR1>>
[src]
pub fn smbalert(&self) -> SMBALERT_R
[src]
Bit 15 - SMBus alert
pub fn timeout(&self) -> TIMEOUT_R
[src]
Bit 14 - Timeout or Tlow error
pub fn pecerr(&self) -> PECERR_R
[src]
Bit 12 - PEC Error in reception
pub fn ovr(&self) -> OVR_R
[src]
Bit 11 - Overrun/Underrun
pub fn af(&self) -> AF_R
[src]
Bit 10 - Acknowledge failure
pub fn arlo(&self) -> ARLO_R
[src]
Bit 9 - Arbitration lost (master mode)
pub fn berr(&self) -> BERR_R
[src]
Bit 8 - Bus error
pub fn tx_e(&self) -> TXE_R
[src]
Bit 7 - Data register empty (transmitters)
pub fn rx_ne(&self) -> RXNE_R
[src]
Bit 6 - Data register not empty (receivers)
pub fn stopf(&self) -> STOPF_R
[src]
Bit 4 - Stop detection (slave mode)
pub fn add10(&self) -> ADD10_R
[src]
Bit 3 - 10-bit header sent (Master mode)
pub fn btf(&self) -> BTF_R
[src]
Bit 2 - Byte transfer finished
pub fn addr(&self) -> ADDR_R
[src]
Bit 1 - Address sent (master mode)/matched (slave mode)
pub fn sb(&self) -> SB_R
[src]
Bit 0 - Start bit (Master mode)
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn pec(&self) -> PEC_R
[src]
Bits 8:15 - acket error checking register
pub fn dualf(&self) -> DUALF_R
[src]
Bit 7 - Dual flag (Slave mode)
pub fn smbhost(&self) -> SMBHOST_R
[src]
Bit 6 - SMBus host header (Slave mode)
pub fn smbdefault(&self) -> SMBDEFAULT_R
[src]
Bit 5 - SMBus device default address (Slave mode)
pub fn gencall(&self) -> GENCALL_R
[src]
Bit 4 - General call address (Slave mode)
pub fn tra(&self) -> TRA_R
[src]
Bit 2 - Transmitter/receiver
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Bus busy
pub fn msl(&self) -> MSL_R
[src]
Bit 0 - Master/slave
impl R<bool, F_S_A>
[src]
pub fn variant(&self) -> F_S_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_fast(&self) -> bool
[src]
Checks if the value of the field is FAST
impl R<bool, DUTY_A>
[src]
pub fn variant(&self) -> DUTY_A
[src]
Get enumerated values variant
pub fn is_duty2_1(&self) -> bool
[src]
Checks if the value of the field is DUTY2_1
pub fn is_duty16_9(&self) -> bool
[src]
Checks if the value of the field is DUTY16_9
impl R<u32, Reg<u32, _CCR>>
[src]
pub fn f_s(&self) -> F_S_R
[src]
Bit 15 - I2C master mode selection
pub fn duty(&self) -> DUTY_R
[src]
Bit 14 - Fast mode duty cycle
pub fn ccr(&self) -> CCR_R
[src]
Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)
impl R<u32, Reg<u32, _TRISE>>
[src]
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, UDR_A>
[src]
pub fn variant(&self) -> UDR_A
[src]
Get enumerated values variant
pub fn is_no_underrun(&self) -> bool
[src]
Checks if the value of the field is NOUNDERRUN
pub fn is_underrun(&self) -> bool
[src]
Checks if the value of the field is UNDERRUN
impl R<bool, CHSIDE_A>
[src]
pub fn variant(&self) -> CHSIDE_A
[src]
Get enumerated values variant
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn udr(&self) -> UDR_R
[src]
Bit 3 - Underrun flag
pub fn chside(&self) -> CHSIDE_R
[src]
Bit 2 - Channel side
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<bool, I2SMOD_A>
[src]
pub fn variant(&self) -> I2SMOD_A
[src]
Get enumerated values variant
pub fn is_spimode(&self) -> bool
[src]
Checks if the value of the field is SPIMODE
pub fn is_i2smode(&self) -> bool
[src]
Checks if the value of the field is I2SMODE
impl R<bool, I2SE_A>
[src]
pub fn variant(&self) -> I2SE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, I2SCFG_A>
[src]
pub fn variant(&self) -> I2SCFG_A
[src]
Get enumerated values variant
pub fn is_slave_tx(&self) -> bool
[src]
Checks if the value of the field is SLAVETX
pub fn is_slave_rx(&self) -> bool
[src]
Checks if the value of the field is SLAVERX
pub fn is_master_tx(&self) -> bool
[src]
Checks if the value of the field is MASTERTX
pub fn is_master_rx(&self) -> bool
[src]
Checks if the value of the field is MASTERRX
impl R<bool, PCMSYNC_A>
[src]
pub fn variant(&self) -> PCMSYNC_A
[src]
Get enumerated values variant
pub fn is_short(&self) -> bool
[src]
Checks if the value of the field is SHORT
pub fn is_long(&self) -> bool
[src]
Checks if the value of the field is LONG
impl R<u8, I2SSTD_A>
[src]
pub fn variant(&self) -> I2SSTD_A
[src]
Get enumerated values variant
pub fn is_philips(&self) -> bool
[src]
Checks if the value of the field is PHILIPS
pub fn is_msb(&self) -> bool
[src]
Checks if the value of the field is MSB
pub fn is_lsb(&self) -> bool
[src]
Checks if the value of the field is LSB
pub fn is_pcm(&self) -> bool
[src]
Checks if the value of the field is PCM
impl R<bool, CKPOL_A>
[src]
pub fn variant(&self) -> CKPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<u8, DATLEN_A>
[src]
pub fn variant(&self) -> Variant<u8, DATLEN_A>
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_twenty_four_bit(&self) -> bool
[src]
Checks if the value of the field is TWENTYFOURBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<bool, CHLEN_A>
[src]
pub fn variant(&self) -> CHLEN_A
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<u32, Reg<u32, _I2SCFGR>>
[src]
pub fn i2smod(&self) -> I2SMOD_R
[src]
Bit 11 - I2S mode selection
pub fn i2se(&self) -> I2SE_R
[src]
Bit 10 - I2S Enable
pub fn i2scfg(&self) -> I2SCFG_R
[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsync(&self) -> PCMSYNC_R
[src]
Bit 7 - PCM frame synchronization
pub fn i2sstd(&self) -> I2SSTD_R
[src]
Bits 4:5 - I2S standard selection
pub fn ckpol(&self) -> CKPOL_R
[src]
Bit 3 - Steady state clock polarity
pub fn datlen(&self) -> DATLEN_R
[src]
Bits 1:2 - Data length to be transferred
pub fn chlen(&self) -> CHLEN_R
[src]
Bit 0 - Channel length (number of bits per audio channel)
impl R<bool, MCKOE_A>
[src]
pub fn variant(&self) -> MCKOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ODD_A>
[src]
pub fn variant(&self) -> ODD_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<u32, Reg<u32, _I2SPR>>
[src]
pub fn mckoe(&self) -> MCKOE_R
[src]
Bit 9 - Master clock output enable
pub fn odd(&self) -> ODD_R
[src]
Bit 8 - Odd factor for the prescaler
pub fn i2sdiv(&self) -> I2SDIV_R
[src]
Bits 0:7 - I2S Linear prescaler
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cts(&self) -> CTS_R
[src]
Bit 9 - CTS flag
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - mantissa of USARTDIV
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - fraction of USARTDIV
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool
[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool
[src]
Checks if the value of the field is STOP1P5
impl R<bool, CLKEN_A>
[src]
pub fn variant(&self) -> CLKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first(&self) -> bool
[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn clken(&self) -> CLKEN_R
[src]
Bit 11 - Clock enable
pub fn cpol(&self) -> CPOL_R
[src]
Bit 10 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 9 - Clock phase
pub fn lbcl(&self) -> LBCL_R
[src]
Bit 8 - Last bit clock pulse
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
impl R<bool, CTSIE_A>
[src]
pub fn variant(&self) -> CTSIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSE_A>
[src]
pub fn variant(&self) -> CTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSE_A>
[src]
pub fn variant(&self) -> RTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>
[src]
pub fn variant(&self) -> SCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, NACK_A>
[src]
pub fn variant(&self) -> NACK_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn ctsie(&self) -> CTSIE_R
[src]
Bit 10 - CTS interrupt enable
pub fn ctse(&self) -> CTSE_R
[src]
Bit 9 - CTS enable
pub fn rtse(&self) -> RTSE_R
[src]
Bit 8 - RTS enable
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn scen(&self) -> SCEN_R
[src]
Bit 5 - Smartcard mode enable
pub fn nack(&self) -> NACK_R
[src]
Bit 4 - Smartcard NACK enable
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _GTPR>>
[src]
pub fn gt(&self) -> GT_R
[src]
Bits 8:15 - Guard time value
pub fn psc(&self) -> PSC_R
[src]
Bits 0:7 - Prescaler value
impl R<bool, EN1_A>
[src]
pub fn variant(&self) -> EN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFF1_A>
[src]
pub fn variant(&self) -> BOFF1_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, TEN1_A>
[src]
pub fn variant(&self) -> TEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL1_A>
[src]
pub fn variant(&self) -> Variant<u8, TSEL1_A>
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim3_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim15_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM15_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE1_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE1_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAEN1_A>
[src]
pub fn variant(&self) -> DMAEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL2_A>
[src]
pub fn variant(&self) -> TSEL2_A
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim8_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim5_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_tim4_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE2_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE2_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en1(&self) -> EN1_R
[src]
Bit 0 - DAC channel1 enable
pub fn boff1(&self) -> BOFF1_R
[src]
Bit 1 - DAC channel1 output buffer disable
pub fn ten1(&self) -> TEN1_R
[src]
Bit 2 - DAC channel1 trigger enable
pub fn tsel1(&self) -> TSEL1_R
[src]
Bits 3:5 - DAC channel1 trigger selection
pub fn wave1(&self) -> WAVE1_R
[src]
Bits 6:7 - DAC channel1 noise/triangle wave generation enable
pub fn mamp1(&self) -> MAMP1_R
[src]
Bits 8:11 - DAC channel1 mask/amplitude selector
pub fn dmaen1(&self) -> DMAEN1_R
[src]
Bit 12 - DAC channel1 DMA enable
pub fn en2(&self) -> EN2_R
[src]
Bit 16 - DAC channel2 enable
pub fn boff2(&self) -> BOFF2_R
[src]
Bit 17 - DAC channel2 output buffer disable
pub fn ten2(&self) -> TEN2_R
[src]
Bit 18 - DAC channel2 trigger enable
pub fn tsel2(&self) -> TSEL2_R
[src]
Bits 19:21 - DAC channel2 trigger selection
pub fn wave2(&self) -> WAVE2_R
[src]
Bits 22:23 - DAC channel2 noise/triangle wave generation enable
pub fn mamp2(&self) -> MAMP2_R
[src]
Bits 24:27 - DAC channel2 mask/amplitude selector
pub fn dmaen2(&self) -> DMAEN2_R
[src]
Bit 28 - DAC channel2 DMA enable
impl R<u32, Reg<u32, _DHR12R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:11 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 4:15 - DAC channel2 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:7 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 16:27 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12LD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 20:31 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR8RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 8:15 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DOR1>>
[src]
pub fn dacc1dor(&self) -> DACC1DOR_R
[src]
Bits 0:11 - DAC channel1 data output
impl R<u32, Reg<u32, _DOR2>>
[src]
pub fn dacc2dor(&self) -> DACC2DOR_R
[src]
Bits 0:11 - DAC channel2 data output
impl R<u32, Reg<u32, _IDCODE>>
[src]
pub fn dev_id(&self) -> DEV_ID_R
[src]
Bits 0:11 - DEV_ID
pub fn rev_id(&self) -> REV_ID_R
[src]
Bits 16:31 - REV_ID
impl R<u32, Reg<u32, _CR>>
[src]
pub fn dbg_sleep(&self) -> DBG_SLEEP_R
[src]
Bit 0 - DBG_SLEEP
pub fn dbg_stop(&self) -> DBG_STOP_R
[src]
Bit 1 - DBG_STOP
pub fn dbg_standby(&self) -> DBG_STANDBY_R
[src]
Bit 2 - DBG_STANDBY
pub fn trace_ioen(&self) -> TRACE_IOEN_R
[src]
Bit 5 - TRACE_IOEN
pub fn trace_mode(&self) -> TRACE_MODE_R
[src]
Bits 6:7 - TRACE_MODE
pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R
[src]
Bit 8 - DBG_IWDG_STOP
pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R
[src]
Bit 9 - DBG_WWDG_STOP
pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R
[src]
Bit 10 - DBG_TIM1_STOP
pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R
[src]
Bit 11 - DBG_TIM2_STOP
pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R
[src]
Bit 12 - DBG_TIM3_STOP
pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R
[src]
Bit 13 - DBG_TIM4_STOP
pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R
[src]
Bit 15 - DBG_I2C1_SMBUS_TIMEOUT
pub fn dbg_i2c2_smbus_timeout(&self) -> DBG_I2C2_SMBUS_TIMEOUT_R
[src]
Bit 16 - DBG_I2C2_SMBUS_TIMEOUT
pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R
[src]
Bit 18 - DBG_TIM5_STOP
pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R
[src]
Bit 19 - DBG_TIM6_STOP
pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R
[src]
Bit 20 - DBG_TIM7_STOP
pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R
[src]
Bit 22 - TIM15 counter stopped when core is halted
pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R
[src]
Bit 23 - TIM16 counter stopped when core is halted
pub fn dbg_tim17_stop(&self) -> DBG_TIM17_STOP_R
[src]
Bit 24 - TIM17 counter stopped when core is halted
pub fn dbg_tim12_stop(&self) -> DBG_TIM12_STOP_R
[src]
Bit 25 - TIM12 counter stopped when core is halted
pub fn dbg_tim13_stop(&self) -> DBG_TIM13_STOP_R
[src]
Bit 26 - TIM13 counter stopped when core is halted
pub fn dbg_tim14_stop(&self) -> DBG_TIM14_STOP_R
[src]
Bit 27 - TIM14 counter stopped when core is halted
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - DIV_Fraction
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - DIV_Mantissa
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> Variant<u8, STOP_A>
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _IDR>>
[src]
impl R<u8, LATENCY_A>
[src]
pub fn variant(&self) -> Variant<u8, LATENCY_A>
[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool
[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool
[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool
[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _ACR>>
[src]
pub fn latency(&self) -> LATENCY_R
[src]
Bits 0:2 - Latency
pub fn hlfcya(&self) -> HLFCYA_R
[src]
Bit 3 - Flash half cycle access enable
pub fn prftbe(&self) -> PRFTBE_R
[src]
Bit 4 - Prefetch buffer enable
pub fn prftbs(&self) -> PRFTBS_R
[src]
Bit 5 - Prefetch buffer status
impl R<u32, Reg<u32, _SR>>
[src]
pub fn eop(&self) -> EOP_R
[src]
Bit 5 - End of operation
pub fn wrprterr(&self) -> WRPRTERR_R
[src]
Bit 4 - Write protection error
pub fn pgerr(&self) -> PGERR_R
[src]
Bit 2 - Programming error
pub fn bsy(&self) -> BSY_R
[src]
Bit 0 - Busy
impl R<u32, Reg<u32, _CR>>
[src]
pub fn pg(&self) -> PG_R
[src]
Bit 0 - Programming
pub fn per(&self) -> PER_R
[src]
Bit 1 - Page Erase
pub fn mer(&self) -> MER_R
[src]
Bit 2 - Mass Erase
pub fn optpg(&self) -> OPTPG_R
[src]
Bit 4 - Option byte programming
pub fn opter(&self) -> OPTER_R
[src]
Bit 5 - Option byte erase
pub fn strt(&self) -> STRT_R
[src]
Bit 6 - Start
pub fn lock(&self) -> LOCK_R
[src]
Bit 7 - Lock
pub fn optwre(&self) -> OPTWRE_R
[src]
Bit 9 - Option bytes write enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 10 - Error interrupt enable
pub fn eopie(&self) -> EOPIE_R
[src]
Bit 12 - End of operation interrupt enable
impl R<u32, Reg<u32, _OBR>>
[src]
pub fn opterr(&self) -> OPTERR_R
[src]
Bit 0 - Option byte error
pub fn rdprt(&self) -> RDPRT_R
[src]
Bit 1 - Read protection
pub fn wdg_sw(&self) -> WDG_SW_R
[src]
Bit 2 - WDG_SW
pub fn n_rst_stop(&self) -> NRST_STOP_R
[src]
Bit 3 - nRST_STOP
pub fn n_rst_stdby(&self) -> NRST_STDBY_R
[src]
Bit 4 - nRST_STDBY
pub fn data0(&self) -> DATA0_R
[src]
Bits 10:17 - Data0
pub fn data1(&self) -> DATA1_R
[src]
Bits 18:25 - Data1
impl R<u32, Reg<u32, _WRPR>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BKP_DR>>
[src]
impl R<bool, ASOE_A>
[src]
pub fn variant(&self) -> ASOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ASOS_A>
[src]
pub fn variant(&self) -> ASOS_A
[src]
Get enumerated values variant
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<u32, Reg<u32, _RTCCR>>
[src]
pub fn cal(&self) -> CAL_R
[src]
Bits 0:6 - Calibration value
pub fn cco(&self) -> CCO_R
[src]
Bit 7 - Calibration Clock Output
pub fn asoe(&self) -> ASOE_R
[src]
Bit 8 - Alarm or second output enable
pub fn asos(&self) -> ASOS_R
[src]
Bit 9 - Alarm or second output selection
impl R<bool, TPE_A>
[src]
pub fn variant(&self) -> TPE_A
[src]
Get enumerated values variant
pub fn is_general(&self) -> bool
[src]
Checks if the value of the field is GENERAL
pub fn is_alternate(&self) -> bool
[src]
Checks if the value of the field is ALTERNATE
impl R<bool, TPAL_A>
[src]
pub fn variant(&self) -> TPAL_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CR>>
[src]
pub fn tpe(&self) -> TPE_R
[src]
Bit 0 - Tamper pin enable
pub fn tpal(&self) -> TPAL_R
[src]
Bit 1 - Tamper pin active level
impl R<bool, TPIE_A>
[src]
pub fn variant(&self) -> TPIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tpie(&self) -> TPIE_R
[src]
Bit 2 - Tamper Pin interrupt enable
pub fn tef(&self) -> TEF_R
[src]
Bit 8 - Tamper Event Flag
pub fn tif(&self) -> TIF_R
[src]
Bit 9 - Tamper Interrupt Flag
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, DUALMOD_A>
[src]
pub fn variant(&self) -> Variant<u8, DUALMOD_A>
[src]
Get enumerated values variant
pub fn is_independent(&self) -> bool
[src]
Checks if the value of the field is INDEPENDENT
pub fn is_regular_injected(&self) -> bool
[src]
Checks if the value of the field is REGULARINJECTED
pub fn is_regular_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is REGULARALTERNATETRIGGER
pub fn is_injected_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDFASTINTERLEAVED
pub fn is_injected_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDSLOWINTERLEAVED
pub fn is_injected(&self) -> bool
[src]
Checks if the value of the field is INJECTED
pub fn is_regular(&self) -> bool
[src]
Checks if the value of the field is REGULAR
pub fn is_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is FASTINTERLEAVED
pub fn is_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is SLOWINTERLEAVED
pub fn is_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is ALTERNATETRIGGER
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _FS_DCFG>>
[src]
pub fn dspd(&self) -> DSPD_R
[src]
Bits 0:1 - Device speed
pub fn nzlsohsk(&self) -> NZLSOHSK_R
[src]
Bit 2 - Non-zero-length status OUT handshake
pub fn dad(&self) -> DAD_R
[src]
Bits 4:10 - Device address
pub fn pfivl(&self) -> PFIVL_R
[src]
Bits 11:12 - Periodic frame interval
impl R<u32, Reg<u32, _FS_DCTL>>
[src]
pub fn rwusig(&self) -> RWUSIG_R
[src]
Bit 0 - Remote wakeup signaling
pub fn sdis(&self) -> SDIS_R
[src]
Bit 1 - Soft disconnect
pub fn ginsts(&self) -> GINSTS_R
[src]
Bit 2 - Global IN NAK status
pub fn gonsts(&self) -> GONSTS_R
[src]
Bit 3 - Global OUT NAK status
pub fn tctl(&self) -> TCTL_R
[src]
Bits 4:6 - Test control
pub fn sginak(&self) -> SGINAK_R
[src]
Bit 7 - Set global IN NAK
pub fn cginak(&self) -> CGINAK_R
[src]
Bit 8 - Clear global IN NAK
pub fn sgonak(&self) -> SGONAK_R
[src]
Bit 9 - Set global OUT NAK
pub fn cgonak(&self) -> CGONAK_R
[src]
Bit 10 - Clear global OUT NAK
pub fn poprgdne(&self) -> POPRGDNE_R
[src]
Bit 11 - Power-on programming done
impl R<u32, Reg<u32, _FS_DSTS>>
[src]
pub fn suspsts(&self) -> SUSPSTS_R
[src]
Bit 0 - Suspend status
pub fn enumspd(&self) -> ENUMSPD_R
[src]
Bits 1:2 - Enumerated speed
pub fn eerr(&self) -> EERR_R
[src]
Bit 3 - Erratic error
pub fn fnsof(&self) -> FNSOF_R
[src]
Bits 8:21 - Frame number of the received SOF
impl R<u32, Reg<u32, _FS_DIEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn tom(&self) -> TOM_R
[src]
Bit 3 - Timeout condition mask (Non-isochronous endpoints)
pub fn ittxfemsk(&self) -> ITTXFEMSK_R
[src]
Bit 4 - IN token received when TxFIFO empty mask
pub fn inepnmm(&self) -> INEPNMM_R
[src]
Bit 5 - IN token received with EP mismatch mask
pub fn inepnem(&self) -> INEPNEM_R
[src]
Bit 6 - IN endpoint NAK effective mask
impl R<u32, Reg<u32, _FS_DOEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn stupm(&self) -> STUPM_R
[src]
Bit 3 - SETUP phase done mask
pub fn otepdm(&self) -> OTEPDM_R
[src]
Bit 4 - OUT token received when endpoint disabled mask
impl R<u32, Reg<u32, _FS_DAINT>>
[src]
pub fn iepint(&self) -> IEPINT_R
[src]
Bits 0:15 - IN endpoint interrupt bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _FS_DAINTMSK>>
[src]
pub fn iepm(&self) -> IEPM_R
[src]
Bits 0:15 - IN EP interrupt mask bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _DVBUSDIS>>
[src]
impl R<u32, Reg<u32, _DVBUSPULSE>>
[src]
impl R<u32, Reg<u32, _DIEPEMPMSK>>
[src]
pub fn ineptxfem(&self) -> INEPTXFEM_R
[src]
Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits
impl R<u32, Reg<u32, _FS_DIEPCTL0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - Maximum packet size
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USB active endpoint
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAK status
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - STALL handshake
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TxFIFO number
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - Endpoint disable
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - Endpoint enable
impl R<u32, Reg<u32, _DIEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL0>>
[src]
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPINT0>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT1>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT2>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT3>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT0>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT1>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT2>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT3>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPTSIZ0>>
[src]
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:20 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ0>>
[src]
pub fn stupcnt(&self) -> STUPCNT_R
[src]
Bits 29:30 - SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bit 19 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ1>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ2>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ3>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DTXFSTS0>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS1>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS2>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS3>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DOEPTSIZ1>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ2>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ3>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _FS_GOTGCTL>>
[src]
pub fn srqscs(&self) -> SRQSCS_R
[src]
Bit 0 - Session request success
pub fn srq(&self) -> SRQ_R
[src]
Bit 1 - Session request
pub fn hngscs(&self) -> HNGSCS_R
[src]
Bit 8 - Host negotiation success
pub fn hnprq(&self) -> HNPRQ_R
[src]
Bit 9 - HNP request
pub fn hshnpen(&self) -> HSHNPEN_R
[src]
Bit 10 - Host set HNP enable
pub fn dhnpen(&self) -> DHNPEN_R
[src]
Bit 11 - Device HNP enabled
pub fn cidsts(&self) -> CIDSTS_R
[src]
Bit 16 - Connector ID status
pub fn dbct(&self) -> DBCT_R
[src]
Bit 17 - Long/short debounce time
pub fn asvld(&self) -> ASVLD_R
[src]
Bit 18 - A-session valid
pub fn bsvld(&self) -> BSVLD_R
[src]
Bit 19 - B-session valid
impl R<u32, Reg<u32, _FS_GOTGINT>>
[src]
pub fn sedet(&self) -> SEDET_R
[src]
Bit 2 - Session end detected
pub fn srsschg(&self) -> SRSSCHG_R
[src]
Bit 8 - Session request success status change
pub fn hnsschg(&self) -> HNSSCHG_R
[src]
Bit 9 - Host negotiation success status change
pub fn hngdet(&self) -> HNGDET_R
[src]
Bit 17 - Host negotiation detected
pub fn adtochg(&self) -> ADTOCHG_R
[src]
Bit 18 - A-device timeout change
pub fn dbcdne(&self) -> DBCDNE_R
[src]
Bit 19 - Debounce done
impl R<u32, Reg<u32, _FS_GAHBCFG>>
[src]
pub fn gint(&self) -> GINT_R
[src]
Bit 0 - Global interrupt mask
pub fn txfelvl(&self) -> TXFELVL_R
[src]
Bit 7 - TxFIFO empty level
pub fn ptxfelvl(&self) -> PTXFELVL_R
[src]
Bit 8 - Periodic TxFIFO empty level
impl R<u32, Reg<u32, _FS_GUSBCFG>>
[src]
pub fn tocal(&self) -> TOCAL_R
[src]
Bits 0:2 - FS timeout calibration
pub fn srpcap(&self) -> SRPCAP_R
[src]
Bit 8 - SRP-capable
pub fn hnpcap(&self) -> HNPCAP_R
[src]
Bit 9 - HNP-capable
pub fn trdt(&self) -> TRDT_R
[src]
Bits 10:13 - USB turnaround time
pub fn fhmod(&self) -> FHMOD_R
[src]
Bit 29 - Force host mode
pub fn fdmod(&self) -> FDMOD_R
[src]
Bit 30 - Force device mode
pub fn ctxpkt(&self) -> CTXPKT_R
[src]
Bit 31 - Corrupt Tx packet
impl R<u32, Reg<u32, _FS_GRSTCTL>>
[src]
pub fn csrst(&self) -> CSRST_R
[src]
Bit 0 - Core soft reset
pub fn hsrst(&self) -> HSRST_R
[src]
Bit 1 - HCLK soft reset
pub fn fcrst(&self) -> FCRST_R
[src]
Bit 2 - Host frame counter reset
pub fn rxfflsh(&self) -> RXFFLSH_R
[src]
Bit 4 - RxFIFO flush
pub fn txfflsh(&self) -> TXFFLSH_R
[src]
Bit 5 - TxFIFO flush
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 6:10 - TxFIFO number
pub fn ahbidl(&self) -> AHBIDL_R
[src]
Bit 31 - AHB master idle
impl R<u32, Reg<u32, _FS_GINTSTS>>
[src]
pub fn cmod(&self) -> CMOD_R
[src]
Bit 0 - Current mode of operation
pub fn mmis(&self) -> MMIS_R
[src]
Bit 1 - Mode mismatch interrupt
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt
pub fn sof(&self) -> SOF_R
[src]
Bit 3 - Start of frame
pub fn rxflvl(&self) -> RXFLVL_R
[src]
Bit 4 - RxFIFO non-empty
pub fn nptxfe(&self) -> NPTXFE_R
[src]
Bit 5 - Non-periodic TxFIFO empty
pub fn ginakeff(&self) -> GINAKEFF_R
[src]
Bit 6 - Global IN non-periodic NAK effective
pub fn goutnakeff(&self) -> GOUTNAKEFF_R
[src]
Bit 7 - Global OUT NAK effective
pub fn esusp(&self) -> ESUSP_R
[src]
Bit 10 - Early suspend
pub fn usbsusp(&self) -> USBSUSP_R
[src]
Bit 11 - USB suspend
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset
pub fn enumdne(&self) -> ENUMDNE_R
[src]
Bit 13 - Enumeration done
pub fn isoodrp(&self) -> ISOODRP_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt
pub fn eopf(&self) -> EOPF_R
[src]
Bit 15 - End of periodic frame interrupt
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoint interrupt
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoint interrupt
pub fn iisoixfr(&self) -> IISOIXFR_R
[src]
Bit 20 - Incomplete isochronous IN transfer
pub fn ipxfr_incompisoout(&self) -> IPXFR_INCOMPISOOUT_R
[src]
Bit 21 - Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)
pub fn hprtint(&self) -> HPRTINT_R
[src]
Bit 24 - Host port interrupt
pub fn hcint(&self) -> HCINT_R
[src]
Bit 25 - Host channels interrupt
pub fn ptxfe(&self) -> PTXFE_R
[src]
Bit 26 - Periodic TxFIFO empty
pub fn cidschg(&self) -> CIDSCHG_R
[src]
Bit 28 - Connector ID status change
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt
pub fn srqint(&self) -> SRQINT_R
[src]
Bit 30 - Session request/new session detected interrupt
pub fn wkupint(&self) -> WKUPINT_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt
impl R<u32, Reg<u32, _FS_GINTMSK>>
[src]
pub fn mmism(&self) -> MMISM_R
[src]
Bit 1 - Mode mismatch interrupt mask
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 3 - Start of frame mask
pub fn rxflvlm(&self) -> RXFLVLM_R
[src]
Bit 4 - Receive FIFO non-empty mask
pub fn nptxfem(&self) -> NPTXFEM_R
[src]
Bit 5 - Non-periodic TxFIFO empty mask
pub fn ginakeffm(&self) -> GINAKEFFM_R
[src]
Bit 6 - Global non-periodic IN NAK effective mask
pub fn gonakeffm(&self) -> GONAKEFFM_R
[src]
Bit 7 - Global OUT NAK effective mask
pub fn esuspm(&self) -> ESUSPM_R
[src]
Bit 10 - Early suspend mask
pub fn usbsuspm(&self) -> USBSUSPM_R
[src]
Bit 11 - USB suspend mask
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset mask
pub fn enumdnem(&self) -> ENUMDNEM_R
[src]
Bit 13 - Enumeration done mask
pub fn isoodrpm(&self) -> ISOODRPM_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt mask
pub fn eopfm(&self) -> EOPFM_R
[src]
Bit 15 - End of periodic frame interrupt mask
pub fn epmism(&self) -> EPMISM_R
[src]
Bit 17 - Endpoint mismatch interrupt mask
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoints interrupt mask
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoints interrupt mask
pub fn iisoixfrm(&self) -> IISOIXFRM_R
[src]
Bit 20 - Incomplete isochronous IN transfer mask
pub fn ipxfrm_iisooxfrm(&self) -> IPXFRM_IISOOXFRM_R
[src]
Bit 21 - Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)
pub fn prtim(&self) -> PRTIM_R
[src]
Bit 24 - Host port interrupt mask
pub fn hcim(&self) -> HCIM_R
[src]
Bit 25 - Host channels interrupt mask
pub fn ptxfem(&self) -> PTXFEM_R
[src]
Bit 26 - Periodic TxFIFO empty mask
pub fn cidschgm(&self) -> CIDSCHGM_R
[src]
Bit 28 - Connector ID status change mask
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt mask
pub fn srqim(&self) -> SRQIM_R
[src]
Bit 30 - Session request/new session detected interrupt mask
pub fn wuim(&self) -> WUIM_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt mask
impl R<u32, Reg<u32, _FS_GRXSTSR_DEVICE>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXSTSR_HOST>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXFSIZ>>
[src]
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_DEVICE>>
[src]
pub fn tx0fsa(&self) -> TX0FSA_R
[src]
Bits 0:15 - Endpoint 0 transmit RAM start address
pub fn tx0fd(&self) -> TX0FD_R
[src]
Bits 16:31 - Endpoint 0 TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_HOST>>
[src]
pub fn nptxfsa(&self) -> NPTXFSA_R
[src]
Bits 0:15 - Non-periodic transmit RAM start address
pub fn nptxfd(&self) -> NPTXFD_R
[src]
Bits 16:31 - Non-periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXSTS>>
[src]
pub fn nptxfsav(&self) -> NPTXFSAV_R
[src]
Bits 0:15 - Non-periodic TxFIFO space available
pub fn nptqxsav(&self) -> NPTQXSAV_R
[src]
Bits 16:23 - Non-periodic transmit request queue space available
pub fn nptxqtop(&self) -> NPTXQTOP_R
[src]
Bits 24:30 - Top of the non-periodic transmit request queue
impl R<u32, Reg<u32, _FS_GCCFG>>
[src]
pub fn pwrdwn(&self) -> PWRDWN_R
[src]
Bit 16 - Power down
pub fn vbusasen(&self) -> VBUSASEN_R
[src]
Bit 18 - Enable the VBUS sensing device
pub fn vbusbsen(&self) -> VBUSBSEN_R
[src]
Bit 19 - Enable the VBUS sensing device
pub fn sofouten(&self) -> SOFOUTEN_R
[src]
Bit 20 - SOF output enable
impl R<u32, Reg<u32, _FS_CID>>
[src]
pub fn product_id(&self) -> PRODUCT_ID_R
[src]
Bits 0:31 - Product ID field
impl R<u32, Reg<u32, _FS_HPTXFSIZ>>
[src]
pub fn ptxsa(&self) -> PTXSA_R
[src]
Bits 0:15 - Host periodic TxFIFO start address
pub fn ptxfsiz(&self) -> PTXFSIZ_R
[src]
Bits 16:31 - Host periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF1>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO2 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF2>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO3 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF3>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO4 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_HCFG>>
[src]
pub fn fslspcs(&self) -> FSLSPCS_R
[src]
Bits 0:1 - FS/LS PHY clock select
pub fn fslss(&self) -> FSLSS_R
[src]
Bit 2 - FS- and LS-only support
impl R<u32, Reg<u32, _HFIR>>
[src]
impl R<u32, Reg<u32, _FS_HFNUM>>
[src]
pub fn frnum(&self) -> FRNUM_R
[src]
Bits 0:15 - Frame number
pub fn ftrem(&self) -> FTREM_R
[src]
Bits 16:31 - Frame time remaining
impl R<u32, Reg<u32, _FS_HPTXSTS>>
[src]
pub fn ptxfsavl(&self) -> PTXFSAVL_R
[src]
Bits 0:15 - Periodic transmit data FIFO space available
pub fn ptxqsav(&self) -> PTXQSAV_R
[src]
Bits 16:23 - Periodic transmit request queue space available
pub fn ptxqtop(&self) -> PTXQTOP_R
[src]
Bits 24:31 - Top of the periodic transmit request queue
impl R<u32, Reg<u32, _HAINT>>
[src]
impl R<u32, Reg<u32, _HAINTMSK>>
[src]
impl R<u32, Reg<u32, _FS_HPRT>>
[src]
pub fn pcsts(&self) -> PCSTS_R
[src]
Bit 0 - Port connect status
pub fn pcdet(&self) -> PCDET_R
[src]
Bit 1 - Port connect detected
pub fn pena(&self) -> PENA_R
[src]
Bit 2 - Port enable
pub fn penchng(&self) -> PENCHNG_R
[src]
Bit 3 - Port enable/disable change
pub fn poca(&self) -> POCA_R
[src]
Bit 4 - Port overcurrent active
pub fn pocchng(&self) -> POCCHNG_R
[src]
Bit 5 - Port overcurrent change
pub fn pres(&self) -> PRES_R
[src]
Bit 6 - Port resume
pub fn psusp(&self) -> PSUSP_R
[src]
Bit 7 - Port suspend
pub fn prst(&self) -> PRST_R
[src]
Bit 8 - Port reset
pub fn plsts(&self) -> PLSTS_R
[src]
Bits 10:11 - Port line status
pub fn ppwr(&self) -> PPWR_R
[src]
Bit 12 - Port power
pub fn ptctl(&self) -> PTCTL_R
[src]
Bits 13:16 - Port test control
pub fn pspd(&self) -> PSPD_R
[src]
Bits 17:18 - Port speed
impl R<u32, Reg<u32, _FS_HCCHAR0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR1>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR2>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR3>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR4>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR5>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR6>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR7>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCINT0>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT1>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT2>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT3>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT4>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT5>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT6>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT7>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINTMSK0>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK1>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK2>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK3>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK4>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK5>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK6>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK7>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCTSIZ0>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ1>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ2>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ3>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ4>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ5>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ6>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ7>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_PCGCCTL>>
[src]
pub fn stppclk(&self) -> STPPCLK_R
[src]
Bit 0 - Stop PHY clock
pub fn gatehclk(&self) -> GATEHCLK_R
[src]
Bit 1 - Gate HCLK
pub fn physusp(&self) -> PHYSUSP_R
[src]
Bit 4 - PHY Suspended
impl R<u32, Reg<u32, _TIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
pub fn txrq(&self) -> TXRQ_R
[src]
Bit 0 - TXRQ
impl R<u32, Reg<u32, _TDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn tgt(&self) -> TGT_R
[src]
Bit 8 - TGT
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _TDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _TDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _RIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
impl R<u32, Reg<u32, _RDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn fmi(&self) -> FMI_R
[src]
Bits 8:15 - FMI
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _RDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _RDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _FR1>>
[src]
impl R<u32, Reg<u32, _FR2>>
[src]
impl R<u32, Reg<u32, _MCR>>
[src]
pub fn dbf(&self) -> DBF_R
[src]
Bit 16 - DBF
pub fn reset(&self) -> RESET_R
[src]
Bit 15 - RESET
pub fn ttcm(&self) -> TTCM_R
[src]
Bit 7 - TTCM
pub fn abom(&self) -> ABOM_R
[src]
Bit 6 - ABOM
pub fn awum(&self) -> AWUM_R
[src]
Bit 5 - AWUM
pub fn nart(&self) -> NART_R
[src]
Bit 4 - NART
pub fn rflm(&self) -> RFLM_R
[src]
Bit 3 - RFLM
pub fn txfp(&self) -> TXFP_R
[src]
Bit 2 - TXFP
pub fn sleep(&self) -> SLEEP_R
[src]
Bit 1 - SLEEP
pub fn inrq(&self) -> INRQ_R
[src]
Bit 0 - INRQ
impl R<u32, Reg<u32, _MSR>>
[src]
pub fn rx(&self) -> RX_R
[src]
Bit 11 - RX
pub fn samp(&self) -> SAMP_R
[src]
Bit 10 - SAMP
pub fn rxm(&self) -> RXM_R
[src]
Bit 9 - RXM
pub fn txm(&self) -> TXM_R
[src]
Bit 8 - TXM
pub fn slaki(&self) -> SLAKI_R
[src]
Bit 4 - SLAKI
pub fn wkui(&self) -> WKUI_R
[src]
Bit 3 - WKUI
pub fn erri(&self) -> ERRI_R
[src]
Bit 2 - ERRI
pub fn slak(&self) -> SLAK_R
[src]
Bit 1 - SLAK
pub fn inak(&self) -> INAK_R
[src]
Bit 0 - INAK
impl R<u32, Reg<u32, _TSR>>
[src]
pub fn low2(&self) -> LOW2_R
[src]
Bit 31 - Lowest priority flag for mailbox 2
pub fn low1(&self) -> LOW1_R
[src]
Bit 30 - Lowest priority flag for mailbox 1
pub fn low0(&self) -> LOW0_R
[src]
Bit 29 - Lowest priority flag for mailbox 0
pub fn tme2(&self) -> TME2_R
[src]
Bit 28 - Lowest priority flag for mailbox 2
pub fn tme1(&self) -> TME1_R
[src]
Bit 27 - Lowest priority flag for mailbox 1
pub fn tme0(&self) -> TME0_R
[src]
Bit 26 - Lowest priority flag for mailbox 0
pub fn code(&self) -> CODE_R
[src]
Bits 24:25 - CODE
pub fn abrq2(&self) -> ABRQ2_R
[src]
Bit 23 - ABRQ2
pub fn terr2(&self) -> TERR2_R
[src]
Bit 19 - TERR2
pub fn alst2(&self) -> ALST2_R
[src]
Bit 18 - ALST2
pub fn txok2(&self) -> TXOK2_R
[src]
Bit 17 - TXOK2
pub fn rqcp2(&self) -> RQCP2_R
[src]
Bit 16 - RQCP2
pub fn abrq1(&self) -> ABRQ1_R
[src]
Bit 15 - ABRQ1
pub fn terr1(&self) -> TERR1_R
[src]
Bit 11 - TERR1
pub fn alst1(&self) -> ALST1_R
[src]
Bit 10 - ALST1
pub fn txok1(&self) -> TXOK1_R
[src]
Bit 9 - TXOK1
pub fn rqcp1(&self) -> RQCP1_R
[src]
Bit 8 - RQCP1
pub fn abrq0(&self) -> ABRQ0_R
[src]
Bit 7 - ABRQ0
pub fn terr0(&self) -> TERR0_R
[src]
Bit 3 - TERR0
pub fn alst0(&self) -> ALST0_R
[src]
Bit 2 - ALST0
pub fn txok0(&self) -> TXOK0_R
[src]
Bit 1 - TXOK0
pub fn rqcp0(&self) -> RQCP0_R
[src]
Bit 0 - RQCP0
impl R<u32, Reg<u32, _RFR>>
[src]
pub fn rfom(&self) -> RFOM_R
[src]
Bit 5 - RFOM0
pub fn fovr(&self) -> FOVR_R
[src]
Bit 4 - FOVR0
pub fn full(&self) -> FULL_R
[src]
Bit 3 - FULL0
pub fn fmp(&self) -> FMP_R
[src]
Bits 0:1 - FMP0
impl R<u32, Reg<u32, _IER>>
[src]
pub fn slkie(&self) -> SLKIE_R
[src]
Bit 17 - SLKIE
pub fn wkuie(&self) -> WKUIE_R
[src]
Bit 16 - WKUIE
pub fn errie(&self) -> ERRIE_R
[src]
Bit 15 - ERRIE
pub fn lecie(&self) -> LECIE_R
[src]
Bit 11 - LECIE
pub fn bofie(&self) -> BOFIE_R
[src]
Bit 10 - BOFIE
pub fn epvie(&self) -> EPVIE_R
[src]
Bit 9 - EPVIE
pub fn ewgie(&self) -> EWGIE_R
[src]
Bit 8 - EWGIE
pub fn fovie1(&self) -> FOVIE1_R
[src]
Bit 6 - FOVIE1
pub fn ffie1(&self) -> FFIE1_R
[src]
Bit 5 - FFIE1
pub fn fmpie1(&self) -> FMPIE1_R
[src]
Bit 4 - FMPIE1
pub fn fovie0(&self) -> FOVIE0_R
[src]
Bit 3 - FOVIE0
pub fn ffie0(&self) -> FFIE0_R
[src]
Bit 2 - FFIE0
pub fn fmpie0(&self) -> FMPIE0_R
[src]
Bit 1 - FMPIE0
pub fn tmeie(&self) -> TMEIE_R
[src]
Bit 0 - TMEIE
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn rec(&self) -> REC_R
[src]
Bits 24:31 - REC
pub fn tec(&self) -> TEC_R
[src]
Bits 16:23 - TEC
pub fn lec(&self) -> LEC_R
[src]
Bits 4:6 - LEC
pub fn boff(&self) -> BOFF_R
[src]
Bit 2 - BOFF
pub fn epvf(&self) -> EPVF_R
[src]
Bit 1 - EPVF
pub fn ewgf(&self) -> EWGF_R
[src]
Bit 0 - EWGF
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn silm(&self) -> SILM_R
[src]
Bit 31 - SILM
pub fn lbkm(&self) -> LBKM_R
[src]
Bit 30 - LBKM
pub fn sjw(&self) -> SJW_R
[src]
Bits 24:25 - SJW
pub fn ts2(&self) -> TS2_R
[src]
Bits 20:22 - TS2
pub fn ts1(&self) -> TS1_R
[src]
Bits 16:19 - TS1
pub fn brp(&self) -> BRP_R
[src]
Bits 0:9 - BRP
impl R<u32, Reg<u32, _FMR>>
[src]
pub fn can2sb(&self) -> CAN2SB_R
[src]
Bits 8:13 - CAN2SB
pub fn finit(&self) -> FINIT_R
[src]
Bit 0 - FINIT
impl R<u32, Reg<u32, _FM1R>>
[src]
pub fn fbm0(&self) -> FBM0_R
[src]
Bit 0 - Filter mode
pub fn fbm1(&self) -> FBM1_R
[src]
Bit 1 - Filter mode
pub fn fbm2(&self) -> FBM2_R
[src]
Bit 2 - Filter mode
pub fn fbm3(&self) -> FBM3_R
[src]
Bit 3 - Filter mode
pub fn fbm4(&self) -> FBM4_R
[src]
Bit 4 - Filter mode
pub fn fbm5(&self) -> FBM5_R
[src]
Bit 5 - Filter mode
pub fn fbm6(&self) -> FBM6_R
[src]
Bit 6 - Filter mode
pub fn fbm7(&self) -> FBM7_R
[src]
Bit 7 - Filter mode
pub fn fbm8(&self) -> FBM8_R
[src]
Bit 8 - Filter mode
pub fn fbm9(&self) -> FBM9_R
[src]
Bit 9 - Filter mode
pub fn fbm10(&self) -> FBM10_R
[src]
Bit 10 - Filter mode
pub fn fbm11(&self) -> FBM11_R
[src]
Bit 11 - Filter mode
pub fn fbm12(&self) -> FBM12_R
[src]
Bit 12 - Filter mode
pub fn fbm13(&self) -> FBM13_R
[src]
Bit 13 - Filter mode
pub fn fbm14(&self) -> FBM14_R
[src]
Bit 14 - Filter mode
pub fn fbm15(&self) -> FBM15_R
[src]
Bit 15 - Filter mode
pub fn fbm16(&self) -> FBM16_R
[src]
Bit 16 - Filter mode
pub fn fbm17(&self) -> FBM17_R
[src]
Bit 17 - Filter mode
pub fn fbm18(&self) -> FBM18_R
[src]
Bit 18 - Filter mode
pub fn fbm19(&self) -> FBM19_R
[src]
Bit 19 - Filter mode
pub fn fbm20(&self) -> FBM20_R
[src]
Bit 20 - Filter mode
pub fn fbm21(&self) -> FBM21_R
[src]
Bit 21 - Filter mode
pub fn fbm22(&self) -> FBM22_R
[src]
Bit 22 - Filter mode
pub fn fbm23(&self) -> FBM23_R
[src]
Bit 23 - Filter mode
pub fn fbm24(&self) -> FBM24_R
[src]
Bit 24 - Filter mode
pub fn fbm25(&self) -> FBM25_R
[src]
Bit 25 - Filter mode
pub fn fbm26(&self) -> FBM26_R
[src]
Bit 26 - Filter mode
pub fn fbm27(&self) -> FBM27_R
[src]
Bit 27 - Filter mode
impl R<u32, Reg<u32, _FS1R>>
[src]
pub fn fsc0(&self) -> FSC0_R
[src]
Bit 0 - Filter scale configuration
pub fn fsc1(&self) -> FSC1_R
[src]
Bit 1 - Filter scale configuration
pub fn fsc2(&self) -> FSC2_R
[src]
Bit 2 - Filter scale configuration
pub fn fsc3(&self) -> FSC3_R
[src]
Bit 3 - Filter scale configuration
pub fn fsc4(&self) -> FSC4_R
[src]
Bit 4 - Filter scale configuration
pub fn fsc5(&self) -> FSC5_R
[src]
Bit 5 - Filter scale configuration
pub fn fsc6(&self) -> FSC6_R
[src]
Bit 6 - Filter scale configuration
pub fn fsc7(&self) -> FSC7_R
[src]
Bit 7 - Filter scale configuration
pub fn fsc8(&self) -> FSC8_R
[src]
Bit 8 - Filter scale configuration
pub fn fsc9(&self) -> FSC9_R
[src]
Bit 9 - Filter scale configuration
pub fn fsc10(&self) -> FSC10_R
[src]
Bit 10 - Filter scale configuration
pub fn fsc11(&self) -> FSC11_R
[src]
Bit 11 - Filter scale configuration
pub fn fsc12(&self) -> FSC12_R
[src]
Bit 12 - Filter scale configuration
pub fn fsc13(&self) -> FSC13_R
[src]
Bit 13 - Filter scale configuration
pub fn fsc14(&self) -> FSC14_R
[src]
Bit 14 - Filter scale configuration
pub fn fsc15(&self) -> FSC15_R
[src]
Bit 15 - Filter scale configuration
pub fn fsc16(&self) -> FSC16_R
[src]
Bit 16 - Filter scale configuration
pub fn fsc17(&self) -> FSC17_R
[src]
Bit 17 - Filter scale configuration
pub fn fsc18(&self) -> FSC18_R
[src]
Bit 18 - Filter scale configuration
pub fn fsc19(&self) -> FSC19_R
[src]
Bit 19 - Filter scale configuration
pub fn fsc20(&self) -> FSC20_R
[src]
Bit 20 - Filter scale configuration
pub fn fsc21(&self) -> FSC21_R
[src]
Bit 21 - Filter scale configuration
pub fn fsc22(&self) -> FSC22_R
[src]
Bit 22 - Filter scale configuration
pub fn fsc23(&self) -> FSC23_R
[src]
Bit 23 - Filter scale configuration
pub fn fsc24(&self) -> FSC24_R
[src]
Bit 24 - Filter scale configuration
pub fn fsc25(&self) -> FSC25_R
[src]
Bit 25 - Filter scale configuration
pub fn fsc26(&self) -> FSC26_R
[src]
Bit 26 - Filter scale configuration
pub fn fsc27(&self) -> FSC27_R
[src]
Bit 27 - Filter scale configuration
impl R<u32, Reg<u32, _FFA1R>>
[src]
pub fn ffa0(&self) -> FFA0_R
[src]
Bit 0 - Filter FIFO assignment for filter 0
pub fn ffa1(&self) -> FFA1_R
[src]
Bit 1 - Filter FIFO assignment for filter 1
pub fn ffa2(&self) -> FFA2_R
[src]
Bit 2 - Filter FIFO assignment for filter 2
pub fn ffa3(&self) -> FFA3_R
[src]
Bit 3 - Filter FIFO assignment for filter 3
pub fn ffa4(&self) -> FFA4_R
[src]
Bit 4 - Filter FIFO assignment for filter 4
pub fn ffa5(&self) -> FFA5_R
[src]
Bit 5 - Filter FIFO assignment for filter 5
pub fn ffa6(&self) -> FFA6_R
[src]
Bit 6 - Filter FIFO assignment for filter 6
pub fn ffa7(&self) -> FFA7_R
[src]
Bit 7 - Filter FIFO assignment for filter 7
pub fn ffa8(&self) -> FFA8_R
[src]
Bit 8 - Filter FIFO assignment for filter 8
pub fn ffa9(&self) -> FFA9_R
[src]
Bit 9 - Filter FIFO assignment for filter 9
pub fn ffa10(&self) -> FFA10_R
[src]
Bit 10 - Filter FIFO assignment for filter 10
pub fn ffa11(&self) -> FFA11_R
[src]
Bit 11 - Filter FIFO assignment for filter 11
pub fn ffa12(&self) -> FFA12_R
[src]
Bit 12 - Filter FIFO assignment for filter 12
pub fn ffa13(&self) -> FFA13_R
[src]
Bit 13 - Filter FIFO assignment for filter 13
pub fn ffa14(&self) -> FFA14_R
[src]
Bit 14 - Filter FIFO assignment for filter 14
pub fn ffa15(&self) -> FFA15_R
[src]
Bit 15 - Filter FIFO assignment for filter 15
pub fn ffa16(&self) -> FFA16_R
[src]
Bit 16 - Filter FIFO assignment for filter 16
pub fn ffa17(&self) -> FFA17_R
[src]
Bit 17 - Filter FIFO assignment for filter 17
pub fn ffa18(&self) -> FFA18_R
[src]
Bit 18 - Filter FIFO assignment for filter 18
pub fn ffa19(&self) -> FFA19_R
[src]
Bit 19 - Filter FIFO assignment for filter 19
pub fn ffa20(&self) -> FFA20_R
[src]
Bit 20 - Filter FIFO assignment for filter 20
pub fn ffa21(&self) -> FFA21_R
[src]
Bit 21 - Filter FIFO assignment for filter 21
pub fn ffa22(&self) -> FFA22_R
[src]
Bit 22 - Filter FIFO assignment for filter 22
pub fn ffa23(&self) -> FFA23_R
[src]
Bit 23 - Filter FIFO assignment for filter 23
pub fn ffa24(&self) -> FFA24_R
[src]
Bit 24 - Filter FIFO assignment for filter 24
pub fn ffa25(&self) -> FFA25_R
[src]
Bit 25 - Filter FIFO assignment for filter 25
pub fn ffa26(&self) -> FFA26_R
[src]
Bit 26 - Filter FIFO assignment for filter 26
pub fn ffa27(&self) -> FFA27_R
[src]
Bit 27 - Filter FIFO assignment for filter 27
impl R<u32, Reg<u32, _FA1R>>
[src]
pub fn fact0(&self) -> FACT0_R
[src]
Bit 0 - Filter active
pub fn fact1(&self) -> FACT1_R
[src]
Bit 1 - Filter active
pub fn fact2(&self) -> FACT2_R
[src]
Bit 2 - Filter active
pub fn fact3(&self) -> FACT3_R
[src]
Bit 3 - Filter active
pub fn fact4(&self) -> FACT4_R
[src]
Bit 4 - Filter active
pub fn fact5(&self) -> FACT5_R
[src]
Bit 5 - Filter active
pub fn fact6(&self) -> FACT6_R
[src]
Bit 6 - Filter active
pub fn fact7(&self) -> FACT7_R
[src]
Bit 7 - Filter active
pub fn fact8(&self) -> FACT8_R
[src]
Bit 8 - Filter active
pub fn fact9(&self) -> FACT9_R
[src]
Bit 9 - Filter active
pub fn fact10(&self) -> FACT10_R
[src]
Bit 10 - Filter active
pub fn fact11(&self) -> FACT11_R
[src]
Bit 11 - Filter active
pub fn fact12(&self) -> FACT12_R
[src]
Bit 12 - Filter active
pub fn fact13(&self) -> FACT13_R
[src]
Bit 13 - Filter active
pub fn fact14(&self) -> FACT14_R
[src]
Bit 14 - Filter active
pub fn fact15(&self) -> FACT15_R
[src]
Bit 15 - Filter active
pub fn fact16(&self) -> FACT16_R
[src]
Bit 16 - Filter active
pub fn fact17(&self) -> FACT17_R
[src]
Bit 17 - Filter active
pub fn fact18(&self) -> FACT18_R
[src]
Bit 18 - Filter active
pub fn fact19(&self) -> FACT19_R
[src]
Bit 19 - Filter active
pub fn fact20(&self) -> FACT20_R
[src]
Bit 20 - Filter active
pub fn fact21(&self) -> FACT21_R
[src]
Bit 21 - Filter active
pub fn fact22(&self) -> FACT22_R
[src]
Bit 22 - Filter active
pub fn fact23(&self) -> FACT23_R
[src]
Bit 23 - Filter active
pub fn fact24(&self) -> FACT24_R
[src]
Bit 24 - Filter active
pub fn fact25(&self) -> FACT25_R
[src]
Bit 25 - Filter active
pub fn fact26(&self) -> FACT26_R
[src]
Bit 26 - Filter active
pub fn fact27(&self) -> FACT27_R
[src]
Bit 27 - Filter active
impl R<u32, Reg<u32, _MMCCR>>
[src]
pub fn cr(&self) -> CR_R
[src]
Bit 0 - Counter reset
pub fn csr(&self) -> CSR_R
[src]
Bit 1 - Counter stop rollover
pub fn ror(&self) -> ROR_R
[src]
Bit 2 - Reset on read
pub fn mcf(&self) -> MCF_R
[src]
Bit 31 - MMC counter freeze
impl R<u32, Reg<u32, _MMCRIR>>
[src]
pub fn rfces(&self) -> RFCES_R
[src]
Bit 5 - Received frames CRC error status
pub fn rfaes(&self) -> RFAES_R
[src]
Bit 6 - Received frames alignment error status
pub fn rgufs(&self) -> RGUFS_R
[src]
Bit 17 - Received Good Unicast Frames Status
impl R<u32, Reg<u32, _MMCTIR>>
[src]
pub fn tgfscs(&self) -> TGFSCS_R
[src]
Bit 14 - Transmitted good frames single collision status
pub fn tgfmscs(&self) -> TGFMSCS_R
[src]
Bit 15 - Transmitted good frames more single collision status
pub fn tgfs(&self) -> TGFS_R
[src]
Bit 21 - Transmitted good frames status
impl R<u32, Reg<u32, _MMCRIMR>>
[src]
pub fn rfcem(&self) -> RFCEM_R
[src]
Bit 5 - Received frame CRC error mask
pub fn rfaem(&self) -> RFAEM_R
[src]
Bit 6 - Received frames alignment error mask
pub fn rgufm(&self) -> RGUFM_R
[src]
Bit 17 - Received good unicast frames mask
impl R<u32, Reg<u32, _MMCTIMR>>
[src]
pub fn tgfscm(&self) -> TGFSCM_R
[src]
Bit 14 - Transmitted good frames single collision mask
pub fn tgfmscm(&self) -> TGFMSCM_R
[src]
Bit 15 - Transmitted good frames more single collision mask
pub fn tgfm(&self) -> TGFM_R
[src]
Bit 21 - Transmitted good frames mask
impl R<u32, Reg<u32, _MMCTGFSCCR>>
[src]
pub fn tgfscc(&self) -> TGFSCC_R
[src]
Bits 0:31 - Transmitted good frames after a single collision counter
impl R<u32, Reg<u32, _MMCTGFMSCCR>>
[src]
pub fn tgfmscc(&self) -> TGFMSCC_R
[src]
Bits 0:31 - Transmitted good frames after more than a single collision counter
impl R<u32, Reg<u32, _MMCTGFCR>>
[src]
impl R<u32, Reg<u32, _MMCRFCECR>>
[src]
impl R<u32, Reg<u32, _MMCRFAECR>>
[src]
impl R<u32, Reg<u32, _MMCRGUFCR>>
[src]
impl R<u32, Reg<u32, _MACCR>>
[src]
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn dc(&self) -> DC_R
[src]
Bit 4 - Deferral check
pub fn bl(&self) -> BL_R
[src]
Bits 5:6 - Back-off limit
pub fn apcs(&self) -> APCS_R
[src]
Bit 7 - Automatic pad/CRC stripping
pub fn rd(&self) -> RD_R
[src]
Bit 9 - Retry disable
pub fn ipco(&self) -> IPCO_R
[src]
Bit 10 - IPv4 checksum offload
pub fn dm(&self) -> DM_R
[src]
Bit 11 - Duplex mode
pub fn lm(&self) -> LM_R
[src]
Bit 12 - Loopback mode
pub fn rod(&self) -> ROD_R
[src]
Bit 13 - Receive own disable
pub fn fes(&self) -> FES_R
[src]
Bit 14 - Fast Ethernet speed
pub fn csd(&self) -> CSD_R
[src]
Bit 16 - Carrier sense disable
pub fn ifg(&self) -> IFG_R
[src]
Bits 17:19 - Interframe gap
pub fn jd(&self) -> JD_R
[src]
Bit 22 - Jabber disable
pub fn wd(&self) -> WD_R
[src]
Bit 23 - Watchdog disable
impl R<u32, Reg<u32, _MACFFR>>
[src]
pub fn pm(&self) -> PM_R
[src]
Bit 0 - Promiscuous mode
pub fn hu(&self) -> HU_R
[src]
Bit 1 - Hash unicast
pub fn hm(&self) -> HM_R
[src]
Bit 2 - Hash multicast
pub fn daif(&self) -> DAIF_R
[src]
Bit 3 - Destination address inverse filtering
pub fn pam(&self) -> PAM_R
[src]
Bit 4 - Pass all multicast
pub fn bfd(&self) -> BFD_R
[src]
Bit 5 - Broadcast frames disable
pub fn pcf(&self) -> PCF_R
[src]
Bits 6:7 - Pass control frames
pub fn saif(&self) -> SAIF_R
[src]
Bit 8 - Source address inverse filtering
pub fn saf(&self) -> SAF_R
[src]
Bit 9 - Source address filter
pub fn hpf(&self) -> HPF_R
[src]
Bit 10 - Hash or perfect filter
pub fn ra(&self) -> RA_R
[src]
Bit 31 - Receive all
impl R<u32, Reg<u32, _MACHTHR>>
[src]
impl R<u32, Reg<u32, _MACHTLR>>
[src]
impl R<u32, Reg<u32, _MACMIIAR>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - MII busy
pub fn mw(&self) -> MW_R
[src]
Bit 1 - MII write
pub fn cr(&self) -> CR_R
[src]
Bits 2:4 - Clock range
pub fn mr(&self) -> MR_R
[src]
Bits 6:10 - MII register
pub fn pa(&self) -> PA_R
[src]
Bits 11:15 - PHY address
impl R<u32, Reg<u32, _MACMIIDR>>
[src]
impl R<u32, Reg<u32, _MACFCR>>
[src]
pub fn fcb_bpa(&self) -> FCB_BPA_R
[src]
Bit 0 - Flow control busy/back pressure activate
pub fn tfce(&self) -> TFCE_R
[src]
Bit 1 - Transmit flow control enable
pub fn rfce(&self) -> RFCE_R
[src]
Bit 2 - Receive flow control enable
pub fn upfd(&self) -> UPFD_R
[src]
Bit 3 - Unicast pause frame detect
pub fn plt(&self) -> PLT_R
[src]
Bits 4:5 - Pause low threshold
pub fn zqpd(&self) -> ZQPD_R
[src]
Bit 7 - Zero-quanta pause disable
pub fn pt(&self) -> PT_R
[src]
Bits 16:31 - Pass control frames
impl R<u32, Reg<u32, _MACVLANTR>>
[src]
pub fn vlanti(&self) -> VLANTI_R
[src]
Bits 0:15 - VLAN tag identifier (for receive frames)
pub fn vlantc(&self) -> VLANTC_R
[src]
Bit 16 - 12-bit VLAN tag comparison
impl R<u32, Reg<u32, _MACPMTCSR>>
[src]
pub fn pd(&self) -> PD_R
[src]
Bit 0 - Power down
pub fn mpe(&self) -> MPE_R
[src]
Bit 1 - Magic Packet enable
pub fn wfe(&self) -> WFE_R
[src]
Bit 2 - Wakeup frame enable
pub fn mpr(&self) -> MPR_R
[src]
Bit 5 - Magic packet received
pub fn wfr(&self) -> WFR_R
[src]
Bit 6 - Wakeup frame received
pub fn gu(&self) -> GU_R
[src]
Bit 9 - Global unicast
pub fn wffrpr(&self) -> WFFRPR_R
[src]
Bit 31 - Wakeup frame filter register pointer reset
impl R<u32, Reg<u32, _MACSR>>
[src]
pub fn pmts(&self) -> PMTS_R
[src]
Bit 3 - PMT status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 4 - MMC status
pub fn mmcrs(&self) -> MMCRS_R
[src]
Bit 5 - MMC receive status
pub fn mmcts(&self) -> MMCTS_R
[src]
Bit 6 - MMC transmit status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 9 - Time stamp trigger status
impl R<u32, Reg<u32, _MACIMR>>
[src]
pub fn pmtim(&self) -> PMTIM_R
[src]
Bit 3 - PMT interrupt mask
pub fn tstim(&self) -> TSTIM_R
[src]
Bit 9 - Time stamp trigger interrupt mask
impl R<u32, Reg<u32, _MACA0HR>>
[src]
pub fn maca0h(&self) -> MACA0H_R
[src]
Bits 0:15 - MAC address0 high
pub fn mo(&self) -> MO_R
[src]
Bit 31 - Always 1
impl R<u32, Reg<u32, _MACA0LR>>
[src]
impl R<u32, Reg<u32, _MACA1HR>>
[src]
pub fn maca1h(&self) -> MACA1H_R
[src]
Bits 0:15 - MAC address1 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA1LR>>
[src]
impl R<u32, Reg<u32, _MACA2HR>>
[src]
pub fn eth_maca2hr(&self) -> ETH_MACA2HR_R
[src]
Bits 0:15 - Ethernet MAC address 2 high register
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA2LR>>
[src]
impl R<u32, Reg<u32, _MACA3HR>>
[src]
pub fn maca3h(&self) -> MACA3H_R
[src]
Bits 0:15 - MAC address3 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA3LR>>
[src]
impl R<u32, Reg<u32, _PTPTSCR>>
[src]
pub fn tse(&self) -> TSE_R
[src]
Bit 0 - Time stamp enable
pub fn tsfcu(&self) -> TSFCU_R
[src]
Bit 1 - Time stamp fine or coarse update
pub fn tssti(&self) -> TSSTI_R
[src]
Bit 2 - Time stamp system time initialize
pub fn tsstu(&self) -> TSSTU_R
[src]
Bit 3 - Time stamp system time update
pub fn tsite(&self) -> TSITE_R
[src]
Bit 4 - Time stamp interrupt trigger enable
pub fn tsaru(&self) -> TSARU_R
[src]
Bit 5 - Time stamp addend register update
impl R<u32, Reg<u32, _PTPSSIR>>
[src]
impl R<u32, Reg<u32, _PTPTSHR>>
[src]
impl R<u32, Reg<u32, _PTPTSLR>>
[src]
pub fn stss(&self) -> STSS_R
[src]
Bits 0:30 - System time subseconds
pub fn stpns(&self) -> STPNS_R
[src]
Bit 31 - System time positive or negative sign
impl R<u32, Reg<u32, _PTPTSHUR>>
[src]
impl R<u32, Reg<u32, _PTPTSLUR>>
[src]
pub fn tsuss(&self) -> TSUSS_R
[src]
Bits 0:30 - Time stamp update subseconds
pub fn tsupns(&self) -> TSUPNS_R
[src]
Bit 31 - Time stamp update positive or negative sign
impl R<u32, Reg<u32, _PTPTSAR>>
[src]
impl R<u32, Reg<u32, _PTPTTHR>>
[src]
impl R<u32, Reg<u32, _PTPTTLR>>
[src]
impl R<u32, Reg<u32, _DMABMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 0 - Software reset
pub fn da(&self) -> DA_R
[src]
Bit 1 - DMA Arbitration
pub fn dsl(&self) -> DSL_R
[src]
Bits 2:6 - Descriptor skip length
pub fn pbl(&self) -> PBL_R
[src]
Bits 8:13 - Programmable burst length
pub fn rtpr(&self) -> RTPR_R
[src]
Bits 14:15 - Rx Tx priority ratio
pub fn fb(&self) -> FB_R
[src]
Bit 16 - Fixed burst
pub fn rdp(&self) -> RDP_R
[src]
Bits 17:22 - Rx DMA PBL
pub fn usp(&self) -> USP_R
[src]
Bit 23 - Use separate PBL
pub fn fpm(&self) -> FPM_R
[src]
Bit 24 - 4xPBL mode
pub fn aab(&self) -> AAB_R
[src]
Bit 25 - Address-aligned beats
impl R<u32, Reg<u32, _DMATPDR>>
[src]
impl R<u32, Reg<u32, _DMARPDR>>
[src]
impl R<u32, Reg<u32, _DMARDLAR>>
[src]
impl R<u32, Reg<u32, _DMATDLAR>>
[src]
impl R<u32, Reg<u32, _DMASR>>
[src]
pub fn ts(&self) -> TS_R
[src]
Bit 0 - Transmit status
pub fn tpss(&self) -> TPSS_R
[src]
Bit 1 - Transmit process stopped status
pub fn tbus(&self) -> TBUS_R
[src]
Bit 2 - Transmit buffer unavailable status
pub fn tjts(&self) -> TJTS_R
[src]
Bit 3 - Transmit jabber timeout status
pub fn ros(&self) -> ROS_R
[src]
Bit 4 - Receive overflow status
pub fn tus(&self) -> TUS_R
[src]
Bit 5 - Transmit underflow status
pub fn rs(&self) -> RS_R
[src]
Bit 6 - Receive status
pub fn rbus(&self) -> RBUS_R
[src]
Bit 7 - Receive buffer unavailable status
pub fn rpss(&self) -> RPSS_R
[src]
Bit 8 - Receive process stopped status
pub fn pwts(&self) -> PWTS_R
[src]
Bit 9 - Receive watchdog timeout status
pub fn ets(&self) -> ETS_R
[src]
Bit 10 - Early transmit status
pub fn fbes(&self) -> FBES_R
[src]
Bit 13 - Fatal bus error status
pub fn ers(&self) -> ERS_R
[src]
Bit 14 - Early receive status
pub fn ais(&self) -> AIS_R
[src]
Bit 15 - Abnormal interrupt summary
pub fn nis(&self) -> NIS_R
[src]
Bit 16 - Normal interrupt summary
pub fn rps(&self) -> RPS_R
[src]
Bits 17:19 - Receive process state
pub fn tps(&self) -> TPS_R
[src]
Bits 20:22 - Transmit process state
pub fn ebs(&self) -> EBS_R
[src]
Bits 23:25 - Error bits status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 27 - MMC status
pub fn pmts(&self) -> PMTS_R
[src]
Bit 28 - PMT status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 29 - Time stamp trigger status
impl R<u32, Reg<u32, _DMAOMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 1 - SR
pub fn osf(&self) -> OSF_R
[src]
Bit 2 - OSF
pub fn rtc(&self) -> RTC_R
[src]
Bits 3:4 - RTC
pub fn fugf(&self) -> FUGF_R
[src]
Bit 6 - FUGF
pub fn fef(&self) -> FEF_R
[src]
Bit 7 - FEF
pub fn st(&self) -> ST_R
[src]
Bit 13 - ST
pub fn ttc(&self) -> TTC_R
[src]
Bits 14:16 - TTC
pub fn ftf(&self) -> FTF_R
[src]
Bit 20 - FTF
pub fn tsf(&self) -> TSF_R
[src]
Bit 21 - TSF
pub fn dfrf(&self) -> DFRF_R
[src]
Bit 24 - DFRF
pub fn rsf(&self) -> RSF_R
[src]
Bit 25 - RSF
pub fn dtcefd(&self) -> DTCEFD_R
[src]
Bit 26 - DTCEFD
impl R<u32, Reg<u32, _DMAIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 0 - Transmit interrupt enable
pub fn tpsie(&self) -> TPSIE_R
[src]
Bit 1 - Transmit process stopped interrupt enable
pub fn tbuie(&self) -> TBUIE_R
[src]
Bit 2 - Transmit buffer unavailable interrupt enable
pub fn tjtie(&self) -> TJTIE_R
[src]
Bit 3 - Transmit jabber timeout interrupt enable
pub fn roie(&self) -> ROIE_R
[src]
Bit 4 - Overflow interrupt enable
pub fn tuie(&self) -> TUIE_R
[src]
Bit 5 - Underflow interrupt enable
pub fn rie(&self) -> RIE_R
[src]
Bit 6 - Receive interrupt enable
pub fn rbuie(&self) -> RBUIE_R
[src]
Bit 7 - Receive buffer unavailable interrupt enable
pub fn rpsie(&self) -> RPSIE_R
[src]
Bit 8 - Receive process stopped interrupt enable
pub fn rwtie(&self) -> RWTIE_R
[src]
Bit 9 - receive watchdog timeout interrupt enable
pub fn etie(&self) -> ETIE_R
[src]
Bit 10 - Early transmit interrupt enable
pub fn fbeie(&self) -> FBEIE_R
[src]
Bit 13 - Fatal bus error interrupt enable
pub fn erie(&self) -> ERIE_R
[src]
Bit 14 - Early receive interrupt enable
pub fn aise(&self) -> AISE_R
[src]
Bit 15 - Abnormal interrupt summary enable
pub fn nise(&self) -> NISE_R
[src]
Bit 16 - Normal interrupt summary enable
impl R<u32, Reg<u32, _DMAMFBOCR>>
[src]
pub fn mfc(&self) -> MFC_R
[src]
Bits 0:15 - Missed frames by the controller
pub fn omfc(&self) -> OMFC_R
[src]
Bit 16 - Overflow bit for missed frame counter
pub fn mfa(&self) -> MFA_R
[src]
Bits 17:27 - Missed frames by the application
pub fn ofoc(&self) -> OFOC_R
[src]
Bit 28 - Overflow bit for FIFO overflow counter
impl R<u32, Reg<u32, _DMACHTDR>>
[src]
impl R<u32, Reg<u32, _DMACHRDR>>
[src]
impl R<u32, Reg<u32, _DMACHTBAR>>
[src]
impl R<u32, Reg<u32, _DMACHRBAR>>
[src]
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP0R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP1R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP2R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP3R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP4R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP5R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP6R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP7R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<bool, FRES_A>
[src]
pub fn variant(&self) -> FRES_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, PDWN_A>
[src]
pub fn variant(&self) -> PDWN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LPMODE_A>
[src]
pub fn variant(&self) -> LPMODE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FSUSP_A>
[src]
pub fn variant(&self) -> FSUSP_A
[src]
Get enumerated values variant
pub fn is_no_effect(&self) -> bool
[src]
Checks if the value of the field is NOEFFECT
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, RESUME_A>
[src]
pub fn variant(&self) -> Variant<bool, RESUME_A>
[src]
Get enumerated values variant
pub fn is_requested(&self) -> bool
[src]
Checks if the value of the field is REQUESTED
impl R<bool, ESOFM_A>
[src]
pub fn variant(&self) -> ESOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SOFM_A>
[src]
pub fn variant(&self) -> SOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RESETM_A>
[src]
pub fn variant(&self) -> RESETM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SUSPM_A>
[src]
pub fn variant(&self) -> SUSPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUPM_A>
[src]
pub fn variant(&self) -> WKUPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRM_A>
[src]
pub fn variant(&self) -> ERRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PMAOVRM_A>
[src]
pub fn variant(&self) -> PMAOVRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTRM_A>
[src]
pub fn variant(&self) -> CTRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CNTR>>
[src]
pub fn fres(&self) -> FRES_R
[src]
Bit 0 - Force USB Reset
pub fn pdwn(&self) -> PDWN_R
[src]
Bit 1 - Power down
pub fn lpmode(&self) -> LPMODE_R
[src]
Bit 2 - Low-power mode
pub fn fsusp(&self) -> FSUSP_R
[src]
Bit 3 - Force suspend
pub fn resume(&self) -> RESUME_R
[src]
Bit 4 - Resume request
pub fn esofm(&self) -> ESOFM_R
[src]
Bit 8 - Expected start of frame interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 9 - Start of frame interrupt mask
pub fn resetm(&self) -> RESETM_R
[src]
Bit 10 - USB reset interrupt mask
pub fn suspm(&self) -> SUSPM_R
[src]
Bit 11 - Suspend mode interrupt mask
pub fn wkupm(&self) -> WKUPM_R
[src]
Bit 12 - Wakeup interrupt mask
pub fn errm(&self) -> ERRM_R
[src]
Bit 13 - Error interrupt mask
pub fn pmaovrm(&self) -> PMAOVRM_R
[src]
Bit 14 - Packet memory area over / underrun interrupt mask
pub fn ctrm(&self) -> CTRM_R
[src]
Bit 15 - Correct transfer interrupt mask
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_to(&self) -> bool
[src]
Checks if the value of the field is TO
pub fn is_from(&self) -> bool
[src]
Checks if the value of the field is FROM
impl R<bool, ESOF_A>
[src]
pub fn variant(&self) -> Variant<bool, ESOF_A>
[src]
Get enumerated values variant
pub fn is_expected_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is EXPECTEDSTARTOFFRAME
impl R<bool, SOF_A>
[src]
pub fn variant(&self) -> Variant<bool, SOF_A>
[src]
Get enumerated values variant
pub fn is_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is STARTOFFRAME
impl R<bool, RESET_A>
[src]
pub fn variant(&self) -> Variant<bool, RESET_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, SUSP_A>
[src]
pub fn variant(&self) -> Variant<bool, SUSP_A>
[src]
Get enumerated values variant
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, WKUP_A>
[src]
pub fn variant(&self) -> Variant<bool, WKUP_A>
[src]
Get enumerated values variant
pub fn is_wakeup(&self) -> bool
[src]
Checks if the value of the field is WAKEUP
impl R<bool, ERR_A>
[src]
pub fn variant(&self) -> Variant<bool, ERR_A>
[src]
Get enumerated values variant
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, PMAOVR_A>
[src]
pub fn variant(&self) -> Variant<bool, PMAOVR_A>
[src]
Get enumerated values variant
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, CTR_A>
[src]
pub fn variant(&self) -> Variant<bool, CTR_A>
[src]
Get enumerated values variant
pub fn is_completed(&self) -> bool
[src]
Checks if the value of the field is COMPLETED
impl R<u32, Reg<u32, _ISTR>>
[src]
pub fn ep_id(&self) -> EP_ID_R
[src]
Bits 0:3 - Endpoint Identifier
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction of transaction
pub fn esof(&self) -> ESOF_R
[src]
Bit 8 - Expected start frame
pub fn sof(&self) -> SOF_R
[src]
Bit 9 - start of frame
pub fn reset(&self) -> RESET_R
[src]
Bit 10 - reset request
pub fn susp(&self) -> SUSP_R
[src]
Bit 11 - Suspend mode request
pub fn wkup(&self) -> WKUP_R
[src]
Bit 12 - Wakeup
pub fn err(&self) -> ERR_R
[src]
Bit 13 - Error
pub fn pmaovr(&self) -> PMAOVR_R
[src]
Bit 14 - Packet memory area over / underrun
pub fn ctr(&self) -> CTR_R
[src]
Bit 15 - Correct transfer
impl R<bool, LCK_A>
[src]
pub fn variant(&self) -> Variant<bool, LCK_A>
[src]
Get enumerated values variant
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, RXDM_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDM_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<bool, RXDP_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDP_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<u32, Reg<u32, _FNR>>
[src]
pub fn fn_(&self) -> FN_R
[src]
Bits 0:10 - Frame number
pub fn lsof(&self) -> LSOF_R
[src]
Bits 11:12 - Lost SOF
pub fn lck(&self) -> LCK_R
[src]
Bit 13 - Locked
pub fn rxdm(&self) -> RXDM_R
[src]
Bit 14 - Receive data - line status
pub fn rxdp(&self) -> RXDP_R
[src]
Bit 15 - Receive data + line status
impl R<bool, EF_A>
[src]
pub fn variant(&self) -> EF_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DADDR>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:6 - Device address
pub fn ef(&self) -> EF_R
[src]
Bit 7 - Enable function
impl R<u32, Reg<u32, _BTABLE>>
[src]
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1IE_A>
[src]
pub fn variant(&self) -> CC1IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1DE_A>
[src]
pub fn variant(&self) -> CC1DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 15:18 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 15:18 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u32, Reg<u32, _POWER>>
[src]
impl R<u32, Reg<u32, _CLKCR>>
[src]
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 0:7 - Clock divide factor
pub fn clken(&self) -> CLKEN_R
[src]
Bit 8 - Clock enable bit
pub fn pwrsav(&self) -> PWRSAV_R
[src]
Bit 9 - Power saving configuration bit
pub fn bypass(&self) -> BYPASS_R
[src]
Bit 10 - Clock divider bypass enable bit
pub fn widbus(&self) -> WIDBUS_R
[src]
Bits 11:12 - Wide bus mode enable bit
pub fn negedge(&self) -> NEGEDGE_R
[src]
Bit 13 - SDIO_CK dephasing selection bit
pub fn hwfc_en(&self) -> HWFC_EN_R
[src]
Bit 14 - HW Flow Control enable
impl R<u32, Reg<u32, _ARG>>
[src]
impl R<u32, Reg<u32, _CMD>>
[src]
pub fn cmdindex(&self) -> CMDINDEX_R
[src]
Bits 0:5 - CMDINDEX
pub fn waitresp(&self) -> WAITRESP_R
[src]
Bits 6:7 - WAITRESP
pub fn waitint(&self) -> WAITINT_R
[src]
Bit 8 - WAITINT
pub fn waitpend(&self) -> WAITPEND_R
[src]
Bit 9 - WAITPEND
pub fn cpsmen(&self) -> CPSMEN_R
[src]
Bit 10 - CPSMEN
pub fn sdiosuspend(&self) -> SDIOSUSPEND_R
[src]
Bit 11 - SDIOSuspend
pub fn encmdcompl(&self) -> ENCMDCOMPL_R
[src]
Bit 12 - ENCMDcompl
pub fn n_ien(&self) -> NIEN_R
[src]
Bit 13 - nIEN
pub fn ce_atacmd(&self) -> CE_ATACMD_R
[src]
Bit 14 - CE_ATACMD
impl R<u32, Reg<u32, _RESPCMD>>
[src]
impl R<u32, Reg<u32, _RESPI1>>
[src]
pub fn cardstatus1(&self) -> CARDSTATUS1_R
[src]
Bits 0:31 - CARDSTATUS1
impl R<u32, Reg<u32, _RESP2>>
[src]
pub fn cardstatus2(&self) -> CARDSTATUS2_R
[src]
Bits 0:31 - CARDSTATUS2
impl R<u32, Reg<u32, _RESP3>>
[src]
pub fn cardstatus3(&self) -> CARDSTATUS3_R
[src]
Bits 0:31 - CARDSTATUS3
impl R<u32, Reg<u32, _RESP4>>
[src]
pub fn cardstatus4(&self) -> CARDSTATUS4_R
[src]
Bits 0:31 - CARDSTATUS4
impl R<u32, Reg<u32, _DTIMER>>
[src]
pub fn datatime(&self) -> DATATIME_R
[src]
Bits 0:31 - Data timeout period
impl R<u32, Reg<u32, _DLEN>>
[src]
pub fn datalength(&self) -> DATALENGTH_R
[src]
Bits 0:24 - Data length value
impl R<u32, Reg<u32, _DCTRL>>
[src]
pub fn dten(&self) -> DTEN_R
[src]
Bit 0 - DTEN
pub fn dtdir(&self) -> DTDIR_R
[src]
Bit 1 - DTDIR
pub fn dtmode(&self) -> DTMODE_R
[src]
Bit 2 - DTMODE
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 3 - DMAEN
pub fn dblocksize(&self) -> DBLOCKSIZE_R
[src]
Bits 4:7 - DBLOCKSIZE
pub fn pwstart(&self) -> PWSTART_R
[src]
Bit 8 - PWSTART
pub fn pwstop(&self) -> PWSTOP_R
[src]
Bit 9 - PWSTOP
pub fn rwmod(&self) -> RWMOD_R
[src]
Bit 10 - RWMOD
pub fn sdioen(&self) -> SDIOEN_R
[src]
Bit 11 - SDIOEN
impl R<u32, Reg<u32, _DCOUNT>>
[src]
pub fn datacount(&self) -> DATACOUNT_R
[src]
Bits 0:24 - Data count value
impl R<u32, Reg<u32, _STA>>
[src]
pub fn ccrcfail(&self) -> CCRCFAIL_R
[src]
Bit 0 - CCRCFAIL
pub fn dcrcfail(&self) -> DCRCFAIL_R
[src]
Bit 1 - DCRCFAIL
pub fn ctimeout(&self) -> CTIMEOUT_R
[src]
Bit 2 - CTIMEOUT
pub fn dtimeout(&self) -> DTIMEOUT_R
[src]
Bit 3 - DTIMEOUT
pub fn txunderr(&self) -> TXUNDERR_R
[src]
Bit 4 - TXUNDERR
pub fn rxoverr(&self) -> RXOVERR_R
[src]
Bit 5 - RXOVERR
pub fn cmdrend(&self) -> CMDREND_R
[src]
Bit 6 - CMDREND
pub fn cmdsent(&self) -> CMDSENT_R
[src]
Bit 7 - CMDSENT
pub fn dataend(&self) -> DATAEND_R
[src]
Bit 8 - DATAEND
pub fn stbiterr(&self) -> STBITERR_R
[src]
Bit 9 - STBITERR
pub fn dbckend(&self) -> DBCKEND_R
[src]
Bit 10 - DBCKEND
pub fn cmdact(&self) -> CMDACT_R
[src]
Bit 11 - CMDACT
pub fn txact(&self) -> TXACT_R
[src]
Bit 12 - TXACT
pub fn rxact(&self) -> RXACT_R
[src]
Bit 13 - RXACT
pub fn txfifohe(&self) -> TXFIFOHE_R
[src]
Bit 14 - TXFIFOHE
pub fn rxfifohf(&self) -> RXFIFOHF_R
[src]
Bit 15 - RXFIFOHF
pub fn txfifof(&self) -> TXFIFOF_R
[src]
Bit 16 - TXFIFOF
pub fn rxfifof(&self) -> RXFIFOF_R
[src]
Bit 17 - RXFIFOF
pub fn txfifoe(&self) -> TXFIFOE_R
[src]
Bit 18 - TXFIFOE
pub fn rxfifoe(&self) -> RXFIFOE_R
[src]
Bit 19 - RXFIFOE
pub fn txdavl(&self) -> TXDAVL_R
[src]
Bit 20 - TXDAVL
pub fn rxdavl(&self) -> RXDAVL_R
[src]
Bit 21 - RXDAVL
pub fn sdioit(&self) -> SDIOIT_R
[src]
Bit 22 - SDIOIT
pub fn ceataend(&self) -> CEATAEND_R
[src]
Bit 23 - CEATAEND
impl R<u32, Reg<u32, _ICR>>
[src]
pub fn ccrcfailc(&self) -> CCRCFAILC_R
[src]
Bit 0 - CCRCFAILC
pub fn dcrcfailc(&self) -> DCRCFAILC_R
[src]
Bit 1 - DCRCFAILC
pub fn ctimeoutc(&self) -> CTIMEOUTC_R
[src]
Bit 2 - CTIMEOUTC
pub fn dtimeoutc(&self) -> DTIMEOUTC_R
[src]
Bit 3 - DTIMEOUTC
pub fn txunderrc(&self) -> TXUNDERRC_R
[src]
Bit 4 - TXUNDERRC
pub fn rxoverrc(&self) -> RXOVERRC_R
[src]
Bit 5 - RXOVERRC
pub fn cmdrendc(&self) -> CMDRENDC_R
[src]
Bit 6 - CMDRENDC
pub fn cmdsentc(&self) -> CMDSENTC_R
[src]
Bit 7 - CMDSENTC
pub fn dataendc(&self) -> DATAENDC_R
[src]
Bit 8 - DATAENDC
pub fn stbiterrc(&self) -> STBITERRC_R
[src]
Bit 9 - STBITERRC
pub fn dbckendc(&self) -> DBCKENDC_R
[src]
Bit 10 - DBCKENDC
pub fn sdioitc(&self) -> SDIOITC_R
[src]
Bit 22 - SDIOITC
pub fn ceataendc(&self) -> CEATAENDC_R
[src]
Bit 23 - CEATAENDC
impl R<u32, Reg<u32, _MASK>>
[src]
pub fn ccrcfailie(&self) -> CCRCFAILIE_R
[src]
Bit 0 - CCRCFAILIE
pub fn dcrcfailie(&self) -> DCRCFAILIE_R
[src]
Bit 1 - DCRCFAILIE
pub fn ctimeoutie(&self) -> CTIMEOUTIE_R
[src]
Bit 2 - CTIMEOUTIE
pub fn dtimeoutie(&self) -> DTIMEOUTIE_R
[src]
Bit 3 - DTIMEOUTIE
pub fn txunderrie(&self) -> TXUNDERRIE_R
[src]
Bit 4 - TXUNDERRIE
pub fn rxoverrie(&self) -> RXOVERRIE_R
[src]
Bit 5 - RXOVERRIE
pub fn cmdrendie(&self) -> CMDRENDIE_R
[src]
Bit 6 - CMDRENDIE
pub fn cmdsentie(&self) -> CMDSENTIE_R
[src]
Bit 7 - CMDSENTIE
pub fn dataendie(&self) -> DATAENDIE_R
[src]
Bit 8 - DATAENDIE
pub fn stbiterrie(&self) -> STBITERRIE_R
[src]
Bit 9 - STBITERRIE
pub fn dbackendie(&self) -> DBACKENDIE_R
[src]
Bit 10 - DBACKENDIE
pub fn cmdactie(&self) -> CMDACTIE_R
[src]
Bit 11 - CMDACTIE
pub fn txactie(&self) -> TXACTIE_R
[src]
Bit 12 - TXACTIE
pub fn rxactie(&self) -> RXACTIE_R
[src]
Bit 13 - RXACTIE
pub fn txfifoheie(&self) -> TXFIFOHEIE_R
[src]
Bit 14 - TXFIFOHEIE
pub fn rxfifohfie(&self) -> RXFIFOHFIE_R
[src]
Bit 15 - RXFIFOHFIE
pub fn txfifofie(&self) -> TXFIFOFIE_R
[src]
Bit 16 - TXFIFOFIE
pub fn rxfifofie(&self) -> RXFIFOFIE_R
[src]
Bit 17 - RXFIFOFIE
pub fn txfifoeie(&self) -> TXFIFOEIE_R
[src]
Bit 18 - TXFIFOEIE
pub fn rxfifoeie(&self) -> RXFIFOEIE_R
[src]
Bit 19 - RXFIFOEIE
pub fn txdavlie(&self) -> TXDAVLIE_R
[src]
Bit 20 - TXDAVLIE
pub fn rxdavlie(&self) -> RXDAVLIE_R
[src]
Bit 21 - RXDAVLIE
pub fn sdioitie(&self) -> SDIOITIE_R
[src]
Bit 22 - SDIOITIE
pub fn ceatendie(&self) -> CEATENDIE_R
[src]
Bit 23 - CEATENDIE
impl R<u32, Reg<u32, _FIFOCNT>>
[src]
pub fn fif0count(&self) -> FIF0COUNT_R
[src]
Bits 0:23 - FIF0COUNT
impl R<u32, Reg<u32, _FIFO>>
[src]
pub fn fifodata(&self) -> FIFODATA_R
[src]
Bits 0:31 - FIFOData
impl R<u32, Reg<u32, _ACTRL>>
[src]
pub fn disfold(&self) -> DISFOLD_R
[src]
Bit 2 - DISFOLD
pub fn fpexcodis(&self) -> FPEXCODIS_R
[src]
Bit 10 - FPEXCODIS
pub fn disramode(&self) -> DISRAMODE_R
[src]
Bit 11 - DISRAMODE
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R
[src]
Bit 12 - DISITMATBFLUSH
impl R<u32, Reg<u32, _STIR>>
[src]
impl R<u32, Reg<u32, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 0 - Counter enable
pub fn tickint(&self) -> TICKINT_R
[src]
Bit 1 - SysTick exception request enable
pub fn clksource(&self) -> CLKSOURCE_R
[src]
Bit 2 - Clock source selection
pub fn countflag(&self) -> COUNTFLAG_R
[src]
Bit 16 - COUNTFLAG
impl R<u32, Reg<u32, _LOAD_>>
[src]
impl R<u32, Reg<u32, _VAL>>
[src]
impl R<u32, Reg<u32, _CALIB>>
[src]
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim3cc1(&self) -> bool
[src]
Checks if the value of the field is TIM3CC1
pub fn is_tim2cc3(&self) -> bool
[src]
Checks if the value of the field is TIM2CC3
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim8cc1(&self) -> bool
[src]
Checks if the value of the field is TIM8CC1
pub fn is_tim8trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8TRGO
pub fn is_tim5cc1(&self) -> bool
[src]
Checks if the value of the field is TIM5CC1
pub fn is_tim5cc3(&self) -> bool
[src]
Checks if the value of the field is TIM5CC3
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim4cc3(&self) -> bool
[src]
Checks if the value of the field is TIM4CC3
pub fn is_tim8cc2(&self) -> bool
[src]
Checks if the value of the field is TIM8CC2
pub fn is_tim8cc4(&self) -> bool
[src]
Checks if the value of the field is TIM8CC4
pub fn is_tim5trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5TRGO
pub fn is_tim5cc4(&self) -> bool
[src]
Checks if the value of the field is TIM5CC4
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, PDDS_A>
[src]
pub fn variant(&self) -> PDDS_A
[src]
Get enumerated values variant
pub fn is_stop_mode(&self) -> bool
[src]
Checks if the value of the field is STOP_MODE
pub fn is_standby_mode(&self) -> bool
[src]
Checks if the value of the field is STANDBY_MODE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn lpds(&self) -> LPDS_R
[src]
Bit 0 - Low Power Deep Sleep
pub fn pdds(&self) -> PDDS_R
[src]
Bit 1 - Power Down Deep Sleep
pub fn cwuf(&self) -> CWUF_R
[src]
Bit 2 - Clear Wake-up Flag
pub fn csbf(&self) -> CSBF_R
[src]
Bit 3 - Clear STANDBY Flag
pub fn pvde(&self) -> PVDE_R
[src]
Bit 4 - Power Voltage Detector Enable
pub fn pls(&self) -> PLS_R
[src]
Bits 5:7 - PVD Level Selection
pub fn dbp(&self) -> DBP_R
[src]
Bit 8 - Disable Backup Domain write protection
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn wuf(&self) -> WUF_R
[src]
Bit 0 - Wake-Up Flag
pub fn sbf(&self) -> SBF_R
[src]
Bit 1 - STANDBY Flag
pub fn pvdo(&self) -> PVDO_R
[src]
Bit 2 - PVD Output
pub fn ewup(&self) -> EWUP_R
[src]
Bit 8 - Enable WKUP pin
impl R<bool, HSION_A>
[src]
pub fn variant(&self) -> HSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, HSIRDY_A>
[src]
pub fn variant(&self) -> HSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, HSEBYP_A>
[src]
pub fn variant(&self) -> HSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<bool, CSSON_A>
[src]
pub fn variant(&self) -> CSSON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<u32, Reg<u32, _CR>>
[src]
pub fn hsion(&self) -> HSION_R
[src]
Bit 0 - Internal High Speed clock enable
pub fn hsirdy(&self) -> HSIRDY_R
[src]
Bit 1 - Internal High Speed clock ready flag
pub fn hsitrim(&self) -> HSITRIM_R
[src]
Bits 3:7 - Internal High Speed clock trimming
pub fn hsical(&self) -> HSICAL_R
[src]
Bits 8:15 - Internal High Speed clock Calibration
pub fn hseon(&self) -> HSEON_R
[src]
Bit 16 - External High Speed clock enable
pub fn hserdy(&self) -> HSERDY_R
[src]
Bit 17 - External High Speed clock ready flag
pub fn hsebyp(&self) -> HSEBYP_R
[src]
Bit 18 - External High Speed clock Bypass
pub fn csson(&self) -> CSSON_R
[src]
Bit 19 - Clock Security System enable
pub fn pllon(&self) -> PLLON_R
[src]
Bit 24 - PLL enable
pub fn pllrdy(&self) -> PLLRDY_R
[src]
Bit 25 - PLL clock ready flag
impl R<u8, SW_A>
[src]
pub fn variant(&self) -> Variant<u8, SW_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, SWS_A>
[src]
pub fn variant(&self) -> Variant<u8, SWS_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, HPRE_A>
[src]
pub fn variant(&self) -> Variant<u8, HPRE_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
impl R<u8, PPRE1_A>
[src]
pub fn variant(&self) -> Variant<u8, PPRE1_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPRE_A>
[src]
pub fn variant(&self) -> ADCPRE_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSRC_A>
[src]
pub fn variant(&self) -> PLLSRC_A
[src]
Get enumerated values variant
pub fn is_hsi_div2(&self) -> bool
[src]
Checks if the value of the field is HSI_DIV2
pub fn is_hse_div_prediv(&self) -> bool
[src]
Checks if the value of the field is HSE_DIV_PREDIV
impl R<bool, PLLXTPRE_A>
[src]
pub fn variant(&self) -> PLLXTPRE_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMUL_A>
[src]
pub fn variant(&self) -> PLLMUL_A
[src]
Get enumerated values variant
pub fn is_mul2(&self) -> bool
[src]
Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool
[src]
Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool
[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool
[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool
[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool
[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool
[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool
[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool
[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool
[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool
[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool
[src]
Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool
[src]
Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool
[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool
[src]
Checks if the value of the field is MUL16X
impl R<u8, MCO_A>
[src]
pub fn variant(&self) -> Variant<u8, MCO_A>
[src]
Get enumerated values variant
pub fn is_no_mco(&self) -> bool
[src]
Checks if the value of the field is NOMCO
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn sw(&self) -> SW_R
[src]
Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
[src]
Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
[src]
Bits 4:7 - AHB prescaler
pub fn ppre1(&self) -> PPRE1_R
[src]
Bits 8:10 - APB Low speed prescaler (APB1)
pub fn ppre2(&self) -> PPRE2_R
[src]
Bits 11:13 - APB High speed prescaler (APB2)
pub fn adcpre(&self) -> ADCPRE_R
[src]
Bits 14:15 - ADC prescaler
pub fn pllsrc(&self) -> PLLSRC_R
[src]
Bit 16 - PLL entry clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
[src]
Bit 17 - HSE divider for PLL entry
pub fn pllmul(&self) -> PLLMUL_R
[src]
Bits 18:21 - PLL Multiplication Factor
pub fn mco(&self) -> MCO_R
[src]
Bits 24:26 - Microcontroller clock output
impl R<bool, LSIRDYF_A>
[src]
pub fn variant(&self) -> LSIRDYF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CSSF_A>
[src]
pub fn variant(&self) -> CSSF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LSIRDYIE_A>
[src]
pub fn variant(&self) -> LSIRDYIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CIR>>
[src]
pub fn lsirdyf(&self) -> LSIRDYF_R
[src]
Bit 0 - LSI Ready Interrupt flag
pub fn lserdyf(&self) -> LSERDYF_R
[src]
Bit 1 - LSE Ready Interrupt flag
pub fn hsirdyf(&self) -> HSIRDYF_R
[src]
Bit 2 - HSI Ready Interrupt flag
pub fn hserdyf(&self) -> HSERDYF_R
[src]
Bit 3 - HSE Ready Interrupt flag
pub fn pllrdyf(&self) -> PLLRDYF_R
[src]
Bit 4 - PLL Ready Interrupt flag
pub fn cssf(&self) -> CSSF_R
[src]
Bit 7 - Clock Security System Interrupt flag
pub fn lsirdyie(&self) -> LSIRDYIE_R
[src]
Bit 8 - LSI Ready Interrupt Enable
pub fn lserdyie(&self) -> LSERDYIE_R
[src]
Bit 9 - LSE Ready Interrupt Enable
pub fn hsirdyie(&self) -> HSIRDYIE_R
[src]
Bit 10 - HSI Ready Interrupt Enable
pub fn hserdyie(&self) -> HSERDYIE_R
[src]
Bit 11 - HSE Ready Interrupt Enable
pub fn pllrdyie(&self) -> PLLRDYIE_R
[src]
Bit 12 - PLL Ready Interrupt Enable
impl R<bool, AFIORST_A>
[src]
pub fn variant(&self) -> Variant<bool, AFIORST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RSTR>>
[src]
pub fn afiorst(&self) -> AFIORST_R
[src]
Bit 0 - Alternate function I/O reset
pub fn ioparst(&self) -> IOPARST_R
[src]
Bit 2 - IO port A reset
pub fn iopbrst(&self) -> IOPBRST_R
[src]
Bit 3 - IO port B reset
pub fn iopcrst(&self) -> IOPCRST_R
[src]
Bit 4 - IO port C reset
pub fn iopdrst(&self) -> IOPDRST_R
[src]
Bit 5 - IO port D reset
pub fn adc1rst(&self) -> ADC1RST_R
[src]
Bit 9 - ADC 1 interface reset
pub fn spi1rst(&self) -> SPI1RST_R
[src]
Bit 12 - SPI 1 reset
pub fn usart1rst(&self) -> USART1RST_R
[src]
Bit 14 - USART1 reset
impl R<bool, TIM2RST_A>
[src]
pub fn variant(&self) -> Variant<bool, TIM2RST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RSTR>>
[src]
pub fn tim2rst(&self) -> TIM2RST_R
[src]
Bit 0 - Timer 2 reset
pub fn tim3rst(&self) -> TIM3RST_R
[src]
Bit 1 - Timer 3 reset
pub fn wwdgrst(&self) -> WWDGRST_R
[src]
Bit 11 - Window watchdog reset
pub fn usart2rst(&self) -> USART2RST_R
[src]
Bit 17 - USART 2 reset
pub fn i2c1rst(&self) -> I2C1RST_R
[src]
Bit 21 - I2C1 reset
pub fn bkprst(&self) -> BKPRST_R
[src]
Bit 27 - Backup interface reset
pub fn pwrrst(&self) -> PWRRST_R
[src]
Bit 28 - Power interface reset
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 23 - USB reset
pub fn i2c2rst(&self) -> I2C2RST_R
[src]
Bit 22 - I2C2 reset
pub fn usart3rst(&self) -> USART3RST_R
[src]
Bit 18 - USART3 reset
pub fn spi2rst(&self) -> SPI2RST_R
[src]
Bit 14 - SPI2 reset
pub fn tim4rst(&self) -> TIM4RST_R
[src]
Bit 2 - TIM4 timer reset
impl R<bool, DMA1EN_A>
[src]
pub fn variant(&self) -> DMA1EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBENR>>
[src]
pub fn dma1en(&self) -> DMA1EN_R
[src]
Bit 0 - DMA1 clock enable
pub fn dma2en(&self) -> DMA2EN_R
[src]
Bit 1 - DMA2 clock enable
pub fn sramen(&self) -> SRAMEN_R
[src]
Bit 2 - SRAM interface clock enable
pub fn flitfen(&self) -> FLITFEN_R
[src]
Bit 4 - FLITF clock enable
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 6 - CRC clock enable
impl R<bool, AFIOEN_A>
[src]
pub fn variant(&self) -> AFIOEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2ENR>>
[src]
pub fn afioen(&self) -> AFIOEN_R
[src]
Bit 0 - Alternate function I/O clock enable
pub fn iopaen(&self) -> IOPAEN_R
[src]
Bit 2 - I/O port A clock enable
pub fn iopben(&self) -> IOPBEN_R
[src]
Bit 3 - I/O port B clock enable
pub fn iopcen(&self) -> IOPCEN_R
[src]
Bit 4 - I/O port C clock enable
pub fn iopden(&self) -> IOPDEN_R
[src]
Bit 5 - I/O port D clock enable
pub fn adc1en(&self) -> ADC1EN_R
[src]
Bit 9 - ADC 1 interface clock enable
pub fn spi1en(&self) -> SPI1EN_R
[src]
Bit 12 - SPI 1 clock enable
pub fn usart1en(&self) -> USART1EN_R
[src]
Bit 14 - USART1 clock enable
impl R<bool, TIM2EN_A>
[src]
pub fn variant(&self) -> TIM2EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1ENR>>
[src]
pub fn tim2en(&self) -> TIM2EN_R
[src]
Bit 0 - Timer 2 clock enable
pub fn tim3en(&self) -> TIM3EN_R
[src]
Bit 1 - Timer 3 clock enable
pub fn wwdgen(&self) -> WWDGEN_R
[src]
Bit 11 - Window watchdog clock enable
pub fn usart2en(&self) -> USART2EN_R
[src]
Bit 17 - USART 2 clock enable
pub fn i2c1en(&self) -> I2C1EN_R
[src]
Bit 21 - I2C 1 clock enable
pub fn bkpen(&self) -> BKPEN_R
[src]
Bit 27 - Backup interface clock enable
pub fn pwren(&self) -> PWREN_R
[src]
Bit 28 - Power interface clock enable
pub fn usben(&self) -> USBEN_R
[src]
Bit 23 - USB clock enable
pub fn i2c2en(&self) -> I2C2EN_R
[src]
Bit 22 - I2C2 clock enable
pub fn usart3en(&self) -> USART3EN_R
[src]
Bit 18 - USART3 clock enable
pub fn spi2en(&self) -> SPI2EN_R
[src]
Bit 14 - SPI2 clock enable
pub fn tim4en(&self) -> TIM4EN_R
[src]
Bit 2 - TIM4 Timer clock enable
impl R<bool, LSEON_A>
[src]
pub fn variant(&self) -> LSEON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSERDY_A>
[src]
pub fn variant(&self) -> LSERDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, LSEBYP_A>
[src]
pub fn variant(&self) -> LSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<u8, RTCSEL_A>
[src]
pub fn variant(&self) -> RTCSEL_A
[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool
[src]
Checks if the value of the field is NOCLOCK
pub fn is_lse(&self) -> bool
[src]
Checks if the value of the field is LSE
pub fn is_lsi(&self) -> bool
[src]
Checks if the value of the field is LSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
impl R<bool, RTCEN_A>
[src]
pub fn variant(&self) -> RTCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BDRST_A>
[src]
pub fn variant(&self) -> BDRST_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BDCR>>
[src]
pub fn lseon(&self) -> LSEON_R
[src]
Bit 0 - External Low Speed oscillator enable
pub fn lserdy(&self) -> LSERDY_R
[src]
Bit 1 - External Low Speed oscillator ready
pub fn lsebyp(&self) -> LSEBYP_R
[src]
Bit 2 - External Low Speed oscillator bypass
pub fn rtcsel(&self) -> RTCSEL_R
[src]
Bits 8:9 - RTC clock source selection
pub fn rtcen(&self) -> RTCEN_R
[src]
Bit 15 - RTC clock enable
pub fn bdrst(&self) -> BDRST_R
[src]
Bit 16 - Backup domain software reset
impl R<bool, LSION_A>
[src]
pub fn variant(&self) -> LSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSIRDY_A>
[src]
pub fn variant(&self) -> LSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, RMVF_A>
[src]
pub fn variant(&self) -> Variant<bool, RMVF_A>
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
impl R<bool, PINRSTF_A>
[src]
pub fn variant(&self) -> PINRSTF_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn lsion(&self) -> LSION_R
[src]
Bit 0 - Internal low speed oscillator enable
pub fn lsirdy(&self) -> LSIRDY_R
[src]
Bit 1 - Internal low speed oscillator ready
pub fn rmvf(&self) -> RMVF_R
[src]
Bit 24 - Remove reset flag
pub fn pinrstf(&self) -> PINRSTF_R
[src]
Bit 26 - PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R
[src]
Bit 27 - POR/PDR reset flag
pub fn sftrstf(&self) -> SFTRSTF_R
[src]
Bit 28 - Software reset flag
pub fn iwdgrstf(&self) -> IWDGRSTF_R
[src]
Bit 29 - Independent watchdog reset flag
pub fn wwdgrstf(&self) -> WWDGRSTF_R
[src]
Bit 30 - Window watchdog reset flag
pub fn lpwrrstf(&self) -> LPWRRSTF_R
[src]
Bit 31 - Low-power reset flag
impl R<u8, MODE0_A>
[src]
pub fn variant(&self) -> MODE0_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF0_A>
[src]
pub fn variant(&self) -> CNF0_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn mode0(&self) -> MODE0_R
[src]
Bits 0:1 - Port n.0 mode bits
pub fn cnf0(&self) -> CNF0_R
[src]
Bits 2:3 - Port n.0 configuration bits
pub fn mode1(&self) -> MODE1_R
[src]
Bits 4:5 - Port n.1 mode bits
pub fn cnf1(&self) -> CNF1_R
[src]
Bits 6:7 - Port n.1 configuration bits
pub fn mode2(&self) -> MODE2_R
[src]
Bits 8:9 - Port n.2 mode bits
pub fn cnf2(&self) -> CNF2_R
[src]
Bits 10:11 - Port n.2 configuration bits
pub fn mode3(&self) -> MODE3_R
[src]
Bits 12:13 - Port n.3 mode bits
pub fn cnf3(&self) -> CNF3_R
[src]
Bits 14:15 - Port n.3 configuration bits
pub fn mode4(&self) -> MODE4_R
[src]
Bits 16:17 - Port n.4 mode bits
pub fn cnf4(&self) -> CNF4_R
[src]
Bits 18:19 - Port n.4 configuration bits
pub fn mode5(&self) -> MODE5_R
[src]
Bits 20:21 - Port n.5 mode bits
pub fn cnf5(&self) -> CNF5_R
[src]
Bits 22:23 - Port n.5 configuration bits
pub fn mode6(&self) -> MODE6_R
[src]
Bits 24:25 - Port n.6 mode bits
pub fn cnf6(&self) -> CNF6_R
[src]
Bits 26:27 - Port n.6 configuration bits
pub fn mode7(&self) -> MODE7_R
[src]
Bits 28:29 - Port n.7 mode bits
pub fn cnf7(&self) -> CNF7_R
[src]
Bits 30:31 - Port n.7 configuration bits
impl R<u8, MODE8_A>
[src]
pub fn variant(&self) -> MODE8_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF8_A>
[src]
pub fn variant(&self) -> CNF8_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn mode8(&self) -> MODE8_R
[src]
Bits 0:1 - Port n.8 mode bits
pub fn cnf8(&self) -> CNF8_R
[src]
Bits 2:3 - Port n.8 configuration bits
pub fn mode9(&self) -> MODE9_R
[src]
Bits 4:5 - Port n.9 mode bits
pub fn cnf9(&self) -> CNF9_R
[src]
Bits 6:7 - Port n.9 configuration bits
pub fn mode10(&self) -> MODE10_R
[src]
Bits 8:9 - Port n.10 mode bits
pub fn cnf10(&self) -> CNF10_R
[src]
Bits 10:11 - Port n.10 configuration bits
pub fn mode11(&self) -> MODE11_R
[src]
Bits 12:13 - Port n.11 mode bits
pub fn cnf11(&self) -> CNF11_R
[src]
Bits 14:15 - Port n.11 configuration bits
pub fn mode12(&self) -> MODE12_R
[src]
Bits 16:17 - Port n.12 mode bits
pub fn cnf12(&self) -> CNF12_R
[src]
Bits 18:19 - Port n.12 configuration bits
pub fn mode13(&self) -> MODE13_R
[src]
Bits 20:21 - Port n.13 mode bits
pub fn cnf13(&self) -> CNF13_R
[src]
Bits 22:23 - Port n.13 configuration bits
pub fn mode14(&self) -> MODE14_R
[src]
Bits 24:25 - Port n.14 mode bits
pub fn cnf14(&self) -> CNF14_R
[src]
Bits 26:27 - Port n.14 configuration bits
pub fn mode15(&self) -> MODE15_R
[src]
Bits 28:29 - Port n.15 mode bits
pub fn cnf15(&self) -> CNF15_R
[src]
Bits 30:31 - Port n.15 configuration bits
impl R<bool, IDR0_A>
[src]
pub fn variant(&self) -> IDR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _IDR>>
[src]
pub fn idr0(&self) -> IDR0_R
[src]
Bit 0 - Port input data
pub fn idr1(&self) -> IDR1_R
[src]
Bit 1 - Port input data
pub fn idr2(&self) -> IDR2_R
[src]
Bit 2 - Port input data
pub fn idr3(&self) -> IDR3_R
[src]
Bit 3 - Port input data
pub fn idr4(&self) -> IDR4_R
[src]
Bit 4 - Port input data
pub fn idr5(&self) -> IDR5_R
[src]
Bit 5 - Port input data
pub fn idr6(&self) -> IDR6_R
[src]
Bit 6 - Port input data
pub fn idr7(&self) -> IDR7_R
[src]
Bit 7 - Port input data
pub fn idr8(&self) -> IDR8_R
[src]
Bit 8 - Port input data
pub fn idr9(&self) -> IDR9_R
[src]
Bit 9 - Port input data
pub fn idr10(&self) -> IDR10_R
[src]
Bit 10 - Port input data
pub fn idr11(&self) -> IDR11_R
[src]
Bit 11 - Port input data
pub fn idr12(&self) -> IDR12_R
[src]
Bit 12 - Port input data
pub fn idr13(&self) -> IDR13_R
[src]
Bit 13 - Port input data
pub fn idr14(&self) -> IDR14_R
[src]
Bit 14 - Port input data
pub fn idr15(&self) -> IDR15_R
[src]
Bit 15 - Port input data
impl R<bool, ODR0_A>
[src]
pub fn variant(&self) -> ODR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _ODR>>
[src]
pub fn odr0(&self) -> ODR0_R
[src]
Bit 0 - Port output data
pub fn odr1(&self) -> ODR1_R
[src]
Bit 1 - Port output data
pub fn odr2(&self) -> ODR2_R
[src]
Bit 2 - Port output data
pub fn odr3(&self) -> ODR3_R
[src]
Bit 3 - Port output data
pub fn odr4(&self) -> ODR4_R
[src]
Bit 4 - Port output data
pub fn odr5(&self) -> ODR5_R
[src]
Bit 5 - Port output data
pub fn odr6(&self) -> ODR6_R
[src]
Bit 6 - Port output data
pub fn odr7(&self) -> ODR7_R
[src]
Bit 7 - Port output data
pub fn odr8(&self) -> ODR8_R
[src]
Bit 8 - Port output data
pub fn odr9(&self) -> ODR9_R
[src]
Bit 9 - Port output data
pub fn odr10(&self) -> ODR10_R
[src]
Bit 10 - Port output data
pub fn odr11(&self) -> ODR11_R
[src]
Bit 11 - Port output data
pub fn odr12(&self) -> ODR12_R
[src]
Bit 12 - Port output data
pub fn odr13(&self) -> ODR13_R
[src]
Bit 13 - Port output data
pub fn odr14(&self) -> ODR14_R
[src]
Bit 14 - Port output data
pub fn odr15(&self) -> ODR15_R
[src]
Bit 15 - Port output data
impl R<bool, LCK0_A>
[src]
pub fn variant(&self) -> LCK0_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCK10_A>
[src]
pub fn variant(&self) -> LCK10_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCKK_A>
[src]
pub fn variant(&self) -> LCKK_A
[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool
[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _LCKR>>
[src]
pub fn lck0(&self) -> LCK0_R
[src]
Bit 0 - Port A Lock bit 0
pub fn lck1(&self) -> LCK1_R
[src]
Bit 1 - Port A Lock bit 1
pub fn lck2(&self) -> LCK2_R
[src]
Bit 2 - Port A Lock bit 2
pub fn lck3(&self) -> LCK3_R
[src]
Bit 3 - Port A Lock bit 3
pub fn lck4(&self) -> LCK4_R
[src]
Bit 4 - Port A Lock bit 4
pub fn lck5(&self) -> LCK5_R
[src]
Bit 5 - Port A Lock bit 5
pub fn lck6(&self) -> LCK6_R
[src]
Bit 6 - Port A Lock bit 6
pub fn lck7(&self) -> LCK7_R
[src]
Bit 7 - Port A Lock bit 7
pub fn lck8(&self) -> LCK8_R
[src]
Bit 8 - Port A Lock bit 8
pub fn lck9(&self) -> LCK9_R
[src]
Bit 9 - Port A Lock bit 9
pub fn lck10(&self) -> LCK10_R
[src]
Bit 10 - Port A Lock bit 10
pub fn lck11(&self) -> LCK11_R
[src]
Bit 11 - Port A Lock bit 11
pub fn lck12(&self) -> LCK12_R
[src]
Bit 12 - Port A Lock bit 12
pub fn lck13(&self) -> LCK13_R
[src]
Bit 13 - Port A Lock bit 13
pub fn lck14(&self) -> LCK14_R
[src]
Bit 14 - Port A Lock bit 14
pub fn lck15(&self) -> LCK15_R
[src]
Bit 15 - Port A Lock bit 15
pub fn lckk(&self) -> LCKK_R
[src]
Bit 16 - Lock key
impl R<u32, Reg<u32, _EVCR>>
[src]
pub fn pin(&self) -> PIN_R
[src]
Bits 0:3 - Pin selection
pub fn port(&self) -> PORT_R
[src]
Bits 4:6 - Port selection
pub fn evoe(&self) -> EVOE_R
[src]
Bit 7 - Event Output Enable
impl R<u32, Reg<u32, _MAPR>>
[src]
pub fn spi1_remap(&self) -> SPI1_REMAP_R
[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAP_R
[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAP_R
[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAP_R
[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAP_R
[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAP_R
[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAP_R
[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAP_R
[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAP_R
[src]
Bit 12 - TIM4 remapping
pub fn can_remap(&self) -> CAN_REMAP_R
[src]
Bits 13:14 - CAN1 remapping
pub fn pd01_remap(&self) -> PD01_REMAP_R
[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R
[src]
Bit 16 - Set and cleared by software
pub fn adc1_etrginj_remap(&self) -> ADC1_ETRGINJ_REMAP_R
[src]
Bit 17 - ADC 1 External trigger injected conversion remapping
pub fn adc1_etrgreg_remap(&self) -> ADC1_ETRGREG_REMAP_R
[src]
Bit 18 - ADC 1 external trigger regular conversion remapping
pub fn adc2_etrginj_remap(&self) -> ADC2_ETRGINJ_REMAP_R
[src]
Bit 19 - ADC 2 external trigger injected conversion remapping
pub fn adc2_etrgreg_remap(&self) -> ADC2_ETRGREG_REMAP_R
[src]
Bit 20 - ADC 2 external trigger regular conversion remapping
impl R<u32, Reg<u32, _EXTICR1>>
[src]
pub fn exti0(&self) -> EXTI0_R
[src]
Bits 0:3 - EXTI0 configuration
pub fn exti1(&self) -> EXTI1_R
[src]
Bits 4:7 - EXTI1 configuration
pub fn exti2(&self) -> EXTI2_R
[src]
Bits 8:11 - EXTI2 configuration
pub fn exti3(&self) -> EXTI3_R
[src]
Bits 12:15 - EXTI3 configuration
impl R<u32, Reg<u32, _EXTICR2>>
[src]
pub fn exti4(&self) -> EXTI4_R
[src]
Bits 0:3 - EXTI4 configuration
pub fn exti5(&self) -> EXTI5_R
[src]
Bits 4:7 - EXTI5 configuration
pub fn exti6(&self) -> EXTI6_R
[src]
Bits 8:11 - EXTI6 configuration
pub fn exti7(&self) -> EXTI7_R
[src]
Bits 12:15 - EXTI7 configuration
impl R<u32, Reg<u32, _EXTICR3>>
[src]
pub fn exti8(&self) -> EXTI8_R
[src]
Bits 0:3 - EXTI8 configuration
pub fn exti9(&self) -> EXTI9_R
[src]
Bits 4:7 - EXTI9 configuration
pub fn exti10(&self) -> EXTI10_R
[src]
Bits 8:11 - EXTI10 configuration
pub fn exti11(&self) -> EXTI11_R
[src]
Bits 12:15 - EXTI11 configuration
impl R<u32, Reg<u32, _EXTICR4>>
[src]
pub fn exti12(&self) -> EXTI12_R
[src]
Bits 0:3 - EXTI12 configuration
pub fn exti13(&self) -> EXTI13_R
[src]
Bits 4:7 - EXTI13 configuration
pub fn exti14(&self) -> EXTI14_R
[src]
Bits 8:11 - EXTI14 configuration
pub fn exti15(&self) -> EXTI15_R
[src]
Bits 12:15 - EXTI15 configuration
impl R<u32, Reg<u32, _MAPR2>>
[src]
pub fn tim9_remap(&self) -> TIM9_REMAP_R
[src]
Bit 5 - TIM9 remapping
pub fn tim10_remap(&self) -> TIM10_REMAP_R
[src]
Bit 6 - TIM10 remapping
pub fn tim11_remap(&self) -> TIM11_REMAP_R
[src]
Bit 7 - TIM11 remapping
pub fn tim13_remap(&self) -> TIM13_REMAP_R
[src]
Bit 8 - TIM13 remapping
pub fn tim14_remap(&self) -> TIM14_REMAP_R
[src]
Bit 9 - TIM14 remapping
pub fn fsmc_nadv(&self) -> FSMC_NADV_R
[src]
Bit 10 - NADV connect/disconnect
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _IMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Interrupt Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Interrupt Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Interrupt Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Interrupt Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Interrupt Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Interrupt Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Interrupt Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Interrupt Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Interrupt Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Interrupt Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Interrupt Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Interrupt Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Interrupt Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Interrupt Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Interrupt Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Interrupt Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Interrupt Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Interrupt Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Interrupt Mask on line 18
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Event Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Event Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Event Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Event Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Event Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Event Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Event Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Event Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Event Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Event Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Event Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Event Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Event Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Event Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Event Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Event Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Event Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Event Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Event Mask on line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Rising trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Rising trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Rising trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Rising trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Rising trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Rising trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Rising trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Rising trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Rising trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Rising trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Rising trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Rising trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Rising trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Rising trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Rising trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Rising trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Rising trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Rising trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Rising trigger event configuration of line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Falling trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Falling trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Falling trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Falling trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Falling trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Falling trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Falling trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Falling trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Falling trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Falling trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Falling trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Falling trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Falling trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Falling trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Falling trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Falling trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Falling trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Falling trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Falling trigger event configuration of line 18
impl R<bool, SWIER0_A>
[src]
pub fn variant(&self) -> Variant<bool, SWIER0_A>
[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool
[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIER>>
[src]
pub fn swier0(&self) -> SWIER0_R
[src]
Bit 0 - Software Interrupt on line 0
pub fn swier1(&self) -> SWIER1_R
[src]
Bit 1 - Software Interrupt on line 1
pub fn swier2(&self) -> SWIER2_R
[src]
Bit 2 - Software Interrupt on line 2
pub fn swier3(&self) -> SWIER3_R
[src]
Bit 3 - Software Interrupt on line 3
pub fn swier4(&self) -> SWIER4_R
[src]
Bit 4 - Software Interrupt on line 4
pub fn swier5(&self) -> SWIER5_R
[src]
Bit 5 - Software Interrupt on line 5
pub fn swier6(&self) -> SWIER6_R
[src]
Bit 6 - Software Interrupt on line 6
pub fn swier7(&self) -> SWIER7_R
[src]
Bit 7 - Software Interrupt on line 7
pub fn swier8(&self) -> SWIER8_R
[src]
Bit 8 - Software Interrupt on line 8
pub fn swier9(&self) -> SWIER9_R
[src]
Bit 9 - Software Interrupt on line 9
pub fn swier10(&self) -> SWIER10_R
[src]
Bit 10 - Software Interrupt on line 10
pub fn swier11(&self) -> SWIER11_R
[src]
Bit 11 - Software Interrupt on line 11
pub fn swier12(&self) -> SWIER12_R
[src]
Bit 12 - Software Interrupt on line 12
pub fn swier13(&self) -> SWIER13_R
[src]
Bit 13 - Software Interrupt on line 13
pub fn swier14(&self) -> SWIER14_R
[src]
Bit 14 - Software Interrupt on line 14
pub fn swier15(&self) -> SWIER15_R
[src]
Bit 15 - Software Interrupt on line 15
pub fn swier16(&self) -> SWIER16_R
[src]
Bit 16 - Software Interrupt on line 16
pub fn swier17(&self) -> SWIER17_R
[src]
Bit 17 - Software Interrupt on line 17
pub fn swier18(&self) -> SWIER18_R
[src]
Bit 18 - Software Interrupt on line 18
impl R<bool, PR0_A>
[src]
pub fn variant(&self) -> PR0_A
[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool
[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PR>>
[src]
pub fn pr0(&self) -> PR0_R
[src]
Bit 0 - Pending bit 0
pub fn pr1(&self) -> PR1_R
[src]
Bit 1 - Pending bit 1
pub fn pr2(&self) -> PR2_R
[src]
Bit 2 - Pending bit 2
pub fn pr3(&self) -> PR3_R
[src]
Bit 3 - Pending bit 3
pub fn pr4(&self) -> PR4_R
[src]
Bit 4 - Pending bit 4
pub fn pr5(&self) -> PR5_R
[src]
Bit 5 - Pending bit 5
pub fn pr6(&self) -> PR6_R
[src]
Bit 6 - Pending bit 6
pub fn pr7(&self) -> PR7_R
[src]
Bit 7 - Pending bit 7
pub fn pr8(&self) -> PR8_R
[src]
Bit 8 - Pending bit 8
pub fn pr9(&self) -> PR9_R
[src]
Bit 9 - Pending bit 9
pub fn pr10(&self) -> PR10_R
[src]
Bit 10 - Pending bit 10
pub fn pr11(&self) -> PR11_R
[src]
Bit 11 - Pending bit 11
pub fn pr12(&self) -> PR12_R
[src]
Bit 12 - Pending bit 12
pub fn pr13(&self) -> PR13_R
[src]
Bit 13 - Pending bit 13
pub fn pr14(&self) -> PR14_R
[src]
Bit 14 - Pending bit 14
pub fn pr15(&self) -> PR15_R
[src]
Bit 15 - Pending bit 15
pub fn pr16(&self) -> PR16_R
[src]
Bit 16 - Pending bit 16
pub fn pr17(&self) -> PR17_R
[src]
Bit 17 - Pending bit 17
pub fn pr18(&self) -> PR18_R
[src]
Bit 18 - Pending bit 18
impl R<bool, EN_A>
[src]
pub fn variant(&self) -> EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HTIE_A>
[src]
pub fn variant(&self) -> HTIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TEIE_A>
[src]
pub fn variant(&self) -> TEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool
[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool
[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CIRC_A>
[src]
pub fn variant(&self) -> CIRC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PINC_A>
[src]
pub fn variant(&self) -> PINC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, PSIZE_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, PL_A>
[src]
pub fn variant(&self) -> PL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool
[src]
Checks if the value of the field is VERYHIGH
impl R<bool, MEM2MEM_A>
[src]
pub fn variant(&self) -> MEM2MEM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en(&self) -> EN_R
[src]
Bit 0 - Channel enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 1 - Transfer complete interrupt enable
pub fn htie(&self) -> HTIE_R
[src]
Bit 2 - Half Transfer interrupt enable
pub fn teie(&self) -> TEIE_R
[src]
Bit 3 - Transfer error interrupt enable
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Data transfer direction
pub fn circ(&self) -> CIRC_R
[src]
Bit 5 - Circular mode
pub fn pinc(&self) -> PINC_R
[src]
Bit 6 - Peripheral increment mode
pub fn minc(&self) -> MINC_R
[src]
Bit 7 - Memory increment mode
pub fn psize(&self) -> PSIZE_R
[src]
Bits 8:9 - Peripheral size
pub fn msize(&self) -> MSIZE_R
[src]
Bits 10:11 - Memory size
pub fn pl(&self) -> PL_R
[src]
Bits 12:13 - Channel Priority level
pub fn mem2mem(&self) -> MEM2MEM_R
[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _NDTR>>
[src]
impl R<u32, Reg<u32, _PAR>>
[src]
impl R<u32, Reg<u32, _MAR>>
[src]
impl R<bool, GIF1_A>
[src]
pub fn variant(&self) -> GIF1_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<bool, TCIF1_A>
[src]
pub fn variant(&self) -> TCIF1_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTIF1_A>
[src]
pub fn variant(&self) -> HTIF1_A
[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool
[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
impl R<bool, TEIF1_A>
[src]
pub fn variant(&self) -> TEIF1_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _ISR>>
[src]
pub fn gif1(&self) -> GIF1_R
[src]
Bit 0 - Channel 1 Global interrupt flag
pub fn tcif1(&self) -> TCIF1_R
[src]
Bit 1 - Channel 1 Transfer Complete flag
pub fn htif1(&self) -> HTIF1_R
[src]
Bit 2 - Channel 1 Half Transfer Complete flag
pub fn teif1(&self) -> TEIF1_R
[src]
Bit 3 - Channel 1 Transfer Error flag
pub fn gif2(&self) -> GIF2_R
[src]
Bit 4 - Channel 2 Global interrupt flag
pub fn tcif2(&self) -> TCIF2_R
[src]
Bit 5 - Channel 2 Transfer Complete flag
pub fn htif2(&self) -> HTIF2_R
[src]
Bit 6 - Channel 2 Half Transfer Complete flag
pub fn teif2(&self) -> TEIF2_R
[src]
Bit 7 - Channel 2 Transfer Error flag
pub fn gif3(&self) -> GIF3_R
[src]
Bit 8 - Channel 3 Global interrupt flag
pub fn tcif3(&self) -> TCIF3_R
[src]
Bit 9 - Channel 3 Transfer Complete flag
pub fn htif3(&self) -> HTIF3_R
[src]
Bit 10 - Channel 3 Half Transfer Complete flag
pub fn teif3(&self) -> TEIF3_R
[src]
Bit 11 - Channel 3 Transfer Error flag
pub fn gif4(&self) -> GIF4_R
[src]
Bit 12 - Channel 4 Global interrupt flag
pub fn tcif4(&self) -> TCIF4_R
[src]
Bit 13 - Channel 4 Transfer Complete flag
pub fn htif4(&self) -> HTIF4_R
[src]
Bit 14 - Channel 4 Half Transfer Complete flag
pub fn teif4(&self) -> TEIF4_R
[src]
Bit 15 - Channel 4 Transfer Error flag
pub fn gif5(&self) -> GIF5_R
[src]
Bit 16 - Channel 5 Global interrupt flag
pub fn tcif5(&self) -> TCIF5_R
[src]
Bit 17 - Channel 5 Transfer Complete flag
pub fn htif5(&self) -> HTIF5_R
[src]
Bit 18 - Channel 5 Half Transfer Complete flag
pub fn teif5(&self) -> TEIF5_R
[src]
Bit 19 - Channel 5 Transfer Error flag
pub fn gif6(&self) -> GIF6_R
[src]
Bit 20 - Channel 6 Global interrupt flag
pub fn tcif6(&self) -> TCIF6_R
[src]
Bit 21 - Channel 6 Transfer Complete flag
pub fn htif6(&self) -> HTIF6_R
[src]
Bit 22 - Channel 6 Half Transfer Complete flag
pub fn teif6(&self) -> TEIF6_R
[src]
Bit 23 - Channel 6 Transfer Error flag
pub fn gif7(&self) -> GIF7_R
[src]
Bit 24 - Channel 7 Global interrupt flag
pub fn tcif7(&self) -> TCIF7_R
[src]
Bit 25 - Channel 7 Transfer Complete flag
pub fn htif7(&self) -> HTIF7_R
[src]
Bit 26 - Channel 7 Half Transfer Complete flag
pub fn teif7(&self) -> TEIF7_R
[src]
Bit 27 - Channel 7 Transfer Error flag
impl R<bool, SECIE_A>
[src]
pub fn variant(&self) -> SECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ALRIE_A>
[src]
pub fn variant(&self) -> ALRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OWIE_A>
[src]
pub fn variant(&self) -> OWIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn secie(&self) -> SECIE_R
[src]
Bit 0 - Second interrupt Enable
pub fn alrie(&self) -> ALRIE_R
[src]
Bit 1 - Alarm interrupt Enable
pub fn owie(&self) -> OWIE_R
[src]
Bit 2 - Overflow interrupt Enable
impl R<bool, SECF_A>
[src]
pub fn variant(&self) -> SECF_A
[src]
Get enumerated values variant
pub fn is_no_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is NOPRESCALEROVERFLOW
pub fn is_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is PRESCALEROVERFLOW
impl R<bool, ALRF_A>
[src]
pub fn variant(&self) -> ALRF_A
[src]
Get enumerated values variant
pub fn is_no_alarm(&self) -> bool
[src]
Checks if the value of the field is NOALARM
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
impl R<bool, OWF_A>
[src]
pub fn variant(&self) -> OWF_A
[src]
Get enumerated values variant
pub fn is_no_overflow(&self) -> bool
[src]
Checks if the value of the field is NOOVERFLOW
pub fn is_overflow(&self) -> bool
[src]
Checks if the value of the field is OVERFLOW
impl R<bool, RSF_A>
[src]
pub fn variant(&self) -> RSF_A
[src]
Get enumerated values variant
pub fn is_not_synchronized(&self) -> bool
[src]
Checks if the value of the field is NOTSYNCHRONIZED
pub fn is_synchronized(&self) -> bool
[src]
Checks if the value of the field is SYNCHRONIZED
impl R<bool, CNF_A>
[src]
pub fn variant(&self) -> CNF_A
[src]
Get enumerated values variant
pub fn is_exit(&self) -> bool
[src]
Checks if the value of the field is EXIT
pub fn is_enter(&self) -> bool
[src]
Checks if the value of the field is ENTER
impl R<bool, RTOFF_A>
[src]
pub fn variant(&self) -> RTOFF_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn secf(&self) -> SECF_R
[src]
Bit 0 - Second Flag
pub fn alrf(&self) -> ALRF_R
[src]
Bit 1 - Alarm Flag
pub fn owf(&self) -> OWF_R
[src]
Bit 2 - Overflow Flag
pub fn rsf(&self) -> RSF_R
[src]
Bit 3 - Registers Synchronized Flag
pub fn cnf(&self) -> CNF_R
[src]
Bit 4 - Configuration Flag
pub fn rtoff(&self) -> RTOFF_R
[src]
Bit 5 - RTC operation OFF
impl R<u32, Reg<u32, _DIVH>>
[src]
impl R<u32, Reg<u32, _DIVL>>
[src]
impl R<u32, Reg<u32, _CNTH>>
[src]
impl R<u32, Reg<u32, _CNTL>>
[src]
impl R<u8, PR_A>
[src]
pub fn variant(&self) -> PR_A
[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PR>>
[src]
impl R<u32, Reg<u32, _RLR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pvu(&self) -> PVU_R
[src]
Bit 0 - Watchdog prescaler value update
pub fn rvu(&self) -> RVU_R
[src]
Bit 1 - Watchdog counter reload value update
impl R<bool, WDGA_A>
[src]
pub fn variant(&self) -> WDGA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn t(&self) -> T_R
[src]
Bits 0:6 - 7-bit counter (MSB to LSB)
pub fn wdga(&self) -> WDGA_R
[src]
Bit 7 - Activation bit
impl R<bool, EWI_A>
[src]
pub fn variant(&self) -> Variant<bool, EWI_A>
[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
impl R<u8, WDGTB_A>
[src]
pub fn variant(&self) -> WDGTB_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFR>>
[src]
pub fn w(&self) -> W_R
[src]
Bits 0:6 - 7-bit window value
pub fn ewi(&self) -> EWI_R
[src]
Bit 9 - Early Wakeup Interrupt
pub fn wdgtb(&self) -> WDGTB_R
[src]
Bits 7:8 - Timer Base
impl R<bool, EWIF_A>
[src]
pub fn variant(&self) -> EWIF_A
[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<bool, SWRST_A>
[src]
pub fn variant(&self) -> SWRST_A
[src]
Get enumerated values variant
pub fn is_not_reset(&self) -> bool
[src]
Checks if the value of the field is NOTRESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, ALERT_A>
[src]
pub fn variant(&self) -> ALERT_A
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
pub fn is_drive(&self) -> bool
[src]
Checks if the value of the field is DRIVE
impl R<bool, PEC_A>
[src]
pub fn variant(&self) -> PEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, POS_A>
[src]
pub fn variant(&self) -> POS_A
[src]
Get enumerated values variant
pub fn is_current(&self) -> bool
[src]
Checks if the value of the field is CURRENT
pub fn is_next(&self) -> bool
[src]
Checks if the value of the field is NEXT
impl R<bool, ACK_A>
[src]
pub fn variant(&self) -> ACK_A
[src]
Get enumerated values variant
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
impl R<bool, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, START_A>
[src]
pub fn variant(&self) -> START_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<bool, NOSTRETCH_A>
[src]
pub fn variant(&self) -> NOSTRETCH_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ENGC_A>
[src]
pub fn variant(&self) -> ENGC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENPEC_A>
[src]
pub fn variant(&self) -> ENPEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENARP_A>
[src]
pub fn variant(&self) -> ENARP_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SMBTYPE_A>
[src]
pub fn variant(&self) -> SMBTYPE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<bool, SMBUS_A>
[src]
pub fn variant(&self) -> SMBUS_A
[src]
Get enumerated values variant
pub fn is_i2c(&self) -> bool
[src]
Checks if the value of the field is I2C
pub fn is_smbus(&self) -> bool
[src]
Checks if the value of the field is SMBUS
impl R<bool, PE_A>
[src]
pub fn variant(&self) -> PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 15 - Software reset
pub fn alert(&self) -> ALERT_R
[src]
Bit 13 - SMBus alert
pub fn pec(&self) -> PEC_R
[src]
Bit 12 - Packet error checking
pub fn pos(&self) -> POS_R
[src]
Bit 11 - Acknowledge/PEC Position (for data reception)
pub fn ack(&self) -> ACK_R
[src]
Bit 10 - Acknowledge enable
pub fn stop(&self) -> STOP_R
[src]
Bit 9 - Stop generation
pub fn start(&self) -> START_R
[src]
Bit 8 - Start generation
pub fn nostretch(&self) -> NOSTRETCH_R
[src]
Bit 7 - Clock stretching disable (Slave mode)
pub fn engc(&self) -> ENGC_R
[src]
Bit 6 - General call enable
pub fn enpec(&self) -> ENPEC_R
[src]
Bit 5 - PEC enable
pub fn enarp(&self) -> ENARP_R
[src]
Bit 4 - ARP enable
pub fn smbtype(&self) -> SMBTYPE_R
[src]
Bit 3 - SMBus type
pub fn smbus(&self) -> SMBUS_R
[src]
Bit 1 - SMBus mode
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
impl R<bool, LAST_A>
[src]
pub fn variant(&self) -> LAST_A
[src]
Get enumerated values variant
pub fn is_not_last(&self) -> bool
[src]
Checks if the value of the field is NOTLAST
pub fn is_last(&self) -> bool
[src]
Checks if the value of the field is LAST
impl R<bool, DMAEN_A>
[src]
pub fn variant(&self) -> DMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITBUFEN_A>
[src]
pub fn variant(&self) -> ITBUFEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITEVTEN_A>
[src]
pub fn variant(&self) -> ITEVTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITERREN_A>
[src]
pub fn variant(&self) -> ITERREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn last(&self) -> LAST_R
[src]
Bit 12 - DMA last transfer
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 11 - DMA requests enable
pub fn itbufen(&self) -> ITBUFEN_R
[src]
Bit 10 - Buffer interrupt enable
pub fn itevten(&self) -> ITEVTEN_R
[src]
Bit 9 - Event interrupt enable
pub fn iterren(&self) -> ITERREN_R
[src]
Bit 8 - Error interrupt enable
pub fn freq(&self) -> FREQ_R
[src]
Bits 0:5 - Peripheral clock frequency
impl R<bool, ADDMODE_A>
[src]
pub fn variant(&self) -> ADDMODE_A
[src]
Get enumerated values variant
pub fn is_add7(&self) -> bool
[src]
Checks if the value of the field is ADD7
pub fn is_add10(&self) -> bool
[src]
Checks if the value of the field is ADD10
impl R<u32, Reg<u32, _OAR1>>
[src]
pub fn addmode(&self) -> ADDMODE_R
[src]
Bit 15 - Addressing mode (slave mode)
pub fn add(&self) -> ADD_R
[src]
Bits 0:9 - Interface address
impl R<bool, ENDUAL_A>
[src]
pub fn variant(&self) -> ENDUAL_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u32, Reg<u32, _OAR2>>
[src]
pub fn add2(&self) -> ADD2_R
[src]
Bits 1:7 - Interface address
pub fn endual(&self) -> ENDUAL_R
[src]
Bit 0 - Dual addressing mode enable
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, SMBALERT_A>
[src]
pub fn variant(&self) -> SMBALERT_A
[src]
Get enumerated values variant
pub fn is_no_alert(&self) -> bool
[src]
Checks if the value of the field is NOALERT
pub fn is_alert(&self) -> bool
[src]
Checks if the value of the field is ALERT
impl R<bool, TIMEOUT_A>
[src]
pub fn variant(&self) -> TIMEOUT_A
[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool
[src]
Checks if the value of the field is NOTIMEOUT
pub fn is_timeout(&self) -> bool
[src]
Checks if the value of the field is TIMEOUT
impl R<bool, PECERR_A>
[src]
pub fn variant(&self) -> PECERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, AF_A>
[src]
pub fn variant(&self) -> AF_A
[src]
Get enumerated values variant
pub fn is_no_failure(&self) -> bool
[src]
Checks if the value of the field is NOFAILURE
pub fn is_failure(&self) -> bool
[src]
Checks if the value of the field is FAILURE
impl R<bool, ARLO_A>
[src]
pub fn variant(&self) -> ARLO_A
[src]
Get enumerated values variant
pub fn is_no_lost(&self) -> bool
[src]
Checks if the value of the field is NOLOST
pub fn is_lost(&self) -> bool
[src]
Checks if the value of the field is LOST
impl R<bool, BERR_A>
[src]
pub fn variant(&self) -> BERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<bool, STOPF_A>
[src]
pub fn variant(&self) -> STOPF_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, BTF_A>
[src]
pub fn variant(&self) -> BTF_A
[src]
Get enumerated values variant
pub fn is_not_finished(&self) -> bool
[src]
Checks if the value of the field is NOTFINISHED
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<bool, ADDR_A>
[src]
pub fn variant(&self) -> ADDR_A
[src]
Get enumerated values variant
pub fn is_not_match(&self) -> bool
[src]
Checks if the value of the field is NOTMATCH
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, SB_A>
[src]
pub fn variant(&self) -> SB_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<u32, Reg<u32, _SR1>>
[src]
pub fn smbalert(&self) -> SMBALERT_R
[src]
Bit 15 - SMBus alert
pub fn timeout(&self) -> TIMEOUT_R
[src]
Bit 14 - Timeout or Tlow error
pub fn pecerr(&self) -> PECERR_R
[src]
Bit 12 - PEC Error in reception
pub fn ovr(&self) -> OVR_R
[src]
Bit 11 - Overrun/Underrun
pub fn af(&self) -> AF_R
[src]
Bit 10 - Acknowledge failure
pub fn arlo(&self) -> ARLO_R
[src]
Bit 9 - Arbitration lost (master mode)
pub fn berr(&self) -> BERR_R
[src]
Bit 8 - Bus error
pub fn tx_e(&self) -> TXE_R
[src]
Bit 7 - Data register empty (transmitters)
pub fn rx_ne(&self) -> RXNE_R
[src]
Bit 6 - Data register not empty (receivers)
pub fn stopf(&self) -> STOPF_R
[src]
Bit 4 - Stop detection (slave mode)
pub fn add10(&self) -> ADD10_R
[src]
Bit 3 - 10-bit header sent (Master mode)
pub fn btf(&self) -> BTF_R
[src]
Bit 2 - Byte transfer finished
pub fn addr(&self) -> ADDR_R
[src]
Bit 1 - Address sent (master mode)/matched (slave mode)
pub fn sb(&self) -> SB_R
[src]
Bit 0 - Start bit (Master mode)
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn pec(&self) -> PEC_R
[src]
Bits 8:15 - acket error checking register
pub fn dualf(&self) -> DUALF_R
[src]
Bit 7 - Dual flag (Slave mode)
pub fn smbhost(&self) -> SMBHOST_R
[src]
Bit 6 - SMBus host header (Slave mode)
pub fn smbdefault(&self) -> SMBDEFAULT_R
[src]
Bit 5 - SMBus device default address (Slave mode)
pub fn gencall(&self) -> GENCALL_R
[src]
Bit 4 - General call address (Slave mode)
pub fn tra(&self) -> TRA_R
[src]
Bit 2 - Transmitter/receiver
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Bus busy
pub fn msl(&self) -> MSL_R
[src]
Bit 0 - Master/slave
impl R<bool, F_S_A>
[src]
pub fn variant(&self) -> F_S_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_fast(&self) -> bool
[src]
Checks if the value of the field is FAST
impl R<bool, DUTY_A>
[src]
pub fn variant(&self) -> DUTY_A
[src]
Get enumerated values variant
pub fn is_duty2_1(&self) -> bool
[src]
Checks if the value of the field is DUTY2_1
pub fn is_duty16_9(&self) -> bool
[src]
Checks if the value of the field is DUTY16_9
impl R<u32, Reg<u32, _CCR>>
[src]
pub fn f_s(&self) -> F_S_R
[src]
Bit 15 - I2C master mode selection
pub fn duty(&self) -> DUTY_R
[src]
Bit 14 - Fast mode duty cycle
pub fn ccr(&self) -> CCR_R
[src]
Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)
impl R<u32, Reg<u32, _TRISE>>
[src]
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn udr(&self) -> UDR_R
[src]
Bit 3 - Underrun flag
pub fn chside(&self) -> CHSIDE_R
[src]
Bit 2 - Channel side
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<u32, Reg<u32, _I2SCFGR>>
[src]
pub fn i2smod(&self) -> I2SMOD_R
[src]
Bit 11 - I2S mode selection
pub fn i2se(&self) -> I2SE_R
[src]
Bit 10 - I2S Enable
pub fn i2scfg(&self) -> I2SCFG_R
[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsync(&self) -> PCMSYNC_R
[src]
Bit 7 - PCM frame synchronization
pub fn i2sstd(&self) -> I2SSTD_R
[src]
Bits 4:5 - I2S standard selection
pub fn ckpol(&self) -> CKPOL_R
[src]
Bit 3 - Steady state clock polarity
pub fn datlen(&self) -> DATLEN_R
[src]
Bits 1:2 - Data length to be transferred
pub fn chlen(&self) -> CHLEN_R
[src]
Bit 0 - Channel length (number of bits per audio channel)
impl R<u32, Reg<u32, _I2SPR>>
[src]
pub fn mckoe(&self) -> MCKOE_R
[src]
Bit 9 - Master clock output enable
pub fn odd(&self) -> ODD_R
[src]
Bit 8 - Odd factor for the prescaler
pub fn i2sdiv(&self) -> I2SDIV_R
[src]
Bits 0:7 - I2S Linear prescaler
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cts(&self) -> CTS_R
[src]
Bit 9 - CTS flag
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - mantissa of USARTDIV
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - fraction of USARTDIV
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool
[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool
[src]
Checks if the value of the field is STOP1P5
impl R<bool, CLKEN_A>
[src]
pub fn variant(&self) -> CLKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first(&self) -> bool
[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn clken(&self) -> CLKEN_R
[src]
Bit 11 - Clock enable
pub fn cpol(&self) -> CPOL_R
[src]
Bit 10 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 9 - Clock phase
pub fn lbcl(&self) -> LBCL_R
[src]
Bit 8 - Last bit clock pulse
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
impl R<bool, CTSIE_A>
[src]
pub fn variant(&self) -> CTSIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSE_A>
[src]
pub fn variant(&self) -> CTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSE_A>
[src]
pub fn variant(&self) -> RTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>
[src]
pub fn variant(&self) -> SCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, NACK_A>
[src]
pub fn variant(&self) -> NACK_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn ctsie(&self) -> CTSIE_R
[src]
Bit 10 - CTS interrupt enable
pub fn ctse(&self) -> CTSE_R
[src]
Bit 9 - CTS enable
pub fn rtse(&self) -> RTSE_R
[src]
Bit 8 - RTS enable
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn scen(&self) -> SCEN_R
[src]
Bit 5 - Smartcard mode enable
pub fn nack(&self) -> NACK_R
[src]
Bit 4 - Smartcard NACK enable
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _GTPR>>
[src]
pub fn gt(&self) -> GT_R
[src]
Bits 8:15 - Guard time value
pub fn psc(&self) -> PSC_R
[src]
Bits 0:7 - Prescaler value
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, DUALMOD_A>
[src]
pub fn variant(&self) -> Variant<u8, DUALMOD_A>
[src]
Get enumerated values variant
pub fn is_independent(&self) -> bool
[src]
Checks if the value of the field is INDEPENDENT
pub fn is_regular_injected(&self) -> bool
[src]
Checks if the value of the field is REGULARINJECTED
pub fn is_regular_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is REGULARALTERNATETRIGGER
pub fn is_injected_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDFASTINTERLEAVED
pub fn is_injected_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDSLOWINTERLEAVED
pub fn is_injected(&self) -> bool
[src]
Checks if the value of the field is INJECTED
pub fn is_regular(&self) -> bool
[src]
Checks if the value of the field is REGULAR
pub fn is_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is FASTINTERLEAVED
pub fn is_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is SLOWINTERLEAVED
pub fn is_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is ALTERNATETRIGGER
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
impl R<u32, SMPX_X_A>
[src]
pub fn variant(&self) -> Variant<u32, SMPX_X_A>
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _IDR>>
[src]
impl R<u8, LATENCY_A>
[src]
pub fn variant(&self) -> Variant<u8, LATENCY_A>
[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool
[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool
[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool
[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _ACR>>
[src]
pub fn latency(&self) -> LATENCY_R
[src]
Bits 0:2 - Latency
pub fn hlfcya(&self) -> HLFCYA_R
[src]
Bit 3 - Flash half cycle access enable
pub fn prftbe(&self) -> PRFTBE_R
[src]
Bit 4 - Prefetch buffer enable
pub fn prftbs(&self) -> PRFTBS_R
[src]
Bit 5 - Prefetch buffer status
impl R<u32, Reg<u32, _SR>>
[src]
pub fn eop(&self) -> EOP_R
[src]
Bit 5 - End of operation
pub fn wrprterr(&self) -> WRPRTERR_R
[src]
Bit 4 - Write protection error
pub fn pgerr(&self) -> PGERR_R
[src]
Bit 2 - Programming error
pub fn bsy(&self) -> BSY_R
[src]
Bit 0 - Busy
impl R<u32, Reg<u32, _CR>>
[src]
pub fn pg(&self) -> PG_R
[src]
Bit 0 - Programming
pub fn per(&self) -> PER_R
[src]
Bit 1 - Page Erase
pub fn mer(&self) -> MER_R
[src]
Bit 2 - Mass Erase
pub fn optpg(&self) -> OPTPG_R
[src]
Bit 4 - Option byte programming
pub fn opter(&self) -> OPTER_R
[src]
Bit 5 - Option byte erase
pub fn strt(&self) -> STRT_R
[src]
Bit 6 - Start
pub fn lock(&self) -> LOCK_R
[src]
Bit 7 - Lock
pub fn optwre(&self) -> OPTWRE_R
[src]
Bit 9 - Option bytes write enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 10 - Error interrupt enable
pub fn eopie(&self) -> EOPIE_R
[src]
Bit 12 - End of operation interrupt enable
impl R<u32, Reg<u32, _OBR>>
[src]
pub fn opterr(&self) -> OPTERR_R
[src]
Bit 0 - Option byte error
pub fn rdprt(&self) -> RDPRT_R
[src]
Bit 1 - Read protection
pub fn wdg_sw(&self) -> WDG_SW_R
[src]
Bit 2 - WDG_SW
pub fn n_rst_stop(&self) -> NRST_STOP_R
[src]
Bit 3 - nRST_STOP
pub fn n_rst_stdby(&self) -> NRST_STDBY_R
[src]
Bit 4 - nRST_STDBY
pub fn data0(&self) -> DATA0_R
[src]
Bits 10:17 - Data0
pub fn data1(&self) -> DATA1_R
[src]
Bits 18:25 - Data1
impl R<u32, Reg<u32, _WRPR>>
[src]
impl R<u32, Reg<u32, _IDCODE>>
[src]
pub fn dev_id(&self) -> DEV_ID_R
[src]
Bits 0:11 - DEV_ID
pub fn rev_id(&self) -> REV_ID_R
[src]
Bits 16:31 - REV_ID
impl R<u32, Reg<u32, _CR>>
[src]
pub fn dbg_sleep(&self) -> DBG_SLEEP_R
[src]
Bit 0 - DBG_SLEEP
pub fn dbg_stop(&self) -> DBG_STOP_R
[src]
Bit 1 - DBG_STOP
pub fn dbg_standby(&self) -> DBG_STANDBY_R
[src]
Bit 2 - DBG_STANDBY
pub fn trace_ioen(&self) -> TRACE_IOEN_R
[src]
Bit 5 - TRACE_IOEN
pub fn trace_mode(&self) -> TRACE_MODE_R
[src]
Bits 6:7 - TRACE_MODE
pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R
[src]
Bit 8 - DBG_IWDG_STOP
pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R
[src]
Bit 9 - DBG_WWDG_STOP
pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R
[src]
Bit 11 - DBG_TIM2_STOP
pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R
[src]
Bit 12 - DBG_TIM3_STOP
pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R
[src]
Bit 15 - DBG_I2C1_SMBUS_TIMEOUT
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BKP_DR>>
[src]
impl R<bool, ASOE_A>
[src]
pub fn variant(&self) -> ASOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ASOS_A>
[src]
pub fn variant(&self) -> ASOS_A
[src]
Get enumerated values variant
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<u32, Reg<u32, _RTCCR>>
[src]
pub fn cal(&self) -> CAL_R
[src]
Bits 0:6 - Calibration value
pub fn cco(&self) -> CCO_R
[src]
Bit 7 - Calibration Clock Output
pub fn asoe(&self) -> ASOE_R
[src]
Bit 8 - Alarm or second output enable
pub fn asos(&self) -> ASOS_R
[src]
Bit 9 - Alarm or second output selection
impl R<bool, TPE_A>
[src]
pub fn variant(&self) -> TPE_A
[src]
Get enumerated values variant
pub fn is_general(&self) -> bool
[src]
Checks if the value of the field is GENERAL
pub fn is_alternate(&self) -> bool
[src]
Checks if the value of the field is ALTERNATE
impl R<bool, TPAL_A>
[src]
pub fn variant(&self) -> TPAL_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CR>>
[src]
pub fn tpe(&self) -> TPE_R
[src]
Bit 0 - Tamper pin enable
pub fn tpal(&self) -> TPAL_R
[src]
Bit 1 - Tamper pin active level
impl R<bool, TPIE_A>
[src]
pub fn variant(&self) -> TPIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tpie(&self) -> TPIE_R
[src]
Bit 2 - Tamper Pin interrupt enable
pub fn tef(&self) -> TEF_R
[src]
Bit 8 - Tamper Event Flag
pub fn tif(&self) -> TIF_R
[src]
Bit 9 - Tamper Interrupt Flag
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR1>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BWTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - Bus turnaround phase duration
impl R<u32, Reg<u32, _FS_DCFG>>
[src]
pub fn dspd(&self) -> DSPD_R
[src]
Bits 0:1 - Device speed
pub fn nzlsohsk(&self) -> NZLSOHSK_R
[src]
Bit 2 - Non-zero-length status OUT handshake
pub fn dad(&self) -> DAD_R
[src]
Bits 4:10 - Device address
pub fn pfivl(&self) -> PFIVL_R
[src]
Bits 11:12 - Periodic frame interval
impl R<u32, Reg<u32, _FS_DCTL>>
[src]
pub fn rwusig(&self) -> RWUSIG_R
[src]
Bit 0 - Remote wakeup signaling
pub fn sdis(&self) -> SDIS_R
[src]
Bit 1 - Soft disconnect
pub fn ginsts(&self) -> GINSTS_R
[src]
Bit 2 - Global IN NAK status
pub fn gonsts(&self) -> GONSTS_R
[src]
Bit 3 - Global OUT NAK status
pub fn tctl(&self) -> TCTL_R
[src]
Bits 4:6 - Test control
pub fn sginak(&self) -> SGINAK_R
[src]
Bit 7 - Set global IN NAK
pub fn cginak(&self) -> CGINAK_R
[src]
Bit 8 - Clear global IN NAK
pub fn sgonak(&self) -> SGONAK_R
[src]
Bit 9 - Set global OUT NAK
pub fn cgonak(&self) -> CGONAK_R
[src]
Bit 10 - Clear global OUT NAK
pub fn poprgdne(&self) -> POPRGDNE_R
[src]
Bit 11 - Power-on programming done
impl R<u32, Reg<u32, _FS_DSTS>>
[src]
pub fn suspsts(&self) -> SUSPSTS_R
[src]
Bit 0 - Suspend status
pub fn enumspd(&self) -> ENUMSPD_R
[src]
Bits 1:2 - Enumerated speed
pub fn eerr(&self) -> EERR_R
[src]
Bit 3 - Erratic error
pub fn fnsof(&self) -> FNSOF_R
[src]
Bits 8:21 - Frame number of the received SOF
impl R<u32, Reg<u32, _FS_DIEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn tom(&self) -> TOM_R
[src]
Bit 3 - Timeout condition mask (Non-isochronous endpoints)
pub fn ittxfemsk(&self) -> ITTXFEMSK_R
[src]
Bit 4 - IN token received when TxFIFO empty mask
pub fn inepnmm(&self) -> INEPNMM_R
[src]
Bit 5 - IN token received with EP mismatch mask
pub fn inepnem(&self) -> INEPNEM_R
[src]
Bit 6 - IN endpoint NAK effective mask
impl R<u32, Reg<u32, _FS_DOEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn stupm(&self) -> STUPM_R
[src]
Bit 3 - SETUP phase done mask
pub fn otepdm(&self) -> OTEPDM_R
[src]
Bit 4 - OUT token received when endpoint disabled mask
impl R<u32, Reg<u32, _FS_DAINT>>
[src]
pub fn iepint(&self) -> IEPINT_R
[src]
Bits 0:15 - IN endpoint interrupt bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _FS_DAINTMSK>>
[src]
pub fn iepm(&self) -> IEPM_R
[src]
Bits 0:15 - IN EP interrupt mask bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _DVBUSDIS>>
[src]
impl R<u32, Reg<u32, _DVBUSPULSE>>
[src]
impl R<u32, Reg<u32, _DIEPEMPMSK>>
[src]
pub fn ineptxfem(&self) -> INEPTXFEM_R
[src]
Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits
impl R<u32, Reg<u32, _FS_DIEPCTL0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - Maximum packet size
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USB active endpoint
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAK status
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - STALL handshake
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TxFIFO number
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - Endpoint disable
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - Endpoint enable
impl R<u32, Reg<u32, _DIEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL0>>
[src]
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPINT0>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT1>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT2>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT3>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT0>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT1>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT2>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT3>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPTSIZ0>>
[src]
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:20 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ0>>
[src]
pub fn stupcnt(&self) -> STUPCNT_R
[src]
Bits 29:30 - SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bit 19 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ1>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ2>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ3>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DTXFSTS0>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS1>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS2>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS3>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DOEPTSIZ1>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ2>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ3>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _FS_GOTGCTL>>
[src]
pub fn srqscs(&self) -> SRQSCS_R
[src]
Bit 0 - Session request success
pub fn srq(&self) -> SRQ_R
[src]
Bit 1 - Session request
pub fn hngscs(&self) -> HNGSCS_R
[src]
Bit 8 - Host negotiation success
pub fn hnprq(&self) -> HNPRQ_R
[src]
Bit 9 - HNP request
pub fn hshnpen(&self) -> HSHNPEN_R
[src]
Bit 10 - Host set HNP enable
pub fn dhnpen(&self) -> DHNPEN_R
[src]
Bit 11 - Device HNP enabled
pub fn cidsts(&self) -> CIDSTS_R
[src]
Bit 16 - Connector ID status
pub fn dbct(&self) -> DBCT_R
[src]
Bit 17 - Long/short debounce time
pub fn asvld(&self) -> ASVLD_R
[src]
Bit 18 - A-session valid
pub fn bsvld(&self) -> BSVLD_R
[src]
Bit 19 - B-session valid
impl R<u32, Reg<u32, _FS_GOTGINT>>
[src]
pub fn sedet(&self) -> SEDET_R
[src]
Bit 2 - Session end detected
pub fn srsschg(&self) -> SRSSCHG_R
[src]
Bit 8 - Session request success status change
pub fn hnsschg(&self) -> HNSSCHG_R
[src]
Bit 9 - Host negotiation success status change
pub fn hngdet(&self) -> HNGDET_R
[src]
Bit 17 - Host negotiation detected
pub fn adtochg(&self) -> ADTOCHG_R
[src]
Bit 18 - A-device timeout change
pub fn dbcdne(&self) -> DBCDNE_R
[src]
Bit 19 - Debounce done
impl R<u32, Reg<u32, _FS_GAHBCFG>>
[src]
pub fn gint(&self) -> GINT_R
[src]
Bit 0 - Global interrupt mask
pub fn txfelvl(&self) -> TXFELVL_R
[src]
Bit 7 - TxFIFO empty level
pub fn ptxfelvl(&self) -> PTXFELVL_R
[src]
Bit 8 - Periodic TxFIFO empty level
impl R<u32, Reg<u32, _FS_GUSBCFG>>
[src]
pub fn tocal(&self) -> TOCAL_R
[src]
Bits 0:2 - FS timeout calibration
pub fn srpcap(&self) -> SRPCAP_R
[src]
Bit 8 - SRP-capable
pub fn hnpcap(&self) -> HNPCAP_R
[src]
Bit 9 - HNP-capable
pub fn trdt(&self) -> TRDT_R
[src]
Bits 10:13 - USB turnaround time
pub fn fhmod(&self) -> FHMOD_R
[src]
Bit 29 - Force host mode
pub fn fdmod(&self) -> FDMOD_R
[src]
Bit 30 - Force device mode
pub fn ctxpkt(&self) -> CTXPKT_R
[src]
Bit 31 - Corrupt Tx packet
impl R<u32, Reg<u32, _FS_GRSTCTL>>
[src]
pub fn csrst(&self) -> CSRST_R
[src]
Bit 0 - Core soft reset
pub fn hsrst(&self) -> HSRST_R
[src]
Bit 1 - HCLK soft reset
pub fn fcrst(&self) -> FCRST_R
[src]
Bit 2 - Host frame counter reset
pub fn rxfflsh(&self) -> RXFFLSH_R
[src]
Bit 4 - RxFIFO flush
pub fn txfflsh(&self) -> TXFFLSH_R
[src]
Bit 5 - TxFIFO flush
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 6:10 - TxFIFO number
pub fn ahbidl(&self) -> AHBIDL_R
[src]
Bit 31 - AHB master idle
impl R<u32, Reg<u32, _FS_GINTSTS>>
[src]
pub fn cmod(&self) -> CMOD_R
[src]
Bit 0 - Current mode of operation
pub fn mmis(&self) -> MMIS_R
[src]
Bit 1 - Mode mismatch interrupt
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt
pub fn sof(&self) -> SOF_R
[src]
Bit 3 - Start of frame
pub fn rxflvl(&self) -> RXFLVL_R
[src]
Bit 4 - RxFIFO non-empty
pub fn nptxfe(&self) -> NPTXFE_R
[src]
Bit 5 - Non-periodic TxFIFO empty
pub fn ginakeff(&self) -> GINAKEFF_R
[src]
Bit 6 - Global IN non-periodic NAK effective
pub fn goutnakeff(&self) -> GOUTNAKEFF_R
[src]
Bit 7 - Global OUT NAK effective
pub fn esusp(&self) -> ESUSP_R
[src]
Bit 10 - Early suspend
pub fn usbsusp(&self) -> USBSUSP_R
[src]
Bit 11 - USB suspend
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset
pub fn enumdne(&self) -> ENUMDNE_R
[src]
Bit 13 - Enumeration done
pub fn isoodrp(&self) -> ISOODRP_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt
pub fn eopf(&self) -> EOPF_R
[src]
Bit 15 - End of periodic frame interrupt
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoint interrupt
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoint interrupt
pub fn iisoixfr(&self) -> IISOIXFR_R
[src]
Bit 20 - Incomplete isochronous IN transfer
pub fn ipxfr_incompisoout(&self) -> IPXFR_INCOMPISOOUT_R
[src]
Bit 21 - Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)
pub fn hprtint(&self) -> HPRTINT_R
[src]
Bit 24 - Host port interrupt
pub fn hcint(&self) -> HCINT_R
[src]
Bit 25 - Host channels interrupt
pub fn ptxfe(&self) -> PTXFE_R
[src]
Bit 26 - Periodic TxFIFO empty
pub fn cidschg(&self) -> CIDSCHG_R
[src]
Bit 28 - Connector ID status change
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt
pub fn srqint(&self) -> SRQINT_R
[src]
Bit 30 - Session request/new session detected interrupt
pub fn wkupint(&self) -> WKUPINT_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt
impl R<u32, Reg<u32, _FS_GINTMSK>>
[src]
pub fn mmism(&self) -> MMISM_R
[src]
Bit 1 - Mode mismatch interrupt mask
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 3 - Start of frame mask
pub fn rxflvlm(&self) -> RXFLVLM_R
[src]
Bit 4 - Receive FIFO non-empty mask
pub fn nptxfem(&self) -> NPTXFEM_R
[src]
Bit 5 - Non-periodic TxFIFO empty mask
pub fn ginakeffm(&self) -> GINAKEFFM_R
[src]
Bit 6 - Global non-periodic IN NAK effective mask
pub fn gonakeffm(&self) -> GONAKEFFM_R
[src]
Bit 7 - Global OUT NAK effective mask
pub fn esuspm(&self) -> ESUSPM_R
[src]
Bit 10 - Early suspend mask
pub fn usbsuspm(&self) -> USBSUSPM_R
[src]
Bit 11 - USB suspend mask
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset mask
pub fn enumdnem(&self) -> ENUMDNEM_R
[src]
Bit 13 - Enumeration done mask
pub fn isoodrpm(&self) -> ISOODRPM_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt mask
pub fn eopfm(&self) -> EOPFM_R
[src]
Bit 15 - End of periodic frame interrupt mask
pub fn epmism(&self) -> EPMISM_R
[src]
Bit 17 - Endpoint mismatch interrupt mask
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoints interrupt mask
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoints interrupt mask
pub fn iisoixfrm(&self) -> IISOIXFRM_R
[src]
Bit 20 - Incomplete isochronous IN transfer mask
pub fn ipxfrm_iisooxfrm(&self) -> IPXFRM_IISOOXFRM_R
[src]
Bit 21 - Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)
pub fn prtim(&self) -> PRTIM_R
[src]
Bit 24 - Host port interrupt mask
pub fn hcim(&self) -> HCIM_R
[src]
Bit 25 - Host channels interrupt mask
pub fn ptxfem(&self) -> PTXFEM_R
[src]
Bit 26 - Periodic TxFIFO empty mask
pub fn cidschgm(&self) -> CIDSCHGM_R
[src]
Bit 28 - Connector ID status change mask
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt mask
pub fn srqim(&self) -> SRQIM_R
[src]
Bit 30 - Session request/new session detected interrupt mask
pub fn wuim(&self) -> WUIM_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt mask
impl R<u32, Reg<u32, _FS_GRXSTSR_DEVICE>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXSTSR_HOST>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXFSIZ>>
[src]
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_DEVICE>>
[src]
pub fn tx0fsa(&self) -> TX0FSA_R
[src]
Bits 0:15 - Endpoint 0 transmit RAM start address
pub fn tx0fd(&self) -> TX0FD_R
[src]
Bits 16:31 - Endpoint 0 TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_HOST>>
[src]
pub fn nptxfsa(&self) -> NPTXFSA_R
[src]
Bits 0:15 - Non-periodic transmit RAM start address
pub fn nptxfd(&self) -> NPTXFD_R
[src]
Bits 16:31 - Non-periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXSTS>>
[src]
pub fn nptxfsav(&self) -> NPTXFSAV_R
[src]
Bits 0:15 - Non-periodic TxFIFO space available
pub fn nptqxsav(&self) -> NPTQXSAV_R
[src]
Bits 16:23 - Non-periodic transmit request queue space available
pub fn nptxqtop(&self) -> NPTXQTOP_R
[src]
Bits 24:30 - Top of the non-periodic transmit request queue
impl R<u32, Reg<u32, _FS_GCCFG>>
[src]
pub fn pwrdwn(&self) -> PWRDWN_R
[src]
Bit 16 - Power down
pub fn vbusasen(&self) -> VBUSASEN_R
[src]
Bit 18 - Enable the VBUS sensing device
pub fn vbusbsen(&self) -> VBUSBSEN_R
[src]
Bit 19 - Enable the VBUS sensing device
pub fn sofouten(&self) -> SOFOUTEN_R
[src]
Bit 20 - SOF output enable
impl R<u32, Reg<u32, _FS_CID>>
[src]
pub fn product_id(&self) -> PRODUCT_ID_R
[src]
Bits 0:31 - Product ID field
impl R<u32, Reg<u32, _FS_HPTXFSIZ>>
[src]
pub fn ptxsa(&self) -> PTXSA_R
[src]
Bits 0:15 - Host periodic TxFIFO start address
pub fn ptxfsiz(&self) -> PTXFSIZ_R
[src]
Bits 16:31 - Host periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF1>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO2 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF2>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO3 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF3>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO4 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_HCFG>>
[src]
pub fn fslspcs(&self) -> FSLSPCS_R
[src]
Bits 0:1 - FS/LS PHY clock select
pub fn fslss(&self) -> FSLSS_R
[src]
Bit 2 - FS- and LS-only support
impl R<u32, Reg<u32, _HFIR>>
[src]
impl R<u32, Reg<u32, _FS_HFNUM>>
[src]
pub fn frnum(&self) -> FRNUM_R
[src]
Bits 0:15 - Frame number
pub fn ftrem(&self) -> FTREM_R
[src]
Bits 16:31 - Frame time remaining
impl R<u32, Reg<u32, _FS_HPTXSTS>>
[src]
pub fn ptxfsavl(&self) -> PTXFSAVL_R
[src]
Bits 0:15 - Periodic transmit data FIFO space available
pub fn ptxqsav(&self) -> PTXQSAV_R
[src]
Bits 16:23 - Periodic transmit request queue space available
pub fn ptxqtop(&self) -> PTXQTOP_R
[src]
Bits 24:31 - Top of the periodic transmit request queue
impl R<u32, Reg<u32, _HAINT>>
[src]
impl R<u32, Reg<u32, _HAINTMSK>>
[src]
impl R<u32, Reg<u32, _FS_HPRT>>
[src]
pub fn pcsts(&self) -> PCSTS_R
[src]
Bit 0 - Port connect status
pub fn pcdet(&self) -> PCDET_R
[src]
Bit 1 - Port connect detected
pub fn pena(&self) -> PENA_R
[src]
Bit 2 - Port enable
pub fn penchng(&self) -> PENCHNG_R
[src]
Bit 3 - Port enable/disable change
pub fn poca(&self) -> POCA_R
[src]
Bit 4 - Port overcurrent active
pub fn pocchng(&self) -> POCCHNG_R
[src]
Bit 5 - Port overcurrent change
pub fn pres(&self) -> PRES_R
[src]
Bit 6 - Port resume
pub fn psusp(&self) -> PSUSP_R
[src]
Bit 7 - Port suspend
pub fn prst(&self) -> PRST_R
[src]
Bit 8 - Port reset
pub fn plsts(&self) -> PLSTS_R
[src]
Bits 10:11 - Port line status
pub fn ppwr(&self) -> PPWR_R
[src]
Bit 12 - Port power
pub fn ptctl(&self) -> PTCTL_R
[src]
Bits 13:16 - Port test control
pub fn pspd(&self) -> PSPD_R
[src]
Bits 17:18 - Port speed
impl R<u32, Reg<u32, _FS_HCCHAR0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR1>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR2>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR3>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR4>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR5>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR6>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR7>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCINT0>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT1>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT2>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT3>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT4>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT5>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT6>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT7>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINTMSK0>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK1>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK2>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK3>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK4>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK5>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK6>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK7>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCTSIZ0>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ1>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ2>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ3>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ4>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ5>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ6>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ7>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_PCGCCTL>>
[src]
pub fn stppclk(&self) -> STPPCLK_R
[src]
Bit 0 - Stop PHY clock
pub fn gatehclk(&self) -> GATEHCLK_R
[src]
Bit 1 - Gate HCLK
pub fn physusp(&self) -> PHYSUSP_R
[src]
Bit 4 - PHY Suspended
impl R<u32, Reg<u32, _POWER>>
[src]
impl R<u32, Reg<u32, _CLKCR>>
[src]
pub fn hwfc_en(&self) -> HWFC_EN_R
[src]
Bit 14 - HW Flow Control enable
pub fn negedge(&self) -> NEGEDGE_R
[src]
Bit 13 - SDIO_CK dephasing selection bit
pub fn widbus(&self) -> WIDBUS_R
[src]
Bits 11:12 - Wide bus mode enable bit
pub fn bypass(&self) -> BYPASS_R
[src]
Bit 10 - Clock divider bypass enable bit
pub fn pwrsav(&self) -> PWRSAV_R
[src]
Bit 9 - Power saving configuration bit
pub fn clken(&self) -> CLKEN_R
[src]
Bit 8 - Clock enable bit
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 0:7 - Clock divide factor
impl R<u32, Reg<u32, _ARG>>
[src]
impl R<u32, Reg<u32, _CMD>>
[src]
pub fn ce_atacmd(&self) -> CE_ATACMD_R
[src]
Bit 14 - CE-ATA command
pub fn n_ien(&self) -> NIEN_R
[src]
Bit 13 - not Interrupt Enable
pub fn encmdcompl(&self) -> ENCMDCOMPL_R
[src]
Bit 12 - Enable CMD completion
pub fn sdiosuspend(&self) -> SDIOSUSPEND_R
[src]
Bit 11 - SD I/O suspend command
pub fn cpsmen(&self) -> CPSMEN_R
[src]
Bit 10 - Command path state machine (CPSM) Enable bit
pub fn waitpend(&self) -> WAITPEND_R
[src]
Bit 9 - CPSM Waits for ends of data transfer (CmdPend internal signal).
pub fn waitint(&self) -> WAITINT_R
[src]
Bit 8 - CPSM waits for interrupt request
pub fn waitresp(&self) -> WAITRESP_R
[src]
Bits 6:7 - Wait for response bits
pub fn cmdindex(&self) -> CMDINDEX_R
[src]
Bits 0:5 - Command index
impl R<u32, Reg<u32, _RESPCMD>>
[src]
impl R<u32, Reg<u32, _RESP1>>
[src]
pub fn cardstatus1(&self) -> CARDSTATUS1_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP2>>
[src]
pub fn cardstatus2(&self) -> CARDSTATUS2_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP3>>
[src]
pub fn cardstatus3(&self) -> CARDSTATUS3_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP4>>
[src]
pub fn cardstatus4(&self) -> CARDSTATUS4_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _DTIMER>>
[src]
pub fn datatime(&self) -> DATATIME_R
[src]
Bits 0:31 - Data timeout period
impl R<u32, Reg<u32, _DLEN>>
[src]
pub fn datalength(&self) -> DATALENGTH_R
[src]
Bits 0:24 - Data length value
impl R<u32, Reg<u32, _DCTRL>>
[src]
pub fn sdioen(&self) -> SDIOEN_R
[src]
Bit 11 - SD I/O enable functions
pub fn rwmod(&self) -> RWMOD_R
[src]
Bit 10 - Read wait mode
pub fn rwstop(&self) -> RWSTOP_R
[src]
Bit 9 - Read wait stop
pub fn rwstart(&self) -> RWSTART_R
[src]
Bit 8 - Read wait start
pub fn dblocksize(&self) -> DBLOCKSIZE_R
[src]
Bits 4:7 - Data block size
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 3 - DMA enable bit
pub fn dtmode(&self) -> DTMODE_R
[src]
Bit 2 - Data transfer mode selection 1: Stream or SDIO multibyte data transfer.
pub fn dtdir(&self) -> DTDIR_R
[src]
Bit 1 - Data transfer direction selection
pub fn dten(&self) -> DTEN_R
[src]
Bit 0 - DTEN
impl R<u32, Reg<u32, _DCOUNT>>
[src]
pub fn datacount(&self) -> DATACOUNT_R
[src]
Bits 0:24 - Data count value
impl R<u32, Reg<u32, _STA>>
[src]
pub fn ceataend(&self) -> CEATAEND_R
[src]
Bit 23 - CE-ATA command completion signal received for CMD61
pub fn sdioit(&self) -> SDIOIT_R
[src]
Bit 22 - SDIO interrupt received
pub fn rxdavl(&self) -> RXDAVL_R
[src]
Bit 21 - Data available in receive FIFO
pub fn txdavl(&self) -> TXDAVL_R
[src]
Bit 20 - Data available in transmit FIFO
pub fn rxfifoe(&self) -> RXFIFOE_R
[src]
Bit 19 - Receive FIFO empty
pub fn txfifoe(&self) -> TXFIFOE_R
[src]
Bit 18 - Transmit FIFO empty
pub fn rxfifof(&self) -> RXFIFOF_R
[src]
Bit 17 - Receive FIFO full
pub fn txfifof(&self) -> TXFIFOF_R
[src]
Bit 16 - Transmit FIFO full
pub fn rxfifohf(&self) -> RXFIFOHF_R
[src]
Bit 15 - Receive FIFO half full: there are at least 8 words in the FIFO
pub fn txfifohe(&self) -> TXFIFOHE_R
[src]
Bit 14 - Transmit FIFO half empty: at least 8 words can be written into the FIFO
pub fn rxact(&self) -> RXACT_R
[src]
Bit 13 - Data receive in progress
pub fn txact(&self) -> TXACT_R
[src]
Bit 12 - Data transmit in progress
pub fn cmdact(&self) -> CMDACT_R
[src]
Bit 11 - Command transfer in progress
pub fn dbckend(&self) -> DBCKEND_R
[src]
Bit 10 - Data block sent/received (CRC check passed)
pub fn stbiterr(&self) -> STBITERR_R
[src]
Bit 9 - Start bit not detected on all data signals in wide bus mode
pub fn dataend(&self) -> DATAEND_R
[src]
Bit 8 - Data end (data counter, SDIDCOUNT, is zero)
pub fn cmdsent(&self) -> CMDSENT_R
[src]
Bit 7 - Command sent (no response required)
pub fn cmdrend(&self) -> CMDREND_R
[src]
Bit 6 - Command response received (CRC check passed)
pub fn rxoverr(&self) -> RXOVERR_R
[src]
Bit 5 - Received FIFO overrun error
pub fn txunderr(&self) -> TXUNDERR_R
[src]
Bit 4 - Transmit FIFO underrun error
pub fn dtimeout(&self) -> DTIMEOUT_R
[src]
Bit 3 - Data timeout
pub fn ctimeout(&self) -> CTIMEOUT_R
[src]
Bit 2 - Command response timeout
pub fn dcrcfail(&self) -> DCRCFAIL_R
[src]
Bit 1 - Data block sent/received (CRC check failed)
pub fn ccrcfail(&self) -> CCRCFAIL_R
[src]
Bit 0 - Command response received (CRC check failed)
impl R<u32, Reg<u32, _ICR>>
[src]
pub fn ceataendc(&self) -> CEATAENDC_R
[src]
Bit 23 - CEATAEND flag clear bit
pub fn sdioitc(&self) -> SDIOITC_R
[src]
Bit 22 - SDIOIT flag clear bit
pub fn dbckendc(&self) -> DBCKENDC_R
[src]
Bit 10 - DBCKEND flag clear bit
pub fn stbiterrc(&self) -> STBITERRC_R
[src]
Bit 9 - STBITERR flag clear bit
pub fn dataendc(&self) -> DATAENDC_R
[src]
Bit 8 - DATAEND flag clear bit
pub fn cmdsentc(&self) -> CMDSENTC_R
[src]
Bit 7 - CMDSENT flag clear bit
pub fn cmdrendc(&self) -> CMDRENDC_R
[src]
Bit 6 - CMDREND flag clear bit
pub fn rxoverrc(&self) -> RXOVERRC_R
[src]
Bit 5 - RXOVERR flag clear bit
pub fn txunderrc(&self) -> TXUNDERRC_R
[src]
Bit 4 - TXUNDERR flag clear bit
pub fn dtimeoutc(&self) -> DTIMEOUTC_R
[src]
Bit 3 - DTIMEOUT flag clear bit
pub fn ctimeoutc(&self) -> CTIMEOUTC_R
[src]
Bit 2 - CTIMEOUT flag clear bit
pub fn dcrcfailc(&self) -> DCRCFAILC_R
[src]
Bit 1 - DCRCFAIL flag clear bit
pub fn ccrcfailc(&self) -> CCRCFAILC_R
[src]
Bit 0 - CCRCFAIL flag clear bit
impl R<u32, Reg<u32, _MASK>>
[src]
pub fn ceataendie(&self) -> CEATAENDIE_R
[src]
Bit 23 - CE-ATA command completion signal received interrupt enable
pub fn sdioitie(&self) -> SDIOITIE_R
[src]
Bit 22 - SDIO mode interrupt received interrupt enable
pub fn rxdavlie(&self) -> RXDAVLIE_R
[src]
Bit 21 - Data available in Rx FIFO interrupt enable
pub fn txdavlie(&self) -> TXDAVLIE_R
[src]
Bit 20 - Data available in Tx FIFO interrupt enable
pub fn rxfifoeie(&self) -> RXFIFOEIE_R
[src]
Bit 19 - Rx FIFO empty interrupt enable
pub fn txfifoeie(&self) -> TXFIFOEIE_R
[src]
Bit 18 - Tx FIFO empty interrupt enable
pub fn rxfifofie(&self) -> RXFIFOFIE_R
[src]
Bit 17 - Rx FIFO full interrupt enable
pub fn txfifofie(&self) -> TXFIFOFIE_R
[src]
Bit 16 - Tx FIFO full interrupt enable
pub fn rxfifohfie(&self) -> RXFIFOHFIE_R
[src]
Bit 15 - Rx FIFO half full interrupt enable
pub fn txfifoheie(&self) -> TXFIFOHEIE_R
[src]
Bit 14 - Tx FIFO half empty interrupt enable
pub fn rxactie(&self) -> RXACTIE_R
[src]
Bit 13 - Data receive acting interrupt enable
pub fn txactie(&self) -> TXACTIE_R
[src]
Bit 12 - Data transmit acting interrupt enable
pub fn cmdactie(&self) -> CMDACTIE_R
[src]
Bit 11 - Command acting interrupt enable
pub fn dbckendie(&self) -> DBCKENDIE_R
[src]
Bit 10 - Data block end interrupt enable
pub fn stbiterrie(&self) -> STBITERRIE_R
[src]
Bit 9 - Start bit error interrupt enable
pub fn dataendie(&self) -> DATAENDIE_R
[src]
Bit 8 - Data end interrupt enable
pub fn cmdsentie(&self) -> CMDSENTIE_R
[src]
Bit 7 - Command sent interrupt enable
pub fn cmdrendie(&self) -> CMDRENDIE_R
[src]
Bit 6 - Command response received interrupt enable
pub fn rxoverrie(&self) -> RXOVERRIE_R
[src]
Bit 5 - Rx FIFO overrun error interrupt enable
pub fn txunderrie(&self) -> TXUNDERRIE_R
[src]
Bit 4 - Tx FIFO underrun error interrupt enable
pub fn dtimeoutie(&self) -> DTIMEOUTIE_R
[src]
Bit 3 - Data timeout interrupt enable
pub fn ctimeoutie(&self) -> CTIMEOUTIE_R
[src]
Bit 2 - Command timeout interrupt enable
pub fn dcrcfailie(&self) -> DCRCFAILIE_R
[src]
Bit 1 - Data CRC fail interrupt enable
pub fn ccrcfailie(&self) -> CCRCFAILIE_R
[src]
Bit 0 - Command CRC fail interrupt enable
impl R<u32, Reg<u32, _FIFOCNT>>
[src]
pub fn fifocount(&self) -> FIFOCOUNT_R
[src]
Bits 0:23 - Remaining number of words to be written to or read from the FIFO.
impl R<u32, Reg<u32, _FIFO>>
[src]
pub fn fifodata(&self) -> FIFODATA_R
[src]
Bits 0:31 - Receive and transmit FIFO data
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1IE_A>
[src]
pub fn variant(&self) -> CC1IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1DE_A>
[src]
pub fn variant(&self) -> CC1DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 15:18 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 15:18 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel 1
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel 2
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel 3
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel 4
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, EN1_A>
[src]
pub fn variant(&self) -> EN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFF1_A>
[src]
pub fn variant(&self) -> BOFF1_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, TEN1_A>
[src]
pub fn variant(&self) -> TEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL1_A>
[src]
pub fn variant(&self) -> Variant<u8, TSEL1_A>
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim3_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim15_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM15_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE1_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE1_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAEN1_A>
[src]
pub fn variant(&self) -> DMAEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL2_A>
[src]
pub fn variant(&self) -> TSEL2_A
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim8_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim5_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_tim4_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE2_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE2_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAUDRIE1_A>
[src]
pub fn variant(&self) -> DMAUDRIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en1(&self) -> EN1_R
[src]
Bit 0 - DAC channel1 enable
pub fn boff1(&self) -> BOFF1_R
[src]
Bit 1 - DAC channel1 output buffer disable
pub fn ten1(&self) -> TEN1_R
[src]
Bit 2 - DAC channel1 trigger enable
pub fn tsel1(&self) -> TSEL1_R
[src]
Bits 3:5 - DAC channel1 trigger selection
pub fn wave1(&self) -> WAVE1_R
[src]
Bits 6:7 - DAC channel1 noise/triangle wave generation enable
pub fn mamp1(&self) -> MAMP1_R
[src]
Bits 8:11 - DAC channel1 mask/amplitude selector
pub fn dmaen1(&self) -> DMAEN1_R
[src]
Bit 12 - DAC channel1 DMA enable
pub fn en2(&self) -> EN2_R
[src]
Bit 16 - DAC channel2 enable
pub fn boff2(&self) -> BOFF2_R
[src]
Bit 17 - DAC channel2 output buffer disable
pub fn ten2(&self) -> TEN2_R
[src]
Bit 18 - DAC channel2 trigger enable
pub fn tsel2(&self) -> TSEL2_R
[src]
Bits 19:21 - DAC channel2 trigger selection
pub fn wave2(&self) -> WAVE2_R
[src]
Bits 22:23 - DAC channel2 noise/triangle wave generation enable
pub fn mamp2(&self) -> MAMP2_R
[src]
Bits 24:27 - DAC channel2 mask/amplitude selector
pub fn dmaen2(&self) -> DMAEN2_R
[src]
Bit 28 - DAC channel2 DMA enable
pub fn dmaudrie1(&self) -> DMAUDRIE1_R
[src]
Bit 13 - DAC channel1 DMA underrun interrupt enable
pub fn dmaudrie2(&self) -> DMAUDRIE2_R
[src]
Bit 29 - DAC channel2 DMA underrun interrupt enable
impl R<u32, Reg<u32, _DHR12R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:11 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 4:15 - DAC channel2 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:7 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 16:27 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12LD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 20:31 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR8RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 8:15 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DOR1>>
[src]
pub fn dacc1dor(&self) -> DACC1DOR_R
[src]
Bits 0:11 - DAC channel1 data output
impl R<u32, Reg<u32, _DOR2>>
[src]
pub fn dacc2dor(&self) -> DACC2DOR_R
[src]
Bits 0:11 - DAC channel2 data output
impl R<bool, DMAUDR1_A>
[src]
pub fn variant(&self) -> DMAUDR1_A
[src]
Get enumerated values variant
pub fn is_no_underrun(&self) -> bool
[src]
Checks if the value of the field is NOUNDERRUN
pub fn is_underrun(&self) -> bool
[src]
Checks if the value of the field is UNDERRUN
impl R<u32, Reg<u32, _SR>>
[src]
pub fn dmaudr1(&self) -> DMAUDR1_R
[src]
Bit 13 - DAC channel1 DMA underrun flag
pub fn dmaudr2(&self) -> DMAUDR2_R
[src]
Bit 29 - DAC channel2 DMA underrun flag
impl R<u32, Reg<u32, _TIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
pub fn txrq(&self) -> TXRQ_R
[src]
Bit 0 - TXRQ
impl R<u32, Reg<u32, _TDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn tgt(&self) -> TGT_R
[src]
Bit 8 - TGT
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _TDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _TDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _RIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
impl R<u32, Reg<u32, _RDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn fmi(&self) -> FMI_R
[src]
Bits 8:15 - FMI
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _RDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _RDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _FR1>>
[src]
impl R<u32, Reg<u32, _FR2>>
[src]
impl R<u32, Reg<u32, _MCR>>
[src]
pub fn dbf(&self) -> DBF_R
[src]
Bit 16 - DBF
pub fn reset(&self) -> RESET_R
[src]
Bit 15 - RESET
pub fn ttcm(&self) -> TTCM_R
[src]
Bit 7 - TTCM
pub fn abom(&self) -> ABOM_R
[src]
Bit 6 - ABOM
pub fn awum(&self) -> AWUM_R
[src]
Bit 5 - AWUM
pub fn nart(&self) -> NART_R
[src]
Bit 4 - NART
pub fn rflm(&self) -> RFLM_R
[src]
Bit 3 - RFLM
pub fn txfp(&self) -> TXFP_R
[src]
Bit 2 - TXFP
pub fn sleep(&self) -> SLEEP_R
[src]
Bit 1 - SLEEP
pub fn inrq(&self) -> INRQ_R
[src]
Bit 0 - INRQ
impl R<u32, Reg<u32, _MSR>>
[src]
pub fn rx(&self) -> RX_R
[src]
Bit 11 - RX
pub fn samp(&self) -> SAMP_R
[src]
Bit 10 - SAMP
pub fn rxm(&self) -> RXM_R
[src]
Bit 9 - RXM
pub fn txm(&self) -> TXM_R
[src]
Bit 8 - TXM
pub fn slaki(&self) -> SLAKI_R
[src]
Bit 4 - SLAKI
pub fn wkui(&self) -> WKUI_R
[src]
Bit 3 - WKUI
pub fn erri(&self) -> ERRI_R
[src]
Bit 2 - ERRI
pub fn slak(&self) -> SLAK_R
[src]
Bit 1 - SLAK
pub fn inak(&self) -> INAK_R
[src]
Bit 0 - INAK
impl R<u32, Reg<u32, _TSR>>
[src]
pub fn low2(&self) -> LOW2_R
[src]
Bit 31 - Lowest priority flag for mailbox 2
pub fn low1(&self) -> LOW1_R
[src]
Bit 30 - Lowest priority flag for mailbox 1
pub fn low0(&self) -> LOW0_R
[src]
Bit 29 - Lowest priority flag for mailbox 0
pub fn tme2(&self) -> TME2_R
[src]
Bit 28 - Lowest priority flag for mailbox 2
pub fn tme1(&self) -> TME1_R
[src]
Bit 27 - Lowest priority flag for mailbox 1
pub fn tme0(&self) -> TME0_R
[src]
Bit 26 - Lowest priority flag for mailbox 0
pub fn code(&self) -> CODE_R
[src]
Bits 24:25 - CODE
pub fn abrq2(&self) -> ABRQ2_R
[src]
Bit 23 - ABRQ2
pub fn terr2(&self) -> TERR2_R
[src]
Bit 19 - TERR2
pub fn alst2(&self) -> ALST2_R
[src]
Bit 18 - ALST2
pub fn txok2(&self) -> TXOK2_R
[src]
Bit 17 - TXOK2
pub fn rqcp2(&self) -> RQCP2_R
[src]
Bit 16 - RQCP2
pub fn abrq1(&self) -> ABRQ1_R
[src]
Bit 15 - ABRQ1
pub fn terr1(&self) -> TERR1_R
[src]
Bit 11 - TERR1
pub fn alst1(&self) -> ALST1_R
[src]
Bit 10 - ALST1
pub fn txok1(&self) -> TXOK1_R
[src]
Bit 9 - TXOK1
pub fn rqcp1(&self) -> RQCP1_R
[src]
Bit 8 - RQCP1
pub fn abrq0(&self) -> ABRQ0_R
[src]
Bit 7 - ABRQ0
pub fn terr0(&self) -> TERR0_R
[src]
Bit 3 - TERR0
pub fn alst0(&self) -> ALST0_R
[src]
Bit 2 - ALST0
pub fn txok0(&self) -> TXOK0_R
[src]
Bit 1 - TXOK0
pub fn rqcp0(&self) -> RQCP0_R
[src]
Bit 0 - RQCP0
impl R<u32, Reg<u32, _RFR>>
[src]
pub fn rfom(&self) -> RFOM_R
[src]
Bit 5 - RFOM0
pub fn fovr(&self) -> FOVR_R
[src]
Bit 4 - FOVR0
pub fn full(&self) -> FULL_R
[src]
Bit 3 - FULL0
pub fn fmp(&self) -> FMP_R
[src]
Bits 0:1 - FMP0
impl R<u32, Reg<u32, _IER>>
[src]
pub fn slkie(&self) -> SLKIE_R
[src]
Bit 17 - SLKIE
pub fn wkuie(&self) -> WKUIE_R
[src]
Bit 16 - WKUIE
pub fn errie(&self) -> ERRIE_R
[src]
Bit 15 - ERRIE
pub fn lecie(&self) -> LECIE_R
[src]
Bit 11 - LECIE
pub fn bofie(&self) -> BOFIE_R
[src]
Bit 10 - BOFIE
pub fn epvie(&self) -> EPVIE_R
[src]
Bit 9 - EPVIE
pub fn ewgie(&self) -> EWGIE_R
[src]
Bit 8 - EWGIE
pub fn fovie1(&self) -> FOVIE1_R
[src]
Bit 6 - FOVIE1
pub fn ffie1(&self) -> FFIE1_R
[src]
Bit 5 - FFIE1
pub fn fmpie1(&self) -> FMPIE1_R
[src]
Bit 4 - FMPIE1
pub fn fovie0(&self) -> FOVIE0_R
[src]
Bit 3 - FOVIE0
pub fn ffie0(&self) -> FFIE0_R
[src]
Bit 2 - FFIE0
pub fn fmpie0(&self) -> FMPIE0_R
[src]
Bit 1 - FMPIE0
pub fn tmeie(&self) -> TMEIE_R
[src]
Bit 0 - TMEIE
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn rec(&self) -> REC_R
[src]
Bits 24:31 - REC
pub fn tec(&self) -> TEC_R
[src]
Bits 16:23 - TEC
pub fn lec(&self) -> LEC_R
[src]
Bits 4:6 - LEC
pub fn boff(&self) -> BOFF_R
[src]
Bit 2 - BOFF
pub fn epvf(&self) -> EPVF_R
[src]
Bit 1 - EPVF
pub fn ewgf(&self) -> EWGF_R
[src]
Bit 0 - EWGF
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn silm(&self) -> SILM_R
[src]
Bit 31 - SILM
pub fn lbkm(&self) -> LBKM_R
[src]
Bit 30 - LBKM
pub fn sjw(&self) -> SJW_R
[src]
Bits 24:25 - SJW
pub fn ts2(&self) -> TS2_R
[src]
Bits 20:22 - TS2
pub fn ts1(&self) -> TS1_R
[src]
Bits 16:19 - TS1
pub fn brp(&self) -> BRP_R
[src]
Bits 0:9 - BRP
impl R<u32, Reg<u32, _FMR>>
[src]
impl R<u32, Reg<u32, _FM1R>>
[src]
pub fn fbm0(&self) -> FBM0_R
[src]
Bit 0 - Filter mode
pub fn fbm1(&self) -> FBM1_R
[src]
Bit 1 - Filter mode
pub fn fbm2(&self) -> FBM2_R
[src]
Bit 2 - Filter mode
pub fn fbm3(&self) -> FBM3_R
[src]
Bit 3 - Filter mode
pub fn fbm4(&self) -> FBM4_R
[src]
Bit 4 - Filter mode
pub fn fbm5(&self) -> FBM5_R
[src]
Bit 5 - Filter mode
pub fn fbm6(&self) -> FBM6_R
[src]
Bit 6 - Filter mode
pub fn fbm7(&self) -> FBM7_R
[src]
Bit 7 - Filter mode
pub fn fbm8(&self) -> FBM8_R
[src]
Bit 8 - Filter mode
pub fn fbm9(&self) -> FBM9_R
[src]
Bit 9 - Filter mode
pub fn fbm10(&self) -> FBM10_R
[src]
Bit 10 - Filter mode
pub fn fbm11(&self) -> FBM11_R
[src]
Bit 11 - Filter mode
pub fn fbm12(&self) -> FBM12_R
[src]
Bit 12 - Filter mode
pub fn fbm13(&self) -> FBM13_R
[src]
Bit 13 - Filter mode
impl R<u32, Reg<u32, _FS1R>>
[src]
pub fn fsc0(&self) -> FSC0_R
[src]
Bit 0 - Filter scale configuration
pub fn fsc1(&self) -> FSC1_R
[src]
Bit 1 - Filter scale configuration
pub fn fsc2(&self) -> FSC2_R
[src]
Bit 2 - Filter scale configuration
pub fn fsc3(&self) -> FSC3_R
[src]
Bit 3 - Filter scale configuration
pub fn fsc4(&self) -> FSC4_R
[src]
Bit 4 - Filter scale configuration
pub fn fsc5(&self) -> FSC5_R
[src]
Bit 5 - Filter scale configuration
pub fn fsc6(&self) -> FSC6_R
[src]
Bit 6 - Filter scale configuration
pub fn fsc7(&self) -> FSC7_R
[src]
Bit 7 - Filter scale configuration
pub fn fsc8(&self) -> FSC8_R
[src]
Bit 8 - Filter scale configuration
pub fn fsc9(&self) -> FSC9_R
[src]
Bit 9 - Filter scale configuration
pub fn fsc10(&self) -> FSC10_R
[src]
Bit 10 - Filter scale configuration
pub fn fsc11(&self) -> FSC11_R
[src]
Bit 11 - Filter scale configuration
pub fn fsc12(&self) -> FSC12_R
[src]
Bit 12 - Filter scale configuration
pub fn fsc13(&self) -> FSC13_R
[src]
Bit 13 - Filter scale configuration
impl R<u32, Reg<u32, _FFA1R>>
[src]
pub fn ffa0(&self) -> FFA0_R
[src]
Bit 0 - Filter FIFO assignment for filter 0
pub fn ffa1(&self) -> FFA1_R
[src]
Bit 1 - Filter FIFO assignment for filter 1
pub fn ffa2(&self) -> FFA2_R
[src]
Bit 2 - Filter FIFO assignment for filter 2
pub fn ffa3(&self) -> FFA3_R
[src]
Bit 3 - Filter FIFO assignment for filter 3
pub fn ffa4(&self) -> FFA4_R
[src]
Bit 4 - Filter FIFO assignment for filter 4
pub fn ffa5(&self) -> FFA5_R
[src]
Bit 5 - Filter FIFO assignment for filter 5
pub fn ffa6(&self) -> FFA6_R
[src]
Bit 6 - Filter FIFO assignment for filter 6
pub fn ffa7(&self) -> FFA7_R
[src]
Bit 7 - Filter FIFO assignment for filter 7
pub fn ffa8(&self) -> FFA8_R
[src]
Bit 8 - Filter FIFO assignment for filter 8
pub fn ffa9(&self) -> FFA9_R
[src]
Bit 9 - Filter FIFO assignment for filter 9
pub fn ffa10(&self) -> FFA10_R
[src]
Bit 10 - Filter FIFO assignment for filter 10
pub fn ffa11(&self) -> FFA11_R
[src]
Bit 11 - Filter FIFO assignment for filter 11
pub fn ffa12(&self) -> FFA12_R
[src]
Bit 12 - Filter FIFO assignment for filter 12
pub fn ffa13(&self) -> FFA13_R
[src]
Bit 13 - Filter FIFO assignment for filter 13
impl R<u32, Reg<u32, _FA1R>>
[src]
pub fn fact0(&self) -> FACT0_R
[src]
Bit 0 - Filter active
pub fn fact1(&self) -> FACT1_R
[src]
Bit 1 - Filter active
pub fn fact2(&self) -> FACT2_R
[src]
Bit 2 - Filter active
pub fn fact3(&self) -> FACT3_R
[src]
Bit 3 - Filter active
pub fn fact4(&self) -> FACT4_R
[src]
Bit 4 - Filter active
pub fn fact5(&self) -> FACT5_R
[src]
Bit 5 - Filter active
pub fn fact6(&self) -> FACT6_R
[src]
Bit 6 - Filter active
pub fn fact7(&self) -> FACT7_R
[src]
Bit 7 - Filter active
pub fn fact8(&self) -> FACT8_R
[src]
Bit 8 - Filter active
pub fn fact9(&self) -> FACT9_R
[src]
Bit 9 - Filter active
pub fn fact10(&self) -> FACT10_R
[src]
Bit 10 - Filter active
pub fn fact11(&self) -> FACT11_R
[src]
Bit 11 - Filter active
pub fn fact12(&self) -> FACT12_R
[src]
Bit 12 - Filter active
pub fn fact13(&self) -> FACT13_R
[src]
Bit 13 - Filter active
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP0R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP1R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP2R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP3R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP4R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP5R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP6R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP7R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<bool, FRES_A>
[src]
pub fn variant(&self) -> FRES_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, PDWN_A>
[src]
pub fn variant(&self) -> PDWN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LPMODE_A>
[src]
pub fn variant(&self) -> LPMODE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FSUSP_A>
[src]
pub fn variant(&self) -> FSUSP_A
[src]
Get enumerated values variant
pub fn is_no_effect(&self) -> bool
[src]
Checks if the value of the field is NOEFFECT
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, RESUME_A>
[src]
pub fn variant(&self) -> Variant<bool, RESUME_A>
[src]
Get enumerated values variant
pub fn is_requested(&self) -> bool
[src]
Checks if the value of the field is REQUESTED
impl R<bool, ESOFM_A>
[src]
pub fn variant(&self) -> ESOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SOFM_A>
[src]
pub fn variant(&self) -> SOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RESETM_A>
[src]
pub fn variant(&self) -> RESETM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SUSPM_A>
[src]
pub fn variant(&self) -> SUSPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUPM_A>
[src]
pub fn variant(&self) -> WKUPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRM_A>
[src]
pub fn variant(&self) -> ERRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PMAOVRM_A>
[src]
pub fn variant(&self) -> PMAOVRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTRM_A>
[src]
pub fn variant(&self) -> CTRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CNTR>>
[src]
pub fn fres(&self) -> FRES_R
[src]
Bit 0 - Force USB Reset
pub fn pdwn(&self) -> PDWN_R
[src]
Bit 1 - Power down
pub fn lpmode(&self) -> LPMODE_R
[src]
Bit 2 - Low-power mode
pub fn fsusp(&self) -> FSUSP_R
[src]
Bit 3 - Force suspend
pub fn resume(&self) -> RESUME_R
[src]
Bit 4 - Resume request
pub fn esofm(&self) -> ESOFM_R
[src]
Bit 8 - Expected start of frame interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 9 - Start of frame interrupt mask
pub fn resetm(&self) -> RESETM_R
[src]
Bit 10 - USB reset interrupt mask
pub fn suspm(&self) -> SUSPM_R
[src]
Bit 11 - Suspend mode interrupt mask
pub fn wkupm(&self) -> WKUPM_R
[src]
Bit 12 - Wakeup interrupt mask
pub fn errm(&self) -> ERRM_R
[src]
Bit 13 - Error interrupt mask
pub fn pmaovrm(&self) -> PMAOVRM_R
[src]
Bit 14 - Packet memory area over / underrun interrupt mask
pub fn ctrm(&self) -> CTRM_R
[src]
Bit 15 - Correct transfer interrupt mask
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_to(&self) -> bool
[src]
Checks if the value of the field is TO
pub fn is_from(&self) -> bool
[src]
Checks if the value of the field is FROM
impl R<bool, ESOF_A>
[src]
pub fn variant(&self) -> Variant<bool, ESOF_A>
[src]
Get enumerated values variant
pub fn is_expected_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is EXPECTEDSTARTOFFRAME
impl R<bool, SOF_A>
[src]
pub fn variant(&self) -> Variant<bool, SOF_A>
[src]
Get enumerated values variant
pub fn is_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is STARTOFFRAME
impl R<bool, RESET_A>
[src]
pub fn variant(&self) -> Variant<bool, RESET_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, SUSP_A>
[src]
pub fn variant(&self) -> Variant<bool, SUSP_A>
[src]
Get enumerated values variant
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, WKUP_A>
[src]
pub fn variant(&self) -> Variant<bool, WKUP_A>
[src]
Get enumerated values variant
pub fn is_wakeup(&self) -> bool
[src]
Checks if the value of the field is WAKEUP
impl R<bool, ERR_A>
[src]
pub fn variant(&self) -> Variant<bool, ERR_A>
[src]
Get enumerated values variant
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, PMAOVR_A>
[src]
pub fn variant(&self) -> Variant<bool, PMAOVR_A>
[src]
Get enumerated values variant
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, CTR_A>
[src]
pub fn variant(&self) -> Variant<bool, CTR_A>
[src]
Get enumerated values variant
pub fn is_completed(&self) -> bool
[src]
Checks if the value of the field is COMPLETED
impl R<u32, Reg<u32, _ISTR>>
[src]
pub fn ep_id(&self) -> EP_ID_R
[src]
Bits 0:3 - Endpoint Identifier
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction of transaction
pub fn esof(&self) -> ESOF_R
[src]
Bit 8 - Expected start frame
pub fn sof(&self) -> SOF_R
[src]
Bit 9 - start of frame
pub fn reset(&self) -> RESET_R
[src]
Bit 10 - reset request
pub fn susp(&self) -> SUSP_R
[src]
Bit 11 - Suspend mode request
pub fn wkup(&self) -> WKUP_R
[src]
Bit 12 - Wakeup
pub fn err(&self) -> ERR_R
[src]
Bit 13 - Error
pub fn pmaovr(&self) -> PMAOVR_R
[src]
Bit 14 - Packet memory area over / underrun
pub fn ctr(&self) -> CTR_R
[src]
Bit 15 - Correct transfer
impl R<bool, LCK_A>
[src]
pub fn variant(&self) -> Variant<bool, LCK_A>
[src]
Get enumerated values variant
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, RXDM_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDM_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<bool, RXDP_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDP_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<u32, Reg<u32, _FNR>>
[src]
pub fn fn_(&self) -> FN_R
[src]
Bits 0:10 - Frame number
pub fn lsof(&self) -> LSOF_R
[src]
Bits 11:12 - Lost SOF
pub fn lck(&self) -> LCK_R
[src]
Bit 13 - Locked
pub fn rxdm(&self) -> RXDM_R
[src]
Bit 14 - Receive data - line status
pub fn rxdp(&self) -> RXDP_R
[src]
Bit 15 - Receive data + line status
impl R<bool, EF_A>
[src]
pub fn variant(&self) -> EF_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DADDR>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:6 - Device address
pub fn ef(&self) -> EF_R
[src]
Bit 7 - Enable function
impl R<u32, Reg<u32, _BTABLE>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - DIV_Fraction
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - DIV_Mantissa
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> Variant<u8, STOP_A>
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
pub fn occs(&self) -> OCCS_R
[src]
Bit 3 - OCREF clear selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> Variant<u8, MMS_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _ACTRL>>
[src]
pub fn disfold(&self) -> DISFOLD_R
[src]
Bit 2 - DISFOLD
pub fn fpexcodis(&self) -> FPEXCODIS_R
[src]
Bit 10 - FPEXCODIS
pub fn disramode(&self) -> DISRAMODE_R
[src]
Bit 11 - DISRAMODE
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R
[src]
Bit 12 - DISITMATBFLUSH
impl R<u32, Reg<u32, _STIR>>
[src]
impl R<u32, Reg<u32, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 0 - Counter enable
pub fn tickint(&self) -> TICKINT_R
[src]
Bit 1 - SysTick exception request enable
pub fn clksource(&self) -> CLKSOURCE_R
[src]
Bit 2 - Clock source selection
pub fn countflag(&self) -> COUNTFLAG_R
[src]
Bit 16 - COUNTFLAG
impl R<u32, Reg<u32, _LOAD_>>
[src]
impl R<u32, Reg<u32, _VAL>>
[src]
impl R<u32, Reg<u32, _CALIB>>
[src]
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim3cc1(&self) -> bool
[src]
Checks if the value of the field is TIM3CC1
pub fn is_tim2cc3(&self) -> bool
[src]
Checks if the value of the field is TIM2CC3
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim8cc1(&self) -> bool
[src]
Checks if the value of the field is TIM8CC1
pub fn is_tim8trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8TRGO
pub fn is_tim5cc1(&self) -> bool
[src]
Checks if the value of the field is TIM5CC1
pub fn is_tim5cc3(&self) -> bool
[src]
Checks if the value of the field is TIM5CC3
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim4cc3(&self) -> bool
[src]
Checks if the value of the field is TIM4CC3
pub fn is_tim8cc2(&self) -> bool
[src]
Checks if the value of the field is TIM8CC2
pub fn is_tim8cc4(&self) -> bool
[src]
Checks if the value of the field is TIM8CC4
pub fn is_tim5trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5TRGO
pub fn is_tim5cc4(&self) -> bool
[src]
Checks if the value of the field is TIM5CC4
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel 1
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel 2
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel 3
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel 4
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR1>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<bool, CBURSTRW_A>
[src]
pub fn variant(&self) -> CBURSTRW_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ASYNCWAIT_A>
[src]
pub fn variant(&self) -> ASYNCWAIT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EXTMOD_A>
[src]
pub fn variant(&self) -> EXTMOD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITEN_A>
[src]
pub fn variant(&self) -> WAITEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WREN_A>
[src]
pub fn variant(&self) -> WREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAITCFG_A>
[src]
pub fn variant(&self) -> WAITCFG_A
[src]
Get enumerated values variant
pub fn is_before_wait_state(&self) -> bool
[src]
Checks if the value of the field is BEFOREWAITSTATE
pub fn is_during_wait_state(&self) -> bool
[src]
Checks if the value of the field is DURINGWAITSTATE
impl R<bool, WAITPOL_A>
[src]
pub fn variant(&self) -> WAITPOL_A
[src]
Get enumerated values variant
pub fn is_active_low(&self) -> bool
[src]
Checks if the value of the field is ACTIVELOW
pub fn is_active_high(&self) -> bool
[src]
Checks if the value of the field is ACTIVEHIGH
impl R<bool, BURSTEN_A>
[src]
pub fn variant(&self) -> BURSTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FACCEN_A>
[src]
pub fn variant(&self) -> FACCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, MWID_A>
[src]
pub fn variant(&self) -> Variant<u8, MWID_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, MTYP_A>
[src]
pub fn variant(&self) -> Variant<u8, MTYP_A>
[src]
Get enumerated values variant
pub fn is_sram(&self) -> bool
[src]
Checks if the value of the field is SRAM
pub fn is_psram(&self) -> bool
[src]
Checks if the value of the field is PSRAM
pub fn is_flash(&self) -> bool
[src]
Checks if the value of the field is FLASH
impl R<bool, MUXEN_A>
[src]
pub fn variant(&self) -> MUXEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MBKEN_A>
[src]
pub fn variant(&self) -> MBKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CPSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CPSIZE_A>
[src]
Get enumerated values variant
pub fn is_no_burst_split(&self) -> bool
[src]
Checks if the value of the field is NOBURSTSPLIT
pub fn is_bytes128(&self) -> bool
[src]
Checks if the value of the field is BYTES128
pub fn is_bytes256(&self) -> bool
[src]
Checks if the value of the field is BYTES256
pub fn is_bytes512(&self) -> bool
[src]
Checks if the value of the field is BYTES512
pub fn is_bytes1024(&self) -> bool
[src]
Checks if the value of the field is BYTES1024
impl R<u32, Reg<u32, _BCR>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
pub fn cpsize(&self) -> CPSIZE_R
[src]
Bits 16:18 - CRAM page size
impl R<u32, Reg<u32, _PCR2>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM2>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT2>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - Attribute memory x databus HiZ time
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - Attribute memory x hold time
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - Attribute memory x wait time
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - Attribute memory x setup time
impl R<u32, Reg<u32, _ECCR2>>
[src]
impl R<u32, Reg<u32, _PCR3>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR3>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM3>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT3>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _ECCR3>>
[src]
impl R<u32, Reg<u32, _PCR4>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR4>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM4>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT4>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _PIO4>>
[src]
pub fn iohizx(&self) -> IOHIZX_R
[src]
Bits 24:31 - IOHIZx
pub fn ioholdx(&self) -> IOHOLDX_R
[src]
Bits 16:23 - IOHOLDx
pub fn iowaitx(&self) -> IOWAITX_R
[src]
Bits 8:15 - IOWAITx
pub fn iosetx(&self) -> IOSETX_R
[src]
Bits 0:7 - IOSETx
impl R<u8, ACCMOD_A>
[src]
pub fn variant(&self) -> ACCMOD_A
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
impl R<u32, Reg<u32, _BWTR>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - Bus turnaround phase duration
impl R<bool, PDDS_A>
[src]
pub fn variant(&self) -> PDDS_A
[src]
Get enumerated values variant
pub fn is_stop_mode(&self) -> bool
[src]
Checks if the value of the field is STOP_MODE
pub fn is_standby_mode(&self) -> bool
[src]
Checks if the value of the field is STANDBY_MODE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn lpds(&self) -> LPDS_R
[src]
Bit 0 - Low Power Deep Sleep
pub fn pdds(&self) -> PDDS_R
[src]
Bit 1 - Power Down Deep Sleep
pub fn cwuf(&self) -> CWUF_R
[src]
Bit 2 - Clear Wake-up Flag
pub fn csbf(&self) -> CSBF_R
[src]
Bit 3 - Clear STANDBY Flag
pub fn pvde(&self) -> PVDE_R
[src]
Bit 4 - Power Voltage Detector Enable
pub fn pls(&self) -> PLS_R
[src]
Bits 5:7 - PVD Level Selection
pub fn dbp(&self) -> DBP_R
[src]
Bit 8 - Disable Backup Domain write protection
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn wuf(&self) -> WUF_R
[src]
Bit 0 - Wake-Up Flag
pub fn sbf(&self) -> SBF_R
[src]
Bit 1 - STANDBY Flag
pub fn pvdo(&self) -> PVDO_R
[src]
Bit 2 - PVD Output
pub fn ewup(&self) -> EWUP_R
[src]
Bit 8 - Enable WKUP pin
impl R<bool, HSION_A>
[src]
pub fn variant(&self) -> HSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, HSIRDY_A>
[src]
pub fn variant(&self) -> HSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, HSEBYP_A>
[src]
pub fn variant(&self) -> HSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<bool, CSSON_A>
[src]
pub fn variant(&self) -> CSSON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<u32, Reg<u32, _CR>>
[src]
pub fn hsion(&self) -> HSION_R
[src]
Bit 0 - Internal High Speed clock enable
pub fn hsirdy(&self) -> HSIRDY_R
[src]
Bit 1 - Internal High Speed clock ready flag
pub fn hsitrim(&self) -> HSITRIM_R
[src]
Bits 3:7 - Internal High Speed clock trimming
pub fn hsical(&self) -> HSICAL_R
[src]
Bits 8:15 - Internal High Speed clock Calibration
pub fn hseon(&self) -> HSEON_R
[src]
Bit 16 - External High Speed clock enable
pub fn hserdy(&self) -> HSERDY_R
[src]
Bit 17 - External High Speed clock ready flag
pub fn hsebyp(&self) -> HSEBYP_R
[src]
Bit 18 - External High Speed clock Bypass
pub fn csson(&self) -> CSSON_R
[src]
Bit 19 - Clock Security System enable
pub fn pllon(&self) -> PLLON_R
[src]
Bit 24 - PLL enable
pub fn pllrdy(&self) -> PLLRDY_R
[src]
Bit 25 - PLL clock ready flag
impl R<u8, SW_A>
[src]
pub fn variant(&self) -> Variant<u8, SW_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, SWS_A>
[src]
pub fn variant(&self) -> Variant<u8, SWS_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, HPRE_A>
[src]
pub fn variant(&self) -> Variant<u8, HPRE_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
impl R<u8, PPRE1_A>
[src]
pub fn variant(&self) -> Variant<u8, PPRE1_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPRE_A>
[src]
pub fn variant(&self) -> ADCPRE_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSRC_A>
[src]
pub fn variant(&self) -> PLLSRC_A
[src]
Get enumerated values variant
pub fn is_hsi_div2(&self) -> bool
[src]
Checks if the value of the field is HSI_DIV2
pub fn is_hse_div_prediv(&self) -> bool
[src]
Checks if the value of the field is HSE_DIV_PREDIV
impl R<bool, PLLXTPRE_A>
[src]
pub fn variant(&self) -> PLLXTPRE_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMUL_A>
[src]
pub fn variant(&self) -> PLLMUL_A
[src]
Get enumerated values variant
pub fn is_mul2(&self) -> bool
[src]
Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool
[src]
Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool
[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool
[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool
[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool
[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool
[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool
[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool
[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool
[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool
[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool
[src]
Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool
[src]
Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool
[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool
[src]
Checks if the value of the field is MUL16X
impl R<bool, USBPRE_A>
[src]
pub fn variant(&self) -> USBPRE_A
[src]
Get enumerated values variant
pub fn is_div1_5(&self) -> bool
[src]
Checks if the value of the field is DIV1_5
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
impl R<u8, MCO_A>
[src]
pub fn variant(&self) -> Variant<u8, MCO_A>
[src]
Get enumerated values variant
pub fn is_no_mco(&self) -> bool
[src]
Checks if the value of the field is NOMCO
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn sw(&self) -> SW_R
[src]
Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
[src]
Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
[src]
Bits 4:7 - AHB prescaler
pub fn ppre1(&self) -> PPRE1_R
[src]
Bits 8:10 - APB Low speed prescaler (APB1)
pub fn ppre2(&self) -> PPRE2_R
[src]
Bits 11:13 - APB High speed prescaler (APB2)
pub fn adcpre(&self) -> ADCPRE_R
[src]
Bits 14:15 - ADC prescaler
pub fn pllsrc(&self) -> PLLSRC_R
[src]
Bit 16 - PLL entry clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
[src]
Bit 17 - HSE divider for PLL entry
pub fn pllmul(&self) -> PLLMUL_R
[src]
Bits 18:21 - PLL Multiplication Factor
pub fn usbpre(&self) -> USBPRE_R
[src]
Bit 22 - USB prescaler
pub fn mco(&self) -> MCO_R
[src]
Bits 24:26 - Microcontroller clock output
impl R<bool, LSIRDYF_A>
[src]
pub fn variant(&self) -> LSIRDYF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CSSF_A>
[src]
pub fn variant(&self) -> CSSF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LSIRDYIE_A>
[src]
pub fn variant(&self) -> LSIRDYIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CIR>>
[src]
pub fn lsirdyf(&self) -> LSIRDYF_R
[src]
Bit 0 - LSI Ready Interrupt flag
pub fn lserdyf(&self) -> LSERDYF_R
[src]
Bit 1 - LSE Ready Interrupt flag
pub fn hsirdyf(&self) -> HSIRDYF_R
[src]
Bit 2 - HSI Ready Interrupt flag
pub fn hserdyf(&self) -> HSERDYF_R
[src]
Bit 3 - HSE Ready Interrupt flag
pub fn pllrdyf(&self) -> PLLRDYF_R
[src]
Bit 4 - PLL Ready Interrupt flag
pub fn cssf(&self) -> CSSF_R
[src]
Bit 7 - Clock Security System Interrupt flag
pub fn lsirdyie(&self) -> LSIRDYIE_R
[src]
Bit 8 - LSI Ready Interrupt Enable
pub fn lserdyie(&self) -> LSERDYIE_R
[src]
Bit 9 - LSE Ready Interrupt Enable
pub fn hsirdyie(&self) -> HSIRDYIE_R
[src]
Bit 10 - HSI Ready Interrupt Enable
pub fn hserdyie(&self) -> HSERDYIE_R
[src]
Bit 11 - HSE Ready Interrupt Enable
pub fn pllrdyie(&self) -> PLLRDYIE_R
[src]
Bit 12 - PLL Ready Interrupt Enable
impl R<bool, AFIORST_A>
[src]
pub fn variant(&self) -> Variant<bool, AFIORST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RSTR>>
[src]
pub fn afiorst(&self) -> AFIORST_R
[src]
Bit 0 - Alternate function I/O reset
pub fn ioparst(&self) -> IOPARST_R
[src]
Bit 2 - IO port A reset
pub fn iopbrst(&self) -> IOPBRST_R
[src]
Bit 3 - IO port B reset
pub fn iopcrst(&self) -> IOPCRST_R
[src]
Bit 4 - IO port C reset
pub fn iopdrst(&self) -> IOPDRST_R
[src]
Bit 5 - IO port D reset
pub fn ioperst(&self) -> IOPERST_R
[src]
Bit 6 - IO port E reset
pub fn iopfrst(&self) -> IOPFRST_R
[src]
Bit 7 - IO port F reset
pub fn iopgrst(&self) -> IOPGRST_R
[src]
Bit 8 - IO port G reset
pub fn adc1rst(&self) -> ADC1RST_R
[src]
Bit 9 - ADC 1 interface reset
pub fn adc2rst(&self) -> ADC2RST_R
[src]
Bit 10 - ADC 2 interface reset
pub fn tim1rst(&self) -> TIM1RST_R
[src]
Bit 11 - TIM1 timer reset
pub fn spi1rst(&self) -> SPI1RST_R
[src]
Bit 12 - SPI 1 reset
pub fn tim8rst(&self) -> TIM8RST_R
[src]
Bit 13 - TIM8 timer reset
pub fn usart1rst(&self) -> USART1RST_R
[src]
Bit 14 - USART1 reset
pub fn adc3rst(&self) -> ADC3RST_R
[src]
Bit 15 - ADC 3 interface reset
pub fn tim9rst(&self) -> TIM9RST_R
[src]
Bit 19 - TIM9 timer reset
pub fn tim10rst(&self) -> TIM10RST_R
[src]
Bit 20 - TIM10 timer reset
pub fn tim11rst(&self) -> TIM11RST_R
[src]
Bit 21 - TIM11 timer reset
impl R<bool, TIM2RST_A>
[src]
pub fn variant(&self) -> Variant<bool, TIM2RST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RSTR>>
[src]
pub fn tim2rst(&self) -> TIM2RST_R
[src]
Bit 0 - Timer 2 reset
pub fn tim3rst(&self) -> TIM3RST_R
[src]
Bit 1 - Timer 3 reset
pub fn tim4rst(&self) -> TIM4RST_R
[src]
Bit 2 - Timer 4 reset
pub fn tim5rst(&self) -> TIM5RST_R
[src]
Bit 3 - Timer 5 reset
pub fn tim6rst(&self) -> TIM6RST_R
[src]
Bit 4 - Timer 6 reset
pub fn tim7rst(&self) -> TIM7RST_R
[src]
Bit 5 - Timer 7 reset
pub fn tim12rst(&self) -> TIM12RST_R
[src]
Bit 6 - Timer 12 reset
pub fn tim13rst(&self) -> TIM13RST_R
[src]
Bit 7 - Timer 13 reset
pub fn tim14rst(&self) -> TIM14RST_R
[src]
Bit 8 - Timer 14 reset
pub fn wwdgrst(&self) -> WWDGRST_R
[src]
Bit 11 - Window watchdog reset
pub fn spi2rst(&self) -> SPI2RST_R
[src]
Bit 14 - SPI2 reset
pub fn spi3rst(&self) -> SPI3RST_R
[src]
Bit 15 - SPI3 reset
pub fn usart2rst(&self) -> USART2RST_R
[src]
Bit 17 - USART 2 reset
pub fn usart3rst(&self) -> USART3RST_R
[src]
Bit 18 - USART 3 reset
pub fn uart4rst(&self) -> UART4RST_R
[src]
Bit 19 - UART 4 reset
pub fn uart5rst(&self) -> UART5RST_R
[src]
Bit 20 - UART 5 reset
pub fn i2c1rst(&self) -> I2C1RST_R
[src]
Bit 21 - I2C1 reset
pub fn i2c2rst(&self) -> I2C2RST_R
[src]
Bit 22 - I2C2 reset
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 23 - USB reset
pub fn canrst(&self) -> CANRST_R
[src]
Bit 25 - CAN reset
pub fn bkprst(&self) -> BKPRST_R
[src]
Bit 27 - Backup interface reset
pub fn pwrrst(&self) -> PWRRST_R
[src]
Bit 28 - Power interface reset
pub fn dacrst(&self) -> DACRST_R
[src]
Bit 29 - DAC interface reset
impl R<bool, DMA1EN_A>
[src]
pub fn variant(&self) -> DMA1EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBENR>>
[src]
pub fn dma1en(&self) -> DMA1EN_R
[src]
Bit 0 - DMA1 clock enable
pub fn dma2en(&self) -> DMA2EN_R
[src]
Bit 1 - DMA2 clock enable
pub fn sramen(&self) -> SRAMEN_R
[src]
Bit 2 - SRAM interface clock enable
pub fn flitfen(&self) -> FLITFEN_R
[src]
Bit 4 - FLITF clock enable
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 6 - CRC clock enable
pub fn fsmcen(&self) -> FSMCEN_R
[src]
Bit 8 - FSMC clock enable
pub fn sdioen(&self) -> SDIOEN_R
[src]
Bit 10 - SDIO clock enable
impl R<bool, AFIOEN_A>
[src]
pub fn variant(&self) -> AFIOEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2ENR>>
[src]
pub fn afioen(&self) -> AFIOEN_R
[src]
Bit 0 - Alternate function I/O clock enable
pub fn iopaen(&self) -> IOPAEN_R
[src]
Bit 2 - I/O port A clock enable
pub fn iopben(&self) -> IOPBEN_R
[src]
Bit 3 - I/O port B clock enable
pub fn iopcen(&self) -> IOPCEN_R
[src]
Bit 4 - I/O port C clock enable
pub fn iopden(&self) -> IOPDEN_R
[src]
Bit 5 - I/O port D clock enable
pub fn iopeen(&self) -> IOPEEN_R
[src]
Bit 6 - I/O port E clock enable
pub fn iopfen(&self) -> IOPFEN_R
[src]
Bit 7 - I/O port F clock enable
pub fn iopgen(&self) -> IOPGEN_R
[src]
Bit 8 - I/O port G clock enable
pub fn adc1en(&self) -> ADC1EN_R
[src]
Bit 9 - ADC 1 interface clock enable
pub fn adc2en(&self) -> ADC2EN_R
[src]
Bit 10 - ADC 2 interface clock enable
pub fn tim1en(&self) -> TIM1EN_R
[src]
Bit 11 - TIM1 Timer clock enable
pub fn spi1en(&self) -> SPI1EN_R
[src]
Bit 12 - SPI 1 clock enable
pub fn tim8en(&self) -> TIM8EN_R
[src]
Bit 13 - TIM8 Timer clock enable
pub fn usart1en(&self) -> USART1EN_R
[src]
Bit 14 - USART1 clock enable
pub fn adc3en(&self) -> ADC3EN_R
[src]
Bit 15 - ADC3 interface clock enable
pub fn tim9en(&self) -> TIM9EN_R
[src]
Bit 19 - TIM9 Timer clock enable
pub fn tim10en(&self) -> TIM10EN_R
[src]
Bit 20 - TIM10 Timer clock enable
pub fn tim11en(&self) -> TIM11EN_R
[src]
Bit 21 - TIM11 Timer clock enable
impl R<bool, TIM2EN_A>
[src]
pub fn variant(&self) -> TIM2EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1ENR>>
[src]
pub fn tim2en(&self) -> TIM2EN_R
[src]
Bit 0 - Timer 2 clock enable
pub fn tim3en(&self) -> TIM3EN_R
[src]
Bit 1 - Timer 3 clock enable
pub fn tim4en(&self) -> TIM4EN_R
[src]
Bit 2 - Timer 4 clock enable
pub fn tim5en(&self) -> TIM5EN_R
[src]
Bit 3 - Timer 5 clock enable
pub fn tim6en(&self) -> TIM6EN_R
[src]
Bit 4 - Timer 6 clock enable
pub fn tim7en(&self) -> TIM7EN_R
[src]
Bit 5 - Timer 7 clock enable
pub fn tim12en(&self) -> TIM12EN_R
[src]
Bit 6 - Timer 12 clock enable
pub fn tim13en(&self) -> TIM13EN_R
[src]
Bit 7 - Timer 13 clock enable
pub fn tim14en(&self) -> TIM14EN_R
[src]
Bit 8 - Timer 14 clock enable
pub fn wwdgen(&self) -> WWDGEN_R
[src]
Bit 11 - Window watchdog clock enable
pub fn spi2en(&self) -> SPI2EN_R
[src]
Bit 14 - SPI 2 clock enable
pub fn spi3en(&self) -> SPI3EN_R
[src]
Bit 15 - SPI 3 clock enable
pub fn usart2en(&self) -> USART2EN_R
[src]
Bit 17 - USART 2 clock enable
pub fn usart3en(&self) -> USART3EN_R
[src]
Bit 18 - USART 3 clock enable
pub fn uart4en(&self) -> UART4EN_R
[src]
Bit 19 - UART 4 clock enable
pub fn uart5en(&self) -> UART5EN_R
[src]
Bit 20 - UART 5 clock enable
pub fn i2c1en(&self) -> I2C1EN_R
[src]
Bit 21 - I2C 1 clock enable
pub fn i2c2en(&self) -> I2C2EN_R
[src]
Bit 22 - I2C 2 clock enable
pub fn usben(&self) -> USBEN_R
[src]
Bit 23 - USB clock enable
pub fn canen(&self) -> CANEN_R
[src]
Bit 25 - CAN clock enable
pub fn bkpen(&self) -> BKPEN_R
[src]
Bit 27 - Backup interface clock enable
pub fn pwren(&self) -> PWREN_R
[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R
[src]
Bit 29 - DAC interface clock enable
impl R<bool, LSEON_A>
[src]
pub fn variant(&self) -> LSEON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSERDY_A>
[src]
pub fn variant(&self) -> LSERDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, LSEBYP_A>
[src]
pub fn variant(&self) -> LSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<u8, RTCSEL_A>
[src]
pub fn variant(&self) -> RTCSEL_A
[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool
[src]
Checks if the value of the field is NOCLOCK
pub fn is_lse(&self) -> bool
[src]
Checks if the value of the field is LSE
pub fn is_lsi(&self) -> bool
[src]
Checks if the value of the field is LSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
impl R<bool, RTCEN_A>
[src]
pub fn variant(&self) -> RTCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BDRST_A>
[src]
pub fn variant(&self) -> BDRST_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BDCR>>
[src]
pub fn lseon(&self) -> LSEON_R
[src]
Bit 0 - External Low Speed oscillator enable
pub fn lserdy(&self) -> LSERDY_R
[src]
Bit 1 - External Low Speed oscillator ready
pub fn lsebyp(&self) -> LSEBYP_R
[src]
Bit 2 - External Low Speed oscillator bypass
pub fn rtcsel(&self) -> RTCSEL_R
[src]
Bits 8:9 - RTC clock source selection
pub fn rtcen(&self) -> RTCEN_R
[src]
Bit 15 - RTC clock enable
pub fn bdrst(&self) -> BDRST_R
[src]
Bit 16 - Backup domain software reset
impl R<bool, LSION_A>
[src]
pub fn variant(&self) -> LSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSIRDY_A>
[src]
pub fn variant(&self) -> LSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, RMVF_A>
[src]
pub fn variant(&self) -> Variant<bool, RMVF_A>
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
impl R<bool, PINRSTF_A>
[src]
pub fn variant(&self) -> PINRSTF_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn lsion(&self) -> LSION_R
[src]
Bit 0 - Internal low speed oscillator enable
pub fn lsirdy(&self) -> LSIRDY_R
[src]
Bit 1 - Internal low speed oscillator ready
pub fn rmvf(&self) -> RMVF_R
[src]
Bit 24 - Remove reset flag
pub fn pinrstf(&self) -> PINRSTF_R
[src]
Bit 26 - PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R
[src]
Bit 27 - POR/PDR reset flag
pub fn sftrstf(&self) -> SFTRSTF_R
[src]
Bit 28 - Software reset flag
pub fn iwdgrstf(&self) -> IWDGRSTF_R
[src]
Bit 29 - Independent watchdog reset flag
pub fn wwdgrstf(&self) -> WWDGRSTF_R
[src]
Bit 30 - Window watchdog reset flag
pub fn lpwrrstf(&self) -> LPWRRSTF_R
[src]
Bit 31 - Low-power reset flag
impl R<u8, MODE0_A>
[src]
pub fn variant(&self) -> MODE0_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF0_A>
[src]
pub fn variant(&self) -> CNF0_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn mode0(&self) -> MODE0_R
[src]
Bits 0:1 - Port n.0 mode bits
pub fn cnf0(&self) -> CNF0_R
[src]
Bits 2:3 - Port n.0 configuration bits
pub fn mode1(&self) -> MODE1_R
[src]
Bits 4:5 - Port n.1 mode bits
pub fn cnf1(&self) -> CNF1_R
[src]
Bits 6:7 - Port n.1 configuration bits
pub fn mode2(&self) -> MODE2_R
[src]
Bits 8:9 - Port n.2 mode bits
pub fn cnf2(&self) -> CNF2_R
[src]
Bits 10:11 - Port n.2 configuration bits
pub fn mode3(&self) -> MODE3_R
[src]
Bits 12:13 - Port n.3 mode bits
pub fn cnf3(&self) -> CNF3_R
[src]
Bits 14:15 - Port n.3 configuration bits
pub fn mode4(&self) -> MODE4_R
[src]
Bits 16:17 - Port n.4 mode bits
pub fn cnf4(&self) -> CNF4_R
[src]
Bits 18:19 - Port n.4 configuration bits
pub fn mode5(&self) -> MODE5_R
[src]
Bits 20:21 - Port n.5 mode bits
pub fn cnf5(&self) -> CNF5_R
[src]
Bits 22:23 - Port n.5 configuration bits
pub fn mode6(&self) -> MODE6_R
[src]
Bits 24:25 - Port n.6 mode bits
pub fn cnf6(&self) -> CNF6_R
[src]
Bits 26:27 - Port n.6 configuration bits
pub fn mode7(&self) -> MODE7_R
[src]
Bits 28:29 - Port n.7 mode bits
pub fn cnf7(&self) -> CNF7_R
[src]
Bits 30:31 - Port n.7 configuration bits
impl R<u8, MODE8_A>
[src]
pub fn variant(&self) -> MODE8_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF8_A>
[src]
pub fn variant(&self) -> CNF8_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn mode8(&self) -> MODE8_R
[src]
Bits 0:1 - Port n.8 mode bits
pub fn cnf8(&self) -> CNF8_R
[src]
Bits 2:3 - Port n.8 configuration bits
pub fn mode9(&self) -> MODE9_R
[src]
Bits 4:5 - Port n.9 mode bits
pub fn cnf9(&self) -> CNF9_R
[src]
Bits 6:7 - Port n.9 configuration bits
pub fn mode10(&self) -> MODE10_R
[src]
Bits 8:9 - Port n.10 mode bits
pub fn cnf10(&self) -> CNF10_R
[src]
Bits 10:11 - Port n.10 configuration bits
pub fn mode11(&self) -> MODE11_R
[src]
Bits 12:13 - Port n.11 mode bits
pub fn cnf11(&self) -> CNF11_R
[src]
Bits 14:15 - Port n.11 configuration bits
pub fn mode12(&self) -> MODE12_R
[src]
Bits 16:17 - Port n.12 mode bits
pub fn cnf12(&self) -> CNF12_R
[src]
Bits 18:19 - Port n.12 configuration bits
pub fn mode13(&self) -> MODE13_R
[src]
Bits 20:21 - Port n.13 mode bits
pub fn cnf13(&self) -> CNF13_R
[src]
Bits 22:23 - Port n.13 configuration bits
pub fn mode14(&self) -> MODE14_R
[src]
Bits 24:25 - Port n.14 mode bits
pub fn cnf14(&self) -> CNF14_R
[src]
Bits 26:27 - Port n.14 configuration bits
pub fn mode15(&self) -> MODE15_R
[src]
Bits 28:29 - Port n.15 mode bits
pub fn cnf15(&self) -> CNF15_R
[src]
Bits 30:31 - Port n.15 configuration bits
impl R<bool, IDR0_A>
[src]
pub fn variant(&self) -> IDR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _IDR>>
[src]
pub fn idr0(&self) -> IDR0_R
[src]
Bit 0 - Port input data
pub fn idr1(&self) -> IDR1_R
[src]
Bit 1 - Port input data
pub fn idr2(&self) -> IDR2_R
[src]
Bit 2 - Port input data
pub fn idr3(&self) -> IDR3_R
[src]
Bit 3 - Port input data
pub fn idr4(&self) -> IDR4_R
[src]
Bit 4 - Port input data
pub fn idr5(&self) -> IDR5_R
[src]
Bit 5 - Port input data
pub fn idr6(&self) -> IDR6_R
[src]
Bit 6 - Port input data
pub fn idr7(&self) -> IDR7_R
[src]
Bit 7 - Port input data
pub fn idr8(&self) -> IDR8_R
[src]
Bit 8 - Port input data
pub fn idr9(&self) -> IDR9_R
[src]
Bit 9 - Port input data
pub fn idr10(&self) -> IDR10_R
[src]
Bit 10 - Port input data
pub fn idr11(&self) -> IDR11_R
[src]
Bit 11 - Port input data
pub fn idr12(&self) -> IDR12_R
[src]
Bit 12 - Port input data
pub fn idr13(&self) -> IDR13_R
[src]
Bit 13 - Port input data
pub fn idr14(&self) -> IDR14_R
[src]
Bit 14 - Port input data
pub fn idr15(&self) -> IDR15_R
[src]
Bit 15 - Port input data
impl R<bool, ODR0_A>
[src]
pub fn variant(&self) -> ODR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _ODR>>
[src]
pub fn odr0(&self) -> ODR0_R
[src]
Bit 0 - Port output data
pub fn odr1(&self) -> ODR1_R
[src]
Bit 1 - Port output data
pub fn odr2(&self) -> ODR2_R
[src]
Bit 2 - Port output data
pub fn odr3(&self) -> ODR3_R
[src]
Bit 3 - Port output data
pub fn odr4(&self) -> ODR4_R
[src]
Bit 4 - Port output data
pub fn odr5(&self) -> ODR5_R
[src]
Bit 5 - Port output data
pub fn odr6(&self) -> ODR6_R
[src]
Bit 6 - Port output data
pub fn odr7(&self) -> ODR7_R
[src]
Bit 7 - Port output data
pub fn odr8(&self) -> ODR8_R
[src]
Bit 8 - Port output data
pub fn odr9(&self) -> ODR9_R
[src]
Bit 9 - Port output data
pub fn odr10(&self) -> ODR10_R
[src]
Bit 10 - Port output data
pub fn odr11(&self) -> ODR11_R
[src]
Bit 11 - Port output data
pub fn odr12(&self) -> ODR12_R
[src]
Bit 12 - Port output data
pub fn odr13(&self) -> ODR13_R
[src]
Bit 13 - Port output data
pub fn odr14(&self) -> ODR14_R
[src]
Bit 14 - Port output data
pub fn odr15(&self) -> ODR15_R
[src]
Bit 15 - Port output data
impl R<bool, LCK0_A>
[src]
pub fn variant(&self) -> LCK0_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCK10_A>
[src]
pub fn variant(&self) -> LCK10_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCKK_A>
[src]
pub fn variant(&self) -> LCKK_A
[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool
[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _LCKR>>
[src]
pub fn lck0(&self) -> LCK0_R
[src]
Bit 0 - Port A Lock bit 0
pub fn lck1(&self) -> LCK1_R
[src]
Bit 1 - Port A Lock bit 1
pub fn lck2(&self) -> LCK2_R
[src]
Bit 2 - Port A Lock bit 2
pub fn lck3(&self) -> LCK3_R
[src]
Bit 3 - Port A Lock bit 3
pub fn lck4(&self) -> LCK4_R
[src]
Bit 4 - Port A Lock bit 4
pub fn lck5(&self) -> LCK5_R
[src]
Bit 5 - Port A Lock bit 5
pub fn lck6(&self) -> LCK6_R
[src]
Bit 6 - Port A Lock bit 6
pub fn lck7(&self) -> LCK7_R
[src]
Bit 7 - Port A Lock bit 7
pub fn lck8(&self) -> LCK8_R
[src]
Bit 8 - Port A Lock bit 8
pub fn lck9(&self) -> LCK9_R
[src]
Bit 9 - Port A Lock bit 9
pub fn lck10(&self) -> LCK10_R
[src]
Bit 10 - Port A Lock bit 10
pub fn lck11(&self) -> LCK11_R
[src]
Bit 11 - Port A Lock bit 11
pub fn lck12(&self) -> LCK12_R
[src]
Bit 12 - Port A Lock bit 12
pub fn lck13(&self) -> LCK13_R
[src]
Bit 13 - Port A Lock bit 13
pub fn lck14(&self) -> LCK14_R
[src]
Bit 14 - Port A Lock bit 14
pub fn lck15(&self) -> LCK15_R
[src]
Bit 15 - Port A Lock bit 15
pub fn lckk(&self) -> LCKK_R
[src]
Bit 16 - Lock key
impl R<u32, Reg<u32, _EVCR>>
[src]
pub fn pin(&self) -> PIN_R
[src]
Bits 0:3 - Pin selection
pub fn port(&self) -> PORT_R
[src]
Bits 4:6 - Port selection
pub fn evoe(&self) -> EVOE_R
[src]
Bit 7 - Event Output Enable
impl R<u32, Reg<u32, _MAPR>>
[src]
pub fn spi1_remap(&self) -> SPI1_REMAP_R
[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAP_R
[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAP_R
[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAP_R
[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAP_R
[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAP_R
[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAP_R
[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAP_R
[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAP_R
[src]
Bit 12 - TIM4 remapping
pub fn can_remap(&self) -> CAN_REMAP_R
[src]
Bits 13:14 - CAN1 remapping
pub fn pd01_remap(&self) -> PD01_REMAP_R
[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R
[src]
Bit 16 - Set and cleared by software
pub fn adc1_etrginj_remap(&self) -> ADC1_ETRGINJ_REMAP_R
[src]
Bit 17 - ADC 1 External trigger injected conversion remapping
pub fn adc1_etrgreg_remap(&self) -> ADC1_ETRGREG_REMAP_R
[src]
Bit 18 - ADC 1 external trigger regular conversion remapping
pub fn adc2_etrginj_remap(&self) -> ADC2_ETRGINJ_REMAP_R
[src]
Bit 19 - ADC 2 external trigger injected conversion remapping
pub fn adc2_etrgreg_remap(&self) -> ADC2_ETRGREG_REMAP_R
[src]
Bit 20 - ADC 2 external trigger regular conversion remapping
impl R<u32, Reg<u32, _EXTICR1>>
[src]
pub fn exti0(&self) -> EXTI0_R
[src]
Bits 0:3 - EXTI0 configuration
pub fn exti1(&self) -> EXTI1_R
[src]
Bits 4:7 - EXTI1 configuration
pub fn exti2(&self) -> EXTI2_R
[src]
Bits 8:11 - EXTI2 configuration
pub fn exti3(&self) -> EXTI3_R
[src]
Bits 12:15 - EXTI3 configuration
impl R<u32, Reg<u32, _EXTICR2>>
[src]
pub fn exti4(&self) -> EXTI4_R
[src]
Bits 0:3 - EXTI4 configuration
pub fn exti5(&self) -> EXTI5_R
[src]
Bits 4:7 - EXTI5 configuration
pub fn exti6(&self) -> EXTI6_R
[src]
Bits 8:11 - EXTI6 configuration
pub fn exti7(&self) -> EXTI7_R
[src]
Bits 12:15 - EXTI7 configuration
impl R<u32, Reg<u32, _EXTICR3>>
[src]
pub fn exti8(&self) -> EXTI8_R
[src]
Bits 0:3 - EXTI8 configuration
pub fn exti9(&self) -> EXTI9_R
[src]
Bits 4:7 - EXTI9 configuration
pub fn exti10(&self) -> EXTI10_R
[src]
Bits 8:11 - EXTI10 configuration
pub fn exti11(&self) -> EXTI11_R
[src]
Bits 12:15 - EXTI11 configuration
impl R<u32, Reg<u32, _EXTICR4>>
[src]
pub fn exti12(&self) -> EXTI12_R
[src]
Bits 0:3 - EXTI12 configuration
pub fn exti13(&self) -> EXTI13_R
[src]
Bits 4:7 - EXTI13 configuration
pub fn exti14(&self) -> EXTI14_R
[src]
Bits 8:11 - EXTI14 configuration
pub fn exti15(&self) -> EXTI15_R
[src]
Bits 12:15 - EXTI15 configuration
impl R<u32, Reg<u32, _MAPR2>>
[src]
pub fn tim9_remap(&self) -> TIM9_REMAP_R
[src]
Bit 5 - TIM9 remapping
pub fn tim10_remap(&self) -> TIM10_REMAP_R
[src]
Bit 6 - TIM10 remapping
pub fn tim11_remap(&self) -> TIM11_REMAP_R
[src]
Bit 7 - TIM11 remapping
pub fn tim13_remap(&self) -> TIM13_REMAP_R
[src]
Bit 8 - TIM13 remapping
pub fn tim14_remap(&self) -> TIM14_REMAP_R
[src]
Bit 9 - TIM14 remapping
pub fn fsmc_nadv(&self) -> FSMC_NADV_R
[src]
Bit 10 - NADV connect/disconnect
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _IMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Interrupt Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Interrupt Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Interrupt Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Interrupt Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Interrupt Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Interrupt Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Interrupt Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Interrupt Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Interrupt Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Interrupt Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Interrupt Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Interrupt Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Interrupt Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Interrupt Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Interrupt Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Interrupt Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Interrupt Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Interrupt Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Interrupt Mask on line 18
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Event Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Event Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Event Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Event Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Event Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Event Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Event Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Event Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Event Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Event Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Event Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Event Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Event Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Event Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Event Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Event Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Event Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Event Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Event Mask on line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Rising trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Rising trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Rising trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Rising trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Rising trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Rising trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Rising trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Rising trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Rising trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Rising trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Rising trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Rising trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Rising trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Rising trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Rising trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Rising trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Rising trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Rising trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Rising trigger event configuration of line 18
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Falling trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Falling trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Falling trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Falling trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Falling trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Falling trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Falling trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Falling trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Falling trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Falling trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Falling trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Falling trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Falling trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Falling trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Falling trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Falling trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Falling trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Falling trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Falling trigger event configuration of line 18
impl R<bool, SWIER0_A>
[src]
pub fn variant(&self) -> Variant<bool, SWIER0_A>
[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool
[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIER>>
[src]
pub fn swier0(&self) -> SWIER0_R
[src]
Bit 0 - Software Interrupt on line 0
pub fn swier1(&self) -> SWIER1_R
[src]
Bit 1 - Software Interrupt on line 1
pub fn swier2(&self) -> SWIER2_R
[src]
Bit 2 - Software Interrupt on line 2
pub fn swier3(&self) -> SWIER3_R
[src]
Bit 3 - Software Interrupt on line 3
pub fn swier4(&self) -> SWIER4_R
[src]
Bit 4 - Software Interrupt on line 4
pub fn swier5(&self) -> SWIER5_R
[src]
Bit 5 - Software Interrupt on line 5
pub fn swier6(&self) -> SWIER6_R
[src]
Bit 6 - Software Interrupt on line 6
pub fn swier7(&self) -> SWIER7_R
[src]
Bit 7 - Software Interrupt on line 7
pub fn swier8(&self) -> SWIER8_R
[src]
Bit 8 - Software Interrupt on line 8
pub fn swier9(&self) -> SWIER9_R
[src]
Bit 9 - Software Interrupt on line 9
pub fn swier10(&self) -> SWIER10_R
[src]
Bit 10 - Software Interrupt on line 10
pub fn swier11(&self) -> SWIER11_R
[src]
Bit 11 - Software Interrupt on line 11
pub fn swier12(&self) -> SWIER12_R
[src]
Bit 12 - Software Interrupt on line 12
pub fn swier13(&self) -> SWIER13_R
[src]
Bit 13 - Software Interrupt on line 13
pub fn swier14(&self) -> SWIER14_R
[src]
Bit 14 - Software Interrupt on line 14
pub fn swier15(&self) -> SWIER15_R
[src]
Bit 15 - Software Interrupt on line 15
pub fn swier16(&self) -> SWIER16_R
[src]
Bit 16 - Software Interrupt on line 16
pub fn swier17(&self) -> SWIER17_R
[src]
Bit 17 - Software Interrupt on line 17
pub fn swier18(&self) -> SWIER18_R
[src]
Bit 18 - Software Interrupt on line 18
impl R<bool, PR0_A>
[src]
pub fn variant(&self) -> PR0_A
[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool
[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PR>>
[src]
pub fn pr0(&self) -> PR0_R
[src]
Bit 0 - Pending bit 0
pub fn pr1(&self) -> PR1_R
[src]
Bit 1 - Pending bit 1
pub fn pr2(&self) -> PR2_R
[src]
Bit 2 - Pending bit 2
pub fn pr3(&self) -> PR3_R
[src]
Bit 3 - Pending bit 3
pub fn pr4(&self) -> PR4_R
[src]
Bit 4 - Pending bit 4
pub fn pr5(&self) -> PR5_R
[src]
Bit 5 - Pending bit 5
pub fn pr6(&self) -> PR6_R
[src]
Bit 6 - Pending bit 6
pub fn pr7(&self) -> PR7_R
[src]
Bit 7 - Pending bit 7
pub fn pr8(&self) -> PR8_R
[src]
Bit 8 - Pending bit 8
pub fn pr9(&self) -> PR9_R
[src]
Bit 9 - Pending bit 9
pub fn pr10(&self) -> PR10_R
[src]
Bit 10 - Pending bit 10
pub fn pr11(&self) -> PR11_R
[src]
Bit 11 - Pending bit 11
pub fn pr12(&self) -> PR12_R
[src]
Bit 12 - Pending bit 12
pub fn pr13(&self) -> PR13_R
[src]
Bit 13 - Pending bit 13
pub fn pr14(&self) -> PR14_R
[src]
Bit 14 - Pending bit 14
pub fn pr15(&self) -> PR15_R
[src]
Bit 15 - Pending bit 15
pub fn pr16(&self) -> PR16_R
[src]
Bit 16 - Pending bit 16
pub fn pr17(&self) -> PR17_R
[src]
Bit 17 - Pending bit 17
pub fn pr18(&self) -> PR18_R
[src]
Bit 18 - Pending bit 18
impl R<bool, EN_A>
[src]
pub fn variant(&self) -> EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HTIE_A>
[src]
pub fn variant(&self) -> HTIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TEIE_A>
[src]
pub fn variant(&self) -> TEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool
[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool
[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CIRC_A>
[src]
pub fn variant(&self) -> CIRC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PINC_A>
[src]
pub fn variant(&self) -> PINC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, PSIZE_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, PL_A>
[src]
pub fn variant(&self) -> PL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool
[src]
Checks if the value of the field is VERYHIGH
impl R<bool, MEM2MEM_A>
[src]
pub fn variant(&self) -> MEM2MEM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en(&self) -> EN_R
[src]
Bit 0 - Channel enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 1 - Transfer complete interrupt enable
pub fn htie(&self) -> HTIE_R
[src]
Bit 2 - Half Transfer interrupt enable
pub fn teie(&self) -> TEIE_R
[src]
Bit 3 - Transfer error interrupt enable
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Data transfer direction
pub fn circ(&self) -> CIRC_R
[src]
Bit 5 - Circular mode
pub fn pinc(&self) -> PINC_R
[src]
Bit 6 - Peripheral increment mode
pub fn minc(&self) -> MINC_R
[src]
Bit 7 - Memory increment mode
pub fn psize(&self) -> PSIZE_R
[src]
Bits 8:9 - Peripheral size
pub fn msize(&self) -> MSIZE_R
[src]
Bits 10:11 - Memory size
pub fn pl(&self) -> PL_R
[src]
Bits 12:13 - Channel Priority level
pub fn mem2mem(&self) -> MEM2MEM_R
[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _NDTR>>
[src]
impl R<u32, Reg<u32, _PAR>>
[src]
impl R<u32, Reg<u32, _MAR>>
[src]
impl R<bool, GIF1_A>
[src]
pub fn variant(&self) -> GIF1_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<bool, TCIF1_A>
[src]
pub fn variant(&self) -> TCIF1_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTIF1_A>
[src]
pub fn variant(&self) -> HTIF1_A
[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool
[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
impl R<bool, TEIF1_A>
[src]
pub fn variant(&self) -> TEIF1_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _ISR>>
[src]
pub fn gif1(&self) -> GIF1_R
[src]
Bit 0 - Channel 1 Global interrupt flag
pub fn tcif1(&self) -> TCIF1_R
[src]
Bit 1 - Channel 1 Transfer Complete flag
pub fn htif1(&self) -> HTIF1_R
[src]
Bit 2 - Channel 1 Half Transfer Complete flag
pub fn teif1(&self) -> TEIF1_R
[src]
Bit 3 - Channel 1 Transfer Error flag
pub fn gif2(&self) -> GIF2_R
[src]
Bit 4 - Channel 2 Global interrupt flag
pub fn tcif2(&self) -> TCIF2_R
[src]
Bit 5 - Channel 2 Transfer Complete flag
pub fn htif2(&self) -> HTIF2_R
[src]
Bit 6 - Channel 2 Half Transfer Complete flag
pub fn teif2(&self) -> TEIF2_R
[src]
Bit 7 - Channel 2 Transfer Error flag
pub fn gif3(&self) -> GIF3_R
[src]
Bit 8 - Channel 3 Global interrupt flag
pub fn tcif3(&self) -> TCIF3_R
[src]
Bit 9 - Channel 3 Transfer Complete flag
pub fn htif3(&self) -> HTIF3_R
[src]
Bit 10 - Channel 3 Half Transfer Complete flag
pub fn teif3(&self) -> TEIF3_R
[src]
Bit 11 - Channel 3 Transfer Error flag
pub fn gif4(&self) -> GIF4_R
[src]
Bit 12 - Channel 4 Global interrupt flag
pub fn tcif4(&self) -> TCIF4_R
[src]
Bit 13 - Channel 4 Transfer Complete flag
pub fn htif4(&self) -> HTIF4_R
[src]
Bit 14 - Channel 4 Half Transfer Complete flag
pub fn teif4(&self) -> TEIF4_R
[src]
Bit 15 - Channel 4 Transfer Error flag
pub fn gif5(&self) -> GIF5_R
[src]
Bit 16 - Channel 5 Global interrupt flag
pub fn tcif5(&self) -> TCIF5_R
[src]
Bit 17 - Channel 5 Transfer Complete flag
pub fn htif5(&self) -> HTIF5_R
[src]
Bit 18 - Channel 5 Half Transfer Complete flag
pub fn teif5(&self) -> TEIF5_R
[src]
Bit 19 - Channel 5 Transfer Error flag
pub fn gif6(&self) -> GIF6_R
[src]
Bit 20 - Channel 6 Global interrupt flag
pub fn tcif6(&self) -> TCIF6_R
[src]
Bit 21 - Channel 6 Transfer Complete flag
pub fn htif6(&self) -> HTIF6_R
[src]
Bit 22 - Channel 6 Half Transfer Complete flag
pub fn teif6(&self) -> TEIF6_R
[src]
Bit 23 - Channel 6 Transfer Error flag
pub fn gif7(&self) -> GIF7_R
[src]
Bit 24 - Channel 7 Global interrupt flag
pub fn tcif7(&self) -> TCIF7_R
[src]
Bit 25 - Channel 7 Transfer Complete flag
pub fn htif7(&self) -> HTIF7_R
[src]
Bit 26 - Channel 7 Half Transfer Complete flag
pub fn teif7(&self) -> TEIF7_R
[src]
Bit 27 - Channel 7 Transfer Error flag
impl R<u32, Reg<u32, _POWER>>
[src]
impl R<u32, Reg<u32, _CLKCR>>
[src]
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 0:7 - Clock divide factor
pub fn clken(&self) -> CLKEN_R
[src]
Bit 8 - Clock enable bit
pub fn pwrsav(&self) -> PWRSAV_R
[src]
Bit 9 - Power saving configuration bit
pub fn bypass(&self) -> BYPASS_R
[src]
Bit 10 - Clock divider bypass enable bit
pub fn widbus(&self) -> WIDBUS_R
[src]
Bits 11:12 - Wide bus mode enable bit
pub fn negedge(&self) -> NEGEDGE_R
[src]
Bit 13 - SDIO_CK dephasing selection bit
pub fn hwfc_en(&self) -> HWFC_EN_R
[src]
Bit 14 - HW Flow Control enable
impl R<u32, Reg<u32, _ARG>>
[src]
impl R<u32, Reg<u32, _CMD>>
[src]
pub fn cmdindex(&self) -> CMDINDEX_R
[src]
Bits 0:5 - CMDINDEX
pub fn waitresp(&self) -> WAITRESP_R
[src]
Bits 6:7 - WAITRESP
pub fn waitint(&self) -> WAITINT_R
[src]
Bit 8 - WAITINT
pub fn waitpend(&self) -> WAITPEND_R
[src]
Bit 9 - WAITPEND
pub fn cpsmen(&self) -> CPSMEN_R
[src]
Bit 10 - CPSMEN
pub fn sdiosuspend(&self) -> SDIOSUSPEND_R
[src]
Bit 11 - SDIOSuspend
pub fn encmdcompl(&self) -> ENCMDCOMPL_R
[src]
Bit 12 - ENCMDcompl
pub fn n_ien(&self) -> NIEN_R
[src]
Bit 13 - nIEN
pub fn ce_atacmd(&self) -> CE_ATACMD_R
[src]
Bit 14 - CE_ATACMD
impl R<u32, Reg<u32, _RESPCMD>>
[src]
impl R<u32, Reg<u32, _RESPI1>>
[src]
pub fn cardstatus1(&self) -> CARDSTATUS1_R
[src]
Bits 0:31 - CARDSTATUS1
impl R<u32, Reg<u32, _RESP>>
[src]
pub fn cardstatus2(&self) -> CARDSTATUS2_R
[src]
Bits 0:31 - CARDSTATUS2
impl R<u32, Reg<u32, _DTIMER>>
[src]
pub fn datatime(&self) -> DATATIME_R
[src]
Bits 0:31 - Data timeout period
impl R<u32, Reg<u32, _DLEN>>
[src]
pub fn datalength(&self) -> DATALENGTH_R
[src]
Bits 0:24 - Data length value
impl R<u32, Reg<u32, _DCTRL>>
[src]
pub fn dten(&self) -> DTEN_R
[src]
Bit 0 - DTEN
pub fn dtdir(&self) -> DTDIR_R
[src]
Bit 1 - DTDIR
pub fn dtmode(&self) -> DTMODE_R
[src]
Bit 2 - DTMODE
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 3 - DMAEN
pub fn dblocksize(&self) -> DBLOCKSIZE_R
[src]
Bits 4:7 - DBLOCKSIZE
pub fn pwstart(&self) -> PWSTART_R
[src]
Bit 8 - PWSTART
pub fn pwstop(&self) -> PWSTOP_R
[src]
Bit 9 - PWSTOP
pub fn rwmod(&self) -> RWMOD_R
[src]
Bit 10 - RWMOD
pub fn sdioen(&self) -> SDIOEN_R
[src]
Bit 11 - SDIOEN
impl R<u32, Reg<u32, _DCOUNT>>
[src]
pub fn datacount(&self) -> DATACOUNT_R
[src]
Bits 0:24 - Data count value
impl R<u32, Reg<u32, _STA>>
[src]
pub fn ccrcfail(&self) -> CCRCFAIL_R
[src]
Bit 0 - CCRCFAIL
pub fn dcrcfail(&self) -> DCRCFAIL_R
[src]
Bit 1 - DCRCFAIL
pub fn ctimeout(&self) -> CTIMEOUT_R
[src]
Bit 2 - CTIMEOUT
pub fn dtimeout(&self) -> DTIMEOUT_R
[src]
Bit 3 - DTIMEOUT
pub fn txunderr(&self) -> TXUNDERR_R
[src]
Bit 4 - TXUNDERR
pub fn rxoverr(&self) -> RXOVERR_R
[src]
Bit 5 - RXOVERR
pub fn cmdrend(&self) -> CMDREND_R
[src]
Bit 6 - CMDREND
pub fn cmdsent(&self) -> CMDSENT_R
[src]
Bit 7 - CMDSENT
pub fn dataend(&self) -> DATAEND_R
[src]
Bit 8 - DATAEND
pub fn stbiterr(&self) -> STBITERR_R
[src]
Bit 9 - STBITERR
pub fn dbckend(&self) -> DBCKEND_R
[src]
Bit 10 - DBCKEND
pub fn cmdact(&self) -> CMDACT_R
[src]
Bit 11 - CMDACT
pub fn txact(&self) -> TXACT_R
[src]
Bit 12 - TXACT
pub fn rxact(&self) -> RXACT_R
[src]
Bit 13 - RXACT
pub fn txfifohe(&self) -> TXFIFOHE_R
[src]
Bit 14 - TXFIFOHE
pub fn rxfifohf(&self) -> RXFIFOHF_R
[src]
Bit 15 - RXFIFOHF
pub fn txfifof(&self) -> TXFIFOF_R
[src]
Bit 16 - TXFIFOF
pub fn rxfifof(&self) -> RXFIFOF_R
[src]
Bit 17 - RXFIFOF
pub fn txfifoe(&self) -> TXFIFOE_R
[src]
Bit 18 - TXFIFOE
pub fn rxfifoe(&self) -> RXFIFOE_R
[src]
Bit 19 - RXFIFOE
pub fn txdavl(&self) -> TXDAVL_R
[src]
Bit 20 - TXDAVL
pub fn rxdavl(&self) -> RXDAVL_R
[src]
Bit 21 - RXDAVL
pub fn sdioit(&self) -> SDIOIT_R
[src]
Bit 22 - SDIOIT
pub fn ceataend(&self) -> CEATAEND_R
[src]
Bit 23 - CEATAEND
impl R<u32, Reg<u32, _ICR>>
[src]
pub fn ccrcfailc(&self) -> CCRCFAILC_R
[src]
Bit 0 - CCRCFAILC
pub fn dcrcfailc(&self) -> DCRCFAILC_R
[src]
Bit 1 - DCRCFAILC
pub fn ctimeoutc(&self) -> CTIMEOUTC_R
[src]
Bit 2 - CTIMEOUTC
pub fn dtimeoutc(&self) -> DTIMEOUTC_R
[src]
Bit 3 - DTIMEOUTC
pub fn txunderrc(&self) -> TXUNDERRC_R
[src]
Bit 4 - TXUNDERRC
pub fn rxoverrc(&self) -> RXOVERRC_R
[src]
Bit 5 - RXOVERRC
pub fn cmdrendc(&self) -> CMDRENDC_R
[src]
Bit 6 - CMDRENDC
pub fn cmdsentc(&self) -> CMDSENTC_R
[src]
Bit 7 - CMDSENTC
pub fn dataendc(&self) -> DATAENDC_R
[src]
Bit 8 - DATAENDC
pub fn stbiterrc(&self) -> STBITERRC_R
[src]
Bit 9 - STBITERRC
pub fn dbckendc(&self) -> DBCKENDC_R
[src]
Bit 10 - DBCKENDC
pub fn sdioitc(&self) -> SDIOITC_R
[src]
Bit 22 - SDIOITC
pub fn ceataendc(&self) -> CEATAENDC_R
[src]
Bit 23 - CEATAENDC
impl R<u32, Reg<u32, _MASK>>
[src]
pub fn ccrcfailie(&self) -> CCRCFAILIE_R
[src]
Bit 0 - CCRCFAILIE
pub fn dcrcfailie(&self) -> DCRCFAILIE_R
[src]
Bit 1 - DCRCFAILIE
pub fn ctimeoutie(&self) -> CTIMEOUTIE_R
[src]
Bit 2 - CTIMEOUTIE
pub fn dtimeoutie(&self) -> DTIMEOUTIE_R
[src]
Bit 3 - DTIMEOUTIE
pub fn txunderrie(&self) -> TXUNDERRIE_R
[src]
Bit 4 - TXUNDERRIE
pub fn rxoverrie(&self) -> RXOVERRIE_R
[src]
Bit 5 - RXOVERRIE
pub fn cmdrendie(&self) -> CMDRENDIE_R
[src]
Bit 6 - CMDRENDIE
pub fn cmdsentie(&self) -> CMDSENTIE_R
[src]
Bit 7 - CMDSENTIE
pub fn dataendie(&self) -> DATAENDIE_R
[src]
Bit 8 - DATAENDIE
pub fn stbiterrie(&self) -> STBITERRIE_R
[src]
Bit 9 - STBITERRIE
pub fn dbackendie(&self) -> DBACKENDIE_R
[src]
Bit 10 - DBACKENDIE
pub fn cmdactie(&self) -> CMDACTIE_R
[src]
Bit 11 - CMDACTIE
pub fn txactie(&self) -> TXACTIE_R
[src]
Bit 12 - TXACTIE
pub fn rxactie(&self) -> RXACTIE_R
[src]
Bit 13 - RXACTIE
pub fn txfifoheie(&self) -> TXFIFOHEIE_R
[src]
Bit 14 - TXFIFOHEIE
pub fn rxfifohfie(&self) -> RXFIFOHFIE_R
[src]
Bit 15 - RXFIFOHFIE
pub fn txfifofie(&self) -> TXFIFOFIE_R
[src]
Bit 16 - TXFIFOFIE
pub fn rxfifofie(&self) -> RXFIFOFIE_R
[src]
Bit 17 - RXFIFOFIE
pub fn txfifoeie(&self) -> TXFIFOEIE_R
[src]
Bit 18 - TXFIFOEIE
pub fn rxfifoeie(&self) -> RXFIFOEIE_R
[src]
Bit 19 - RXFIFOEIE
pub fn txdavlie(&self) -> TXDAVLIE_R
[src]
Bit 20 - TXDAVLIE
pub fn rxdavlie(&self) -> RXDAVLIE_R
[src]
Bit 21 - RXDAVLIE
pub fn sdioitie(&self) -> SDIOITIE_R
[src]
Bit 22 - SDIOITIE
pub fn ceatendie(&self) -> CEATENDIE_R
[src]
Bit 23 - CEATENDIE
impl R<u32, Reg<u32, _FIFOCNT>>
[src]
pub fn fif0count(&self) -> FIF0COUNT_R
[src]
Bits 0:23 - FIF0COUNT
impl R<u32, Reg<u32, _FIFO>>
[src]
pub fn fifodata(&self) -> FIFODATA_R
[src]
Bits 0:31 - FIFOData
impl R<bool, SECIE_A>
[src]
pub fn variant(&self) -> SECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ALRIE_A>
[src]
pub fn variant(&self) -> ALRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OWIE_A>
[src]
pub fn variant(&self) -> OWIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn secie(&self) -> SECIE_R
[src]
Bit 0 - Second interrupt Enable
pub fn alrie(&self) -> ALRIE_R
[src]
Bit 1 - Alarm interrupt Enable
pub fn owie(&self) -> OWIE_R
[src]
Bit 2 - Overflow interrupt Enable
impl R<bool, SECF_A>
[src]
pub fn variant(&self) -> SECF_A
[src]
Get enumerated values variant
pub fn is_no_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is NOPRESCALEROVERFLOW
pub fn is_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is PRESCALEROVERFLOW
impl R<bool, ALRF_A>
[src]
pub fn variant(&self) -> ALRF_A
[src]
Get enumerated values variant
pub fn is_no_alarm(&self) -> bool
[src]
Checks if the value of the field is NOALARM
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
impl R<bool, OWF_A>
[src]
pub fn variant(&self) -> OWF_A
[src]
Get enumerated values variant
pub fn is_no_overflow(&self) -> bool
[src]
Checks if the value of the field is NOOVERFLOW
pub fn is_overflow(&self) -> bool
[src]
Checks if the value of the field is OVERFLOW
impl R<bool, RSF_A>
[src]
pub fn variant(&self) -> RSF_A
[src]
Get enumerated values variant
pub fn is_not_synchronized(&self) -> bool
[src]
Checks if the value of the field is NOTSYNCHRONIZED
pub fn is_synchronized(&self) -> bool
[src]
Checks if the value of the field is SYNCHRONIZED
impl R<bool, CNF_A>
[src]
pub fn variant(&self) -> CNF_A
[src]
Get enumerated values variant
pub fn is_exit(&self) -> bool
[src]
Checks if the value of the field is EXIT
pub fn is_enter(&self) -> bool
[src]
Checks if the value of the field is ENTER
impl R<bool, RTOFF_A>
[src]
pub fn variant(&self) -> RTOFF_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn secf(&self) -> SECF_R
[src]
Bit 0 - Second Flag
pub fn alrf(&self) -> ALRF_R
[src]
Bit 1 - Alarm Flag
pub fn owf(&self) -> OWF_R
[src]
Bit 2 - Overflow Flag
pub fn rsf(&self) -> RSF_R
[src]
Bit 3 - Registers Synchronized Flag
pub fn cnf(&self) -> CNF_R
[src]
Bit 4 - Configuration Flag
pub fn rtoff(&self) -> RTOFF_R
[src]
Bit 5 - RTC operation OFF
impl R<u32, Reg<u32, _DIVH>>
[src]
impl R<u32, Reg<u32, _DIVL>>
[src]
impl R<u32, Reg<u32, _CNTH>>
[src]
impl R<u32, Reg<u32, _CNTL>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BKP_DR>>
[src]
impl R<bool, ASOE_A>
[src]
pub fn variant(&self) -> ASOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ASOS_A>
[src]
pub fn variant(&self) -> ASOS_A
[src]
Get enumerated values variant
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<u32, Reg<u32, _RTCCR>>
[src]
pub fn cal(&self) -> CAL_R
[src]
Bits 0:6 - Calibration value
pub fn cco(&self) -> CCO_R
[src]
Bit 7 - Calibration Clock Output
pub fn asoe(&self) -> ASOE_R
[src]
Bit 8 - Alarm or second output enable
pub fn asos(&self) -> ASOS_R
[src]
Bit 9 - Alarm or second output selection
impl R<bool, TPE_A>
[src]
pub fn variant(&self) -> TPE_A
[src]
Get enumerated values variant
pub fn is_general(&self) -> bool
[src]
Checks if the value of the field is GENERAL
pub fn is_alternate(&self) -> bool
[src]
Checks if the value of the field is ALTERNATE
impl R<bool, TPAL_A>
[src]
pub fn variant(&self) -> TPAL_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CR>>
[src]
pub fn tpe(&self) -> TPE_R
[src]
Bit 0 - Tamper pin enable
pub fn tpal(&self) -> TPAL_R
[src]
Bit 1 - Tamper pin active level
impl R<bool, TPIE_A>
[src]
pub fn variant(&self) -> TPIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tpie(&self) -> TPIE_R
[src]
Bit 2 - Tamper Pin interrupt enable
pub fn tef(&self) -> TEF_R
[src]
Bit 8 - Tamper Event Flag
pub fn tif(&self) -> TIF_R
[src]
Bit 9 - Tamper Interrupt Flag
impl R<u8, PR_A>
[src]
pub fn variant(&self) -> PR_A
[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PR>>
[src]
impl R<u32, Reg<u32, _RLR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pvu(&self) -> PVU_R
[src]
Bit 0 - Watchdog prescaler value update
pub fn rvu(&self) -> RVU_R
[src]
Bit 1 - Watchdog counter reload value update
impl R<bool, WDGA_A>
[src]
pub fn variant(&self) -> WDGA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn t(&self) -> T_R
[src]
Bits 0:6 - 7-bit counter (MSB to LSB)
pub fn wdga(&self) -> WDGA_R
[src]
Bit 7 - Activation bit
impl R<bool, EWI_A>
[src]
pub fn variant(&self) -> Variant<bool, EWI_A>
[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
impl R<u8, WDGTB_A>
[src]
pub fn variant(&self) -> WDGTB_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFR>>
[src]
pub fn w(&self) -> W_R
[src]
Bits 0:6 - 7-bit window value
pub fn ewi(&self) -> EWI_R
[src]
Bit 9 - Early Wakeup Interrupt
pub fn wdgtb(&self) -> WDGTB_R
[src]
Bits 7:8 - Timer Base
impl R<bool, EWIF_A>
[src]
pub fn variant(&self) -> EWIF_A
[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> Variant<u8, MMS_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<bool, SWRST_A>
[src]
pub fn variant(&self) -> SWRST_A
[src]
Get enumerated values variant
pub fn is_not_reset(&self) -> bool
[src]
Checks if the value of the field is NOTRESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, ALERT_A>
[src]
pub fn variant(&self) -> ALERT_A
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
pub fn is_drive(&self) -> bool
[src]
Checks if the value of the field is DRIVE
impl R<bool, PEC_A>
[src]
pub fn variant(&self) -> PEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, POS_A>
[src]
pub fn variant(&self) -> POS_A
[src]
Get enumerated values variant
pub fn is_current(&self) -> bool
[src]
Checks if the value of the field is CURRENT
pub fn is_next(&self) -> bool
[src]
Checks if the value of the field is NEXT
impl R<bool, ACK_A>
[src]
pub fn variant(&self) -> ACK_A
[src]
Get enumerated values variant
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
impl R<bool, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, START_A>
[src]
pub fn variant(&self) -> START_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<bool, NOSTRETCH_A>
[src]
pub fn variant(&self) -> NOSTRETCH_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ENGC_A>
[src]
pub fn variant(&self) -> ENGC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENPEC_A>
[src]
pub fn variant(&self) -> ENPEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENARP_A>
[src]
pub fn variant(&self) -> ENARP_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SMBTYPE_A>
[src]
pub fn variant(&self) -> SMBTYPE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<bool, SMBUS_A>
[src]
pub fn variant(&self) -> SMBUS_A
[src]
Get enumerated values variant
pub fn is_i2c(&self) -> bool
[src]
Checks if the value of the field is I2C
pub fn is_smbus(&self) -> bool
[src]
Checks if the value of the field is SMBUS
impl R<bool, PE_A>
[src]
pub fn variant(&self) -> PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 15 - Software reset
pub fn alert(&self) -> ALERT_R
[src]
Bit 13 - SMBus alert
pub fn pec(&self) -> PEC_R
[src]
Bit 12 - Packet error checking
pub fn pos(&self) -> POS_R
[src]
Bit 11 - Acknowledge/PEC Position (for data reception)
pub fn ack(&self) -> ACK_R
[src]
Bit 10 - Acknowledge enable
pub fn stop(&self) -> STOP_R
[src]
Bit 9 - Stop generation
pub fn start(&self) -> START_R
[src]
Bit 8 - Start generation
pub fn nostretch(&self) -> NOSTRETCH_R
[src]
Bit 7 - Clock stretching disable (Slave mode)
pub fn engc(&self) -> ENGC_R
[src]
Bit 6 - General call enable
pub fn enpec(&self) -> ENPEC_R
[src]
Bit 5 - PEC enable
pub fn enarp(&self) -> ENARP_R
[src]
Bit 4 - ARP enable
pub fn smbtype(&self) -> SMBTYPE_R
[src]
Bit 3 - SMBus type
pub fn smbus(&self) -> SMBUS_R
[src]
Bit 1 - SMBus mode
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
impl R<bool, LAST_A>
[src]
pub fn variant(&self) -> LAST_A
[src]
Get enumerated values variant
pub fn is_not_last(&self) -> bool
[src]
Checks if the value of the field is NOTLAST
pub fn is_last(&self) -> bool
[src]
Checks if the value of the field is LAST
impl R<bool, DMAEN_A>
[src]
pub fn variant(&self) -> DMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITBUFEN_A>
[src]
pub fn variant(&self) -> ITBUFEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITEVTEN_A>
[src]
pub fn variant(&self) -> ITEVTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITERREN_A>
[src]
pub fn variant(&self) -> ITERREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn last(&self) -> LAST_R
[src]
Bit 12 - DMA last transfer
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 11 - DMA requests enable
pub fn itbufen(&self) -> ITBUFEN_R
[src]
Bit 10 - Buffer interrupt enable
pub fn itevten(&self) -> ITEVTEN_R
[src]
Bit 9 - Event interrupt enable
pub fn iterren(&self) -> ITERREN_R
[src]
Bit 8 - Error interrupt enable
pub fn freq(&self) -> FREQ_R
[src]
Bits 0:5 - Peripheral clock frequency
impl R<bool, ADDMODE_A>
[src]
pub fn variant(&self) -> ADDMODE_A
[src]
Get enumerated values variant
pub fn is_add7(&self) -> bool
[src]
Checks if the value of the field is ADD7
pub fn is_add10(&self) -> bool
[src]
Checks if the value of the field is ADD10
impl R<u32, Reg<u32, _OAR1>>
[src]
pub fn addmode(&self) -> ADDMODE_R
[src]
Bit 15 - Addressing mode (slave mode)
pub fn add(&self) -> ADD_R
[src]
Bits 0:9 - Interface address
impl R<bool, ENDUAL_A>
[src]
pub fn variant(&self) -> ENDUAL_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u32, Reg<u32, _OAR2>>
[src]
pub fn add2(&self) -> ADD2_R
[src]
Bits 1:7 - Interface address
pub fn endual(&self) -> ENDUAL_R
[src]
Bit 0 - Dual addressing mode enable
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, SMBALERT_A>
[src]
pub fn variant(&self) -> SMBALERT_A
[src]
Get enumerated values variant
pub fn is_no_alert(&self) -> bool
[src]
Checks if the value of the field is NOALERT
pub fn is_alert(&self) -> bool
[src]
Checks if the value of the field is ALERT
impl R<bool, TIMEOUT_A>
[src]
pub fn variant(&self) -> TIMEOUT_A
[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool
[src]
Checks if the value of the field is NOTIMEOUT
pub fn is_timeout(&self) -> bool
[src]
Checks if the value of the field is TIMEOUT
impl R<bool, PECERR_A>
[src]
pub fn variant(&self) -> PECERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, AF_A>
[src]
pub fn variant(&self) -> AF_A
[src]
Get enumerated values variant
pub fn is_no_failure(&self) -> bool
[src]
Checks if the value of the field is NOFAILURE
pub fn is_failure(&self) -> bool
[src]
Checks if the value of the field is FAILURE
impl R<bool, ARLO_A>
[src]
pub fn variant(&self) -> ARLO_A
[src]
Get enumerated values variant
pub fn is_no_lost(&self) -> bool
[src]
Checks if the value of the field is NOLOST
pub fn is_lost(&self) -> bool
[src]
Checks if the value of the field is LOST
impl R<bool, BERR_A>
[src]
pub fn variant(&self) -> BERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<bool, STOPF_A>
[src]
pub fn variant(&self) -> STOPF_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, BTF_A>
[src]
pub fn variant(&self) -> BTF_A
[src]
Get enumerated values variant
pub fn is_not_finished(&self) -> bool
[src]
Checks if the value of the field is NOTFINISHED
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<bool, ADDR_A>
[src]
pub fn variant(&self) -> ADDR_A
[src]
Get enumerated values variant
pub fn is_not_match(&self) -> bool
[src]
Checks if the value of the field is NOTMATCH
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, SB_A>
[src]
pub fn variant(&self) -> SB_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<u32, Reg<u32, _SR1>>
[src]
pub fn smbalert(&self) -> SMBALERT_R
[src]
Bit 15 - SMBus alert
pub fn timeout(&self) -> TIMEOUT_R
[src]
Bit 14 - Timeout or Tlow error
pub fn pecerr(&self) -> PECERR_R
[src]
Bit 12 - PEC Error in reception
pub fn ovr(&self) -> OVR_R
[src]
Bit 11 - Overrun/Underrun
pub fn af(&self) -> AF_R
[src]
Bit 10 - Acknowledge failure
pub fn arlo(&self) -> ARLO_R
[src]
Bit 9 - Arbitration lost (master mode)
pub fn berr(&self) -> BERR_R
[src]
Bit 8 - Bus error
pub fn tx_e(&self) -> TXE_R
[src]
Bit 7 - Data register empty (transmitters)
pub fn rx_ne(&self) -> RXNE_R
[src]
Bit 6 - Data register not empty (receivers)
pub fn stopf(&self) -> STOPF_R
[src]
Bit 4 - Stop detection (slave mode)
pub fn add10(&self) -> ADD10_R
[src]
Bit 3 - 10-bit header sent (Master mode)
pub fn btf(&self) -> BTF_R
[src]
Bit 2 - Byte transfer finished
pub fn addr(&self) -> ADDR_R
[src]
Bit 1 - Address sent (master mode)/matched (slave mode)
pub fn sb(&self) -> SB_R
[src]
Bit 0 - Start bit (Master mode)
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn pec(&self) -> PEC_R
[src]
Bits 8:15 - acket error checking register
pub fn dualf(&self) -> DUALF_R
[src]
Bit 7 - Dual flag (Slave mode)
pub fn smbhost(&self) -> SMBHOST_R
[src]
Bit 6 - SMBus host header (Slave mode)
pub fn smbdefault(&self) -> SMBDEFAULT_R
[src]
Bit 5 - SMBus device default address (Slave mode)
pub fn gencall(&self) -> GENCALL_R
[src]
Bit 4 - General call address (Slave mode)
pub fn tra(&self) -> TRA_R
[src]
Bit 2 - Transmitter/receiver
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Bus busy
pub fn msl(&self) -> MSL_R
[src]
Bit 0 - Master/slave
impl R<bool, F_S_A>
[src]
pub fn variant(&self) -> F_S_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_fast(&self) -> bool
[src]
Checks if the value of the field is FAST
impl R<bool, DUTY_A>
[src]
pub fn variant(&self) -> DUTY_A
[src]
Get enumerated values variant
pub fn is_duty2_1(&self) -> bool
[src]
Checks if the value of the field is DUTY2_1
pub fn is_duty16_9(&self) -> bool
[src]
Checks if the value of the field is DUTY16_9
impl R<u32, Reg<u32, _CCR>>
[src]
pub fn f_s(&self) -> F_S_R
[src]
Bit 15 - I2C master mode selection
pub fn duty(&self) -> DUTY_R
[src]
Bit 14 - Fast mode duty cycle
pub fn ccr(&self) -> CCR_R
[src]
Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)
impl R<u32, Reg<u32, _TRISE>>
[src]
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, UDR_A>
[src]
pub fn variant(&self) -> UDR_A
[src]
Get enumerated values variant
pub fn is_no_underrun(&self) -> bool
[src]
Checks if the value of the field is NOUNDERRUN
pub fn is_underrun(&self) -> bool
[src]
Checks if the value of the field is UNDERRUN
impl R<bool, CHSIDE_A>
[src]
pub fn variant(&self) -> CHSIDE_A
[src]
Get enumerated values variant
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn udr(&self) -> UDR_R
[src]
Bit 3 - Underrun flag
pub fn chside(&self) -> CHSIDE_R
[src]
Bit 2 - Channel side
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<bool, I2SMOD_A>
[src]
pub fn variant(&self) -> I2SMOD_A
[src]
Get enumerated values variant
pub fn is_spimode(&self) -> bool
[src]
Checks if the value of the field is SPIMODE
pub fn is_i2smode(&self) -> bool
[src]
Checks if the value of the field is I2SMODE
impl R<bool, I2SE_A>
[src]
pub fn variant(&self) -> I2SE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, I2SCFG_A>
[src]
pub fn variant(&self) -> I2SCFG_A
[src]
Get enumerated values variant
pub fn is_slave_tx(&self) -> bool
[src]
Checks if the value of the field is SLAVETX
pub fn is_slave_rx(&self) -> bool
[src]
Checks if the value of the field is SLAVERX
pub fn is_master_tx(&self) -> bool
[src]
Checks if the value of the field is MASTERTX
pub fn is_master_rx(&self) -> bool
[src]
Checks if the value of the field is MASTERRX
impl R<bool, PCMSYNC_A>
[src]
pub fn variant(&self) -> PCMSYNC_A
[src]
Get enumerated values variant
pub fn is_short(&self) -> bool
[src]
Checks if the value of the field is SHORT
pub fn is_long(&self) -> bool
[src]
Checks if the value of the field is LONG
impl R<u8, I2SSTD_A>
[src]
pub fn variant(&self) -> I2SSTD_A
[src]
Get enumerated values variant
pub fn is_philips(&self) -> bool
[src]
Checks if the value of the field is PHILIPS
pub fn is_msb(&self) -> bool
[src]
Checks if the value of the field is MSB
pub fn is_lsb(&self) -> bool
[src]
Checks if the value of the field is LSB
pub fn is_pcm(&self) -> bool
[src]
Checks if the value of the field is PCM
impl R<bool, CKPOL_A>
[src]
pub fn variant(&self) -> CKPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<u8, DATLEN_A>
[src]
pub fn variant(&self) -> Variant<u8, DATLEN_A>
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_twenty_four_bit(&self) -> bool
[src]
Checks if the value of the field is TWENTYFOURBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<bool, CHLEN_A>
[src]
pub fn variant(&self) -> CHLEN_A
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<u32, Reg<u32, _I2SCFGR>>
[src]
pub fn i2smod(&self) -> I2SMOD_R
[src]
Bit 11 - I2S mode selection
pub fn i2se(&self) -> I2SE_R
[src]
Bit 10 - I2S Enable
pub fn i2scfg(&self) -> I2SCFG_R
[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsync(&self) -> PCMSYNC_R
[src]
Bit 7 - PCM frame synchronization
pub fn i2sstd(&self) -> I2SSTD_R
[src]
Bits 4:5 - I2S standard selection
pub fn ckpol(&self) -> CKPOL_R
[src]
Bit 3 - Steady state clock polarity
pub fn datlen(&self) -> DATLEN_R
[src]
Bits 1:2 - Data length to be transferred
pub fn chlen(&self) -> CHLEN_R
[src]
Bit 0 - Channel length (number of bits per audio channel)
impl R<bool, MCKOE_A>
[src]
pub fn variant(&self) -> MCKOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ODD_A>
[src]
pub fn variant(&self) -> ODD_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<u32, Reg<u32, _I2SPR>>
[src]
pub fn mckoe(&self) -> MCKOE_R
[src]
Bit 9 - Master clock output enable
pub fn odd(&self) -> ODD_R
[src]
Bit 8 - Odd factor for the prescaler
pub fn i2sdiv(&self) -> I2SDIV_R
[src]
Bits 0:7 - I2S Linear prescaler
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cts(&self) -> CTS_R
[src]
Bit 9 - CTS flag
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - mantissa of USARTDIV
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - fraction of USARTDIV
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool
[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool
[src]
Checks if the value of the field is STOP1P5
impl R<bool, CLKEN_A>
[src]
pub fn variant(&self) -> CLKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first(&self) -> bool
[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn clken(&self) -> CLKEN_R
[src]
Bit 11 - Clock enable
pub fn cpol(&self) -> CPOL_R
[src]
Bit 10 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 9 - Clock phase
pub fn lbcl(&self) -> LBCL_R
[src]
Bit 8 - Last bit clock pulse
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
impl R<bool, CTSIE_A>
[src]
pub fn variant(&self) -> CTSIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSE_A>
[src]
pub fn variant(&self) -> CTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSE_A>
[src]
pub fn variant(&self) -> RTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>
[src]
pub fn variant(&self) -> SCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, NACK_A>
[src]
pub fn variant(&self) -> NACK_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn ctsie(&self) -> CTSIE_R
[src]
Bit 10 - CTS interrupt enable
pub fn ctse(&self) -> CTSE_R
[src]
Bit 9 - CTS enable
pub fn rtse(&self) -> RTSE_R
[src]
Bit 8 - RTS enable
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn scen(&self) -> SCEN_R
[src]
Bit 5 - Smartcard mode enable
pub fn nack(&self) -> NACK_R
[src]
Bit 4 - Smartcard NACK enable
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _GTPR>>
[src]
pub fn gt(&self) -> GT_R
[src]
Bits 8:15 - Guard time value
pub fn psc(&self) -> PSC_R
[src]
Bits 0:7 - Prescaler value
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, DUALMOD_A>
[src]
pub fn variant(&self) -> Variant<u8, DUALMOD_A>
[src]
Get enumerated values variant
pub fn is_independent(&self) -> bool
[src]
Checks if the value of the field is INDEPENDENT
pub fn is_regular_injected(&self) -> bool
[src]
Checks if the value of the field is REGULARINJECTED
pub fn is_regular_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is REGULARALTERNATETRIGGER
pub fn is_injected_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDFASTINTERLEAVED
pub fn is_injected_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDSLOWINTERLEAVED
pub fn is_injected(&self) -> bool
[src]
Checks if the value of the field is INJECTED
pub fn is_regular(&self) -> bool
[src]
Checks if the value of the field is REGULAR
pub fn is_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is FASTINTERLEAVED
pub fn is_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is SLOWINTERLEAVED
pub fn is_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is ALTERNATETRIGGER
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR>>
[src]
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
pub fn data(&self) -> DATA_R
[src]
Bits 0:15 - Regular data
pub fn adc2data(&self) -> ADC2DATA_R
[src]
Bits 16:31 - ADC2 data
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR>>
[src]
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _TIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
pub fn txrq(&self) -> TXRQ_R
[src]
Bit 0 - TXRQ
impl R<u32, Reg<u32, _TDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn tgt(&self) -> TGT_R
[src]
Bit 8 - TGT
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _TDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _TDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _RIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
impl R<u32, Reg<u32, _RDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn fmi(&self) -> FMI_R
[src]
Bits 8:15 - FMI
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _RDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _RDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _FR1>>
[src]
impl R<u32, Reg<u32, _FR2>>
[src]
impl R<u32, Reg<u32, _MCR>>
[src]
pub fn dbf(&self) -> DBF_R
[src]
Bit 16 - DBF
pub fn reset(&self) -> RESET_R
[src]
Bit 15 - RESET
pub fn ttcm(&self) -> TTCM_R
[src]
Bit 7 - TTCM
pub fn abom(&self) -> ABOM_R
[src]
Bit 6 - ABOM
pub fn awum(&self) -> AWUM_R
[src]
Bit 5 - AWUM
pub fn nart(&self) -> NART_R
[src]
Bit 4 - NART
pub fn rflm(&self) -> RFLM_R
[src]
Bit 3 - RFLM
pub fn txfp(&self) -> TXFP_R
[src]
Bit 2 - TXFP
pub fn sleep(&self) -> SLEEP_R
[src]
Bit 1 - SLEEP
pub fn inrq(&self) -> INRQ_R
[src]
Bit 0 - INRQ
impl R<u32, Reg<u32, _MSR>>
[src]
pub fn rx(&self) -> RX_R
[src]
Bit 11 - RX
pub fn samp(&self) -> SAMP_R
[src]
Bit 10 - SAMP
pub fn rxm(&self) -> RXM_R
[src]
Bit 9 - RXM
pub fn txm(&self) -> TXM_R
[src]
Bit 8 - TXM
pub fn slaki(&self) -> SLAKI_R
[src]
Bit 4 - SLAKI
pub fn wkui(&self) -> WKUI_R
[src]
Bit 3 - WKUI
pub fn erri(&self) -> ERRI_R
[src]
Bit 2 - ERRI
pub fn slak(&self) -> SLAK_R
[src]
Bit 1 - SLAK
pub fn inak(&self) -> INAK_R
[src]
Bit 0 - INAK
impl R<u32, Reg<u32, _TSR>>
[src]
pub fn low2(&self) -> LOW2_R
[src]
Bit 31 - Lowest priority flag for mailbox 2
pub fn low1(&self) -> LOW1_R
[src]
Bit 30 - Lowest priority flag for mailbox 1
pub fn low0(&self) -> LOW0_R
[src]
Bit 29 - Lowest priority flag for mailbox 0
pub fn tme2(&self) -> TME2_R
[src]
Bit 28 - Lowest priority flag for mailbox 2
pub fn tme1(&self) -> TME1_R
[src]
Bit 27 - Lowest priority flag for mailbox 1
pub fn tme0(&self) -> TME0_R
[src]
Bit 26 - Lowest priority flag for mailbox 0
pub fn code(&self) -> CODE_R
[src]
Bits 24:25 - CODE
pub fn abrq2(&self) -> ABRQ2_R
[src]
Bit 23 - ABRQ2
pub fn terr2(&self) -> TERR2_R
[src]
Bit 19 - TERR2
pub fn alst2(&self) -> ALST2_R
[src]
Bit 18 - ALST2
pub fn txok2(&self) -> TXOK2_R
[src]
Bit 17 - TXOK2
pub fn rqcp2(&self) -> RQCP2_R
[src]
Bit 16 - RQCP2
pub fn abrq1(&self) -> ABRQ1_R
[src]
Bit 15 - ABRQ1
pub fn terr1(&self) -> TERR1_R
[src]
Bit 11 - TERR1
pub fn alst1(&self) -> ALST1_R
[src]
Bit 10 - ALST1
pub fn txok1(&self) -> TXOK1_R
[src]
Bit 9 - TXOK1
pub fn rqcp1(&self) -> RQCP1_R
[src]
Bit 8 - RQCP1
pub fn abrq0(&self) -> ABRQ0_R
[src]
Bit 7 - ABRQ0
pub fn terr0(&self) -> TERR0_R
[src]
Bit 3 - TERR0
pub fn alst0(&self) -> ALST0_R
[src]
Bit 2 - ALST0
pub fn txok0(&self) -> TXOK0_R
[src]
Bit 1 - TXOK0
pub fn rqcp0(&self) -> RQCP0_R
[src]
Bit 0 - RQCP0
impl R<bool, RFOM_A>
[src]
pub fn variant(&self) -> Variant<bool, RFOM_A>
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
impl R<bool, FOVR_A>
[src]
pub fn variant(&self) -> FOVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, FULL_A>
[src]
pub fn variant(&self) -> FULL_A
[src]
Get enumerated values variant
pub fn is_not_full(&self) -> bool
[src]
Checks if the value of the field is NOTFULL
pub fn is_full(&self) -> bool
[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _RFR>>
[src]
pub fn rfom(&self) -> RFOM_R
[src]
Bit 5 - RFOM0
pub fn fovr(&self) -> FOVR_R
[src]
Bit 4 - FOVR0
pub fn full(&self) -> FULL_R
[src]
Bit 3 - FULL0
pub fn fmp(&self) -> FMP_R
[src]
Bits 0:1 - FMP0
impl R<bool, SLKIE_A>
[src]
pub fn variant(&self) -> SLKIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUIE_A>
[src]
pub fn variant(&self) -> WKUIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LECIE_A>
[src]
pub fn variant(&self) -> LECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFIE_A>
[src]
pub fn variant(&self) -> BOFIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EPVIE_A>
[src]
pub fn variant(&self) -> EPVIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EWGIE_A>
[src]
pub fn variant(&self) -> EWGIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE1_A>
[src]
pub fn variant(&self) -> FOVIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE1_A>
[src]
pub fn variant(&self) -> FFIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE1_A>
[src]
pub fn variant(&self) -> FMPIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE0_A>
[src]
pub fn variant(&self) -> FOVIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE0_A>
[src]
pub fn variant(&self) -> FFIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE0_A>
[src]
pub fn variant(&self) -> FMPIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TMEIE_A>
[src]
pub fn variant(&self) -> TMEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _IER>>
[src]
pub fn slkie(&self) -> SLKIE_R
[src]
Bit 17 - SLKIE
pub fn wkuie(&self) -> WKUIE_R
[src]
Bit 16 - WKUIE
pub fn errie(&self) -> ERRIE_R
[src]
Bit 15 - ERRIE
pub fn lecie(&self) -> LECIE_R
[src]
Bit 11 - LECIE
pub fn bofie(&self) -> BOFIE_R
[src]
Bit 10 - BOFIE
pub fn epvie(&self) -> EPVIE_R
[src]
Bit 9 - EPVIE
pub fn ewgie(&self) -> EWGIE_R
[src]
Bit 8 - EWGIE
pub fn fovie1(&self) -> FOVIE1_R
[src]
Bit 6 - FOVIE1
pub fn ffie1(&self) -> FFIE1_R
[src]
Bit 5 - FFIE1
pub fn fmpie1(&self) -> FMPIE1_R
[src]
Bit 4 - FMPIE1
pub fn fovie0(&self) -> FOVIE0_R
[src]
Bit 3 - FOVIE0
pub fn ffie0(&self) -> FFIE0_R
[src]
Bit 2 - FFIE0
pub fn fmpie0(&self) -> FMPIE0_R
[src]
Bit 1 - FMPIE0
pub fn tmeie(&self) -> TMEIE_R
[src]
Bit 0 - TMEIE
impl R<u8, LEC_A>
[src]
pub fn variant(&self) -> LEC_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_stuff(&self) -> bool
[src]
Checks if the value of the field is STUFF
pub fn is_form(&self) -> bool
[src]
Checks if the value of the field is FORM
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
pub fn is_bit_recessive(&self) -> bool
[src]
Checks if the value of the field is BITRECESSIVE
pub fn is_bit_dominant(&self) -> bool
[src]
Checks if the value of the field is BITDOMINANT
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
pub fn is_custom(&self) -> bool
[src]
Checks if the value of the field is CUSTOM
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn rec(&self) -> REC_R
[src]
Bits 24:31 - REC
pub fn tec(&self) -> TEC_R
[src]
Bits 16:23 - TEC
pub fn lec(&self) -> LEC_R
[src]
Bits 4:6 - LEC
pub fn boff(&self) -> BOFF_R
[src]
Bit 2 - BOFF
pub fn epvf(&self) -> EPVF_R
[src]
Bit 1 - EPVF
pub fn ewgf(&self) -> EWGF_R
[src]
Bit 0 - EWGF
impl R<bool, SILM_A>
[src]
pub fn variant(&self) -> SILM_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_silent(&self) -> bool
[src]
Checks if the value of the field is SILENT
impl R<bool, LBKM_A>
[src]
pub fn variant(&self) -> LBKM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn silm(&self) -> SILM_R
[src]
Bit 31 - SILM
pub fn lbkm(&self) -> LBKM_R
[src]
Bit 30 - LBKM
pub fn sjw(&self) -> SJW_R
[src]
Bits 24:25 - SJW
pub fn ts2(&self) -> TS2_R
[src]
Bits 20:22 - TS2
pub fn ts1(&self) -> TS1_R
[src]
Bits 16:19 - TS1
pub fn brp(&self) -> BRP_R
[src]
Bits 0:9 - BRP
impl R<u32, Reg<u32, _FMR>>
[src]
impl R<u32, Reg<u32, _FM1R>>
[src]
pub fn fbm0(&self) -> FBM0_R
[src]
Bit 0 - Filter mode
pub fn fbm1(&self) -> FBM1_R
[src]
Bit 1 - Filter mode
pub fn fbm2(&self) -> FBM2_R
[src]
Bit 2 - Filter mode
pub fn fbm3(&self) -> FBM3_R
[src]
Bit 3 - Filter mode
pub fn fbm4(&self) -> FBM4_R
[src]
Bit 4 - Filter mode
pub fn fbm5(&self) -> FBM5_R
[src]
Bit 5 - Filter mode
pub fn fbm6(&self) -> FBM6_R
[src]
Bit 6 - Filter mode
pub fn fbm7(&self) -> FBM7_R
[src]
Bit 7 - Filter mode
pub fn fbm8(&self) -> FBM8_R
[src]
Bit 8 - Filter mode
pub fn fbm9(&self) -> FBM9_R
[src]
Bit 9 - Filter mode
pub fn fbm10(&self) -> FBM10_R
[src]
Bit 10 - Filter mode
pub fn fbm11(&self) -> FBM11_R
[src]
Bit 11 - Filter mode
pub fn fbm12(&self) -> FBM12_R
[src]
Bit 12 - Filter mode
pub fn fbm13(&self) -> FBM13_R
[src]
Bit 13 - Filter mode
impl R<u32, Reg<u32, _FS1R>>
[src]
pub fn fsc0(&self) -> FSC0_R
[src]
Bit 0 - Filter scale configuration
pub fn fsc1(&self) -> FSC1_R
[src]
Bit 1 - Filter scale configuration
pub fn fsc2(&self) -> FSC2_R
[src]
Bit 2 - Filter scale configuration
pub fn fsc3(&self) -> FSC3_R
[src]
Bit 3 - Filter scale configuration
pub fn fsc4(&self) -> FSC4_R
[src]
Bit 4 - Filter scale configuration
pub fn fsc5(&self) -> FSC5_R
[src]
Bit 5 - Filter scale configuration
pub fn fsc6(&self) -> FSC6_R
[src]
Bit 6 - Filter scale configuration
pub fn fsc7(&self) -> FSC7_R
[src]
Bit 7 - Filter scale configuration
pub fn fsc8(&self) -> FSC8_R
[src]
Bit 8 - Filter scale configuration
pub fn fsc9(&self) -> FSC9_R
[src]
Bit 9 - Filter scale configuration
pub fn fsc10(&self) -> FSC10_R
[src]
Bit 10 - Filter scale configuration
pub fn fsc11(&self) -> FSC11_R
[src]
Bit 11 - Filter scale configuration
pub fn fsc12(&self) -> FSC12_R
[src]
Bit 12 - Filter scale configuration
pub fn fsc13(&self) -> FSC13_R
[src]
Bit 13 - Filter scale configuration
impl R<u32, Reg<u32, _FFA1R>>
[src]
pub fn ffa0(&self) -> FFA0_R
[src]
Bit 0 - Filter FIFO assignment for filter 0
pub fn ffa1(&self) -> FFA1_R
[src]
Bit 1 - Filter FIFO assignment for filter 1
pub fn ffa2(&self) -> FFA2_R
[src]
Bit 2 - Filter FIFO assignment for filter 2
pub fn ffa3(&self) -> FFA3_R
[src]
Bit 3 - Filter FIFO assignment for filter 3
pub fn ffa4(&self) -> FFA4_R
[src]
Bit 4 - Filter FIFO assignment for filter 4
pub fn ffa5(&self) -> FFA5_R
[src]
Bit 5 - Filter FIFO assignment for filter 5
pub fn ffa6(&self) -> FFA6_R
[src]
Bit 6 - Filter FIFO assignment for filter 6
pub fn ffa7(&self) -> FFA7_R
[src]
Bit 7 - Filter FIFO assignment for filter 7
pub fn ffa8(&self) -> FFA8_R
[src]
Bit 8 - Filter FIFO assignment for filter 8
pub fn ffa9(&self) -> FFA9_R
[src]
Bit 9 - Filter FIFO assignment for filter 9
pub fn ffa10(&self) -> FFA10_R
[src]
Bit 10 - Filter FIFO assignment for filter 10
pub fn ffa11(&self) -> FFA11_R
[src]
Bit 11 - Filter FIFO assignment for filter 11
pub fn ffa12(&self) -> FFA12_R
[src]
Bit 12 - Filter FIFO assignment for filter 12
pub fn ffa13(&self) -> FFA13_R
[src]
Bit 13 - Filter FIFO assignment for filter 13
impl R<u32, Reg<u32, _FA1R>>
[src]
pub fn fact0(&self) -> FACT0_R
[src]
Bit 0 - Filter active
pub fn fact1(&self) -> FACT1_R
[src]
Bit 1 - Filter active
pub fn fact2(&self) -> FACT2_R
[src]
Bit 2 - Filter active
pub fn fact3(&self) -> FACT3_R
[src]
Bit 3 - Filter active
pub fn fact4(&self) -> FACT4_R
[src]
Bit 4 - Filter active
pub fn fact5(&self) -> FACT5_R
[src]
Bit 5 - Filter active
pub fn fact6(&self) -> FACT6_R
[src]
Bit 6 - Filter active
pub fn fact7(&self) -> FACT7_R
[src]
Bit 7 - Filter active
pub fn fact8(&self) -> FACT8_R
[src]
Bit 8 - Filter active
pub fn fact9(&self) -> FACT9_R
[src]
Bit 9 - Filter active
pub fn fact10(&self) -> FACT10_R
[src]
Bit 10 - Filter active
pub fn fact11(&self) -> FACT11_R
[src]
Bit 11 - Filter active
pub fn fact12(&self) -> FACT12_R
[src]
Bit 12 - Filter active
pub fn fact13(&self) -> FACT13_R
[src]
Bit 13 - Filter active
impl R<bool, EN1_A>
[src]
pub fn variant(&self) -> EN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFF1_A>
[src]
pub fn variant(&self) -> BOFF1_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, TEN1_A>
[src]
pub fn variant(&self) -> TEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL1_A>
[src]
pub fn variant(&self) -> Variant<u8, TSEL1_A>
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim3_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim15_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM15_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE1_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE1_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAEN1_A>
[src]
pub fn variant(&self) -> DMAEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL2_A>
[src]
pub fn variant(&self) -> TSEL2_A
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim8_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim5_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_tim4_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE2_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE2_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en1(&self) -> EN1_R
[src]
Bit 0 - DAC channel1 enable
pub fn boff1(&self) -> BOFF1_R
[src]
Bit 1 - DAC channel1 output buffer disable
pub fn ten1(&self) -> TEN1_R
[src]
Bit 2 - DAC channel1 trigger enable
pub fn tsel1(&self) -> TSEL1_R
[src]
Bits 3:5 - DAC channel1 trigger selection
pub fn wave1(&self) -> WAVE1_R
[src]
Bits 6:7 - DAC channel1 noise/triangle wave generation enable
pub fn mamp1(&self) -> MAMP1_R
[src]
Bits 8:11 - DAC channel1 mask/amplitude selector
pub fn dmaen1(&self) -> DMAEN1_R
[src]
Bit 12 - DAC channel1 DMA enable
pub fn en2(&self) -> EN2_R
[src]
Bit 16 - DAC channel2 enable
pub fn boff2(&self) -> BOFF2_R
[src]
Bit 17 - DAC channel2 output buffer disable
pub fn ten2(&self) -> TEN2_R
[src]
Bit 18 - DAC channel2 trigger enable
pub fn tsel2(&self) -> TSEL2_R
[src]
Bits 19:21 - DAC channel2 trigger selection
pub fn wave2(&self) -> WAVE2_R
[src]
Bits 22:23 - DAC channel2 noise/triangle wave generation enable
pub fn mamp2(&self) -> MAMP2_R
[src]
Bits 24:27 - DAC channel2 mask/amplitude selector
pub fn dmaen2(&self) -> DMAEN2_R
[src]
Bit 28 - DAC channel2 DMA enable
impl R<u32, Reg<u32, _DHR12R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:11 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 4:15 - DAC channel2 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:7 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 16:27 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12LD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 20:31 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR8RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 8:15 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DOR1>>
[src]
pub fn dacc1dor(&self) -> DACC1DOR_R
[src]
Bits 0:11 - DAC channel1 data output
impl R<u32, Reg<u32, _DOR2>>
[src]
pub fn dacc2dor(&self) -> DACC2DOR_R
[src]
Bits 0:11 - DAC channel2 data output
impl R<u32, Reg<u32, _IDCODE>>
[src]
pub fn dev_id(&self) -> DEV_ID_R
[src]
Bits 0:11 - DEV_ID
pub fn rev_id(&self) -> REV_ID_R
[src]
Bits 16:31 - REV_ID
impl R<u32, Reg<u32, _CR>>
[src]
pub fn dbg_sleep(&self) -> DBG_SLEEP_R
[src]
Bit 0 - DBG_SLEEP
pub fn dbg_stop(&self) -> DBG_STOP_R
[src]
Bit 1 - DBG_STOP
pub fn dbg_standby(&self) -> DBG_STANDBY_R
[src]
Bit 2 - DBG_STANDBY
pub fn trace_ioen(&self) -> TRACE_IOEN_R
[src]
Bit 5 - TRACE_IOEN
pub fn trace_mode(&self) -> TRACE_MODE_R
[src]
Bits 6:7 - TRACE_MODE
pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R
[src]
Bit 8 - DBG_IWDG_STOP
pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R
[src]
Bit 9 - DBG_WWDG_STOP
pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R
[src]
Bit 10 - DBG_TIM1_STOP
pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R
[src]
Bit 11 - DBG_TIM2_STOP
pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R
[src]
Bit 12 - DBG_TIM3_STOP
pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R
[src]
Bit 13 - DBG_TIM4_STOP
pub fn dbg_can1_stop(&self) -> DBG_CAN1_STOP_R
[src]
Bit 14 - DBG_CAN1_STOP
pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R
[src]
Bit 15 - DBG_I2C1_SMBUS_TIMEOUT
pub fn dbg_i2c2_smbus_timeout(&self) -> DBG_I2C2_SMBUS_TIMEOUT_R
[src]
Bit 16 - DBG_I2C2_SMBUS_TIMEOUT
pub fn dbg_tim8_stop(&self) -> DBG_TIM8_STOP_R
[src]
Bit 17 - DBG_TIM8_STOP
pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R
[src]
Bit 18 - DBG_TIM5_STOP
pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R
[src]
Bit 19 - DBG_TIM6_STOP
pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R
[src]
Bit 20 - DBG_TIM7_STOP
pub fn dbg_can2_stop(&self) -> DBG_CAN2_STOP_R
[src]
Bit 21 - DBG_CAN2_STOP
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - DIV_Fraction
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - DIV_Mantissa
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> Variant<u8, STOP_A>
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _IDR>>
[src]
impl R<u8, LATENCY_A>
[src]
pub fn variant(&self) -> Variant<u8, LATENCY_A>
[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool
[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool
[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool
[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _ACR>>
[src]
pub fn latency(&self) -> LATENCY_R
[src]
Bits 0:2 - Latency
pub fn hlfcya(&self) -> HLFCYA_R
[src]
Bit 3 - Flash half cycle access enable
pub fn prftbe(&self) -> PRFTBE_R
[src]
Bit 4 - Prefetch buffer enable
pub fn prftbs(&self) -> PRFTBS_R
[src]
Bit 5 - Prefetch buffer status
impl R<u32, Reg<u32, _SR>>
[src]
pub fn eop(&self) -> EOP_R
[src]
Bit 5 - End of operation
pub fn wrprterr(&self) -> WRPRTERR_R
[src]
Bit 4 - Write protection error
pub fn pgerr(&self) -> PGERR_R
[src]
Bit 2 - Programming error
pub fn bsy(&self) -> BSY_R
[src]
Bit 0 - Busy
impl R<u32, Reg<u32, _CR>>
[src]
pub fn pg(&self) -> PG_R
[src]
Bit 0 - Programming
pub fn per(&self) -> PER_R
[src]
Bit 1 - Page Erase
pub fn mer(&self) -> MER_R
[src]
Bit 2 - Mass Erase
pub fn optpg(&self) -> OPTPG_R
[src]
Bit 4 - Option byte programming
pub fn opter(&self) -> OPTER_R
[src]
Bit 5 - Option byte erase
pub fn strt(&self) -> STRT_R
[src]
Bit 6 - Start
pub fn lock(&self) -> LOCK_R
[src]
Bit 7 - Lock
pub fn optwre(&self) -> OPTWRE_R
[src]
Bit 9 - Option bytes write enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 10 - Error interrupt enable
pub fn eopie(&self) -> EOPIE_R
[src]
Bit 12 - End of operation interrupt enable
impl R<u32, Reg<u32, _OBR>>
[src]
pub fn opterr(&self) -> OPTERR_R
[src]
Bit 0 - Option byte error
pub fn rdprt(&self) -> RDPRT_R
[src]
Bit 1 - Read protection
pub fn wdg_sw(&self) -> WDG_SW_R
[src]
Bit 2 - WDG_SW
pub fn n_rst_stop(&self) -> NRST_STOP_R
[src]
Bit 3 - nRST_STOP
pub fn n_rst_stdby(&self) -> NRST_STDBY_R
[src]
Bit 4 - nRST_STDBY
pub fn data0(&self) -> DATA0_R
[src]
Bits 10:17 - Data0
pub fn data1(&self) -> DATA1_R
[src]
Bits 18:25 - Data1
impl R<u32, Reg<u32, _WRPR>>
[src]
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EPR>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<bool, FRES_A>
[src]
pub fn variant(&self) -> FRES_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, PDWN_A>
[src]
pub fn variant(&self) -> PDWN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LPMODE_A>
[src]
pub fn variant(&self) -> LPMODE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FSUSP_A>
[src]
pub fn variant(&self) -> FSUSP_A
[src]
Get enumerated values variant
pub fn is_no_effect(&self) -> bool
[src]
Checks if the value of the field is NOEFFECT
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, RESUME_A>
[src]
pub fn variant(&self) -> Variant<bool, RESUME_A>
[src]
Get enumerated values variant
pub fn is_requested(&self) -> bool
[src]
Checks if the value of the field is REQUESTED
impl R<bool, ESOFM_A>
[src]
pub fn variant(&self) -> ESOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SOFM_A>
[src]
pub fn variant(&self) -> SOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RESETM_A>
[src]
pub fn variant(&self) -> RESETM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SUSPM_A>
[src]
pub fn variant(&self) -> SUSPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUPM_A>
[src]
pub fn variant(&self) -> WKUPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRM_A>
[src]
pub fn variant(&self) -> ERRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PMAOVRM_A>
[src]
pub fn variant(&self) -> PMAOVRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTRM_A>
[src]
pub fn variant(&self) -> CTRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CNTR>>
[src]
pub fn fres(&self) -> FRES_R
[src]
Bit 0 - Force USB Reset
pub fn pdwn(&self) -> PDWN_R
[src]
Bit 1 - Power down
pub fn lpmode(&self) -> LPMODE_R
[src]
Bit 2 - Low-power mode
pub fn fsusp(&self) -> FSUSP_R
[src]
Bit 3 - Force suspend
pub fn resume(&self) -> RESUME_R
[src]
Bit 4 - Resume request
pub fn esofm(&self) -> ESOFM_R
[src]
Bit 8 - Expected start of frame interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 9 - Start of frame interrupt mask
pub fn resetm(&self) -> RESETM_R
[src]
Bit 10 - USB reset interrupt mask
pub fn suspm(&self) -> SUSPM_R
[src]
Bit 11 - Suspend mode interrupt mask
pub fn wkupm(&self) -> WKUPM_R
[src]
Bit 12 - Wakeup interrupt mask
pub fn errm(&self) -> ERRM_R
[src]
Bit 13 - Error interrupt mask
pub fn pmaovrm(&self) -> PMAOVRM_R
[src]
Bit 14 - Packet memory area over / underrun interrupt mask
pub fn ctrm(&self) -> CTRM_R
[src]
Bit 15 - Correct transfer interrupt mask
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_to(&self) -> bool
[src]
Checks if the value of the field is TO
pub fn is_from(&self) -> bool
[src]
Checks if the value of the field is FROM
impl R<bool, ESOF_A>
[src]
pub fn variant(&self) -> Variant<bool, ESOF_A>
[src]
Get enumerated values variant
pub fn is_expected_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is EXPECTEDSTARTOFFRAME
impl R<bool, SOF_A>
[src]
pub fn variant(&self) -> Variant<bool, SOF_A>
[src]
Get enumerated values variant
pub fn is_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is STARTOFFRAME
impl R<bool, RESET_A>
[src]
pub fn variant(&self) -> Variant<bool, RESET_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, SUSP_A>
[src]
pub fn variant(&self) -> Variant<bool, SUSP_A>
[src]
Get enumerated values variant
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, WKUP_A>
[src]
pub fn variant(&self) -> Variant<bool, WKUP_A>
[src]
Get enumerated values variant
pub fn is_wakeup(&self) -> bool
[src]
Checks if the value of the field is WAKEUP
impl R<bool, ERR_A>
[src]
pub fn variant(&self) -> Variant<bool, ERR_A>
[src]
Get enumerated values variant
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, PMAOVR_A>
[src]
pub fn variant(&self) -> Variant<bool, PMAOVR_A>
[src]
Get enumerated values variant
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, CTR_A>
[src]
pub fn variant(&self) -> Variant<bool, CTR_A>
[src]
Get enumerated values variant
pub fn is_completed(&self) -> bool
[src]
Checks if the value of the field is COMPLETED
impl R<u32, Reg<u32, _ISTR>>
[src]
pub fn ep_id(&self) -> EP_ID_R
[src]
Bits 0:3 - Endpoint Identifier
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction of transaction
pub fn esof(&self) -> ESOF_R
[src]
Bit 8 - Expected start frame
pub fn sof(&self) -> SOF_R
[src]
Bit 9 - start of frame
pub fn reset(&self) -> RESET_R
[src]
Bit 10 - reset request
pub fn susp(&self) -> SUSP_R
[src]
Bit 11 - Suspend mode request
pub fn wkup(&self) -> WKUP_R
[src]
Bit 12 - Wakeup
pub fn err(&self) -> ERR_R
[src]
Bit 13 - Error
pub fn pmaovr(&self) -> PMAOVR_R
[src]
Bit 14 - Packet memory area over / underrun
pub fn ctr(&self) -> CTR_R
[src]
Bit 15 - Correct transfer
impl R<bool, LCK_A>
[src]
pub fn variant(&self) -> Variant<bool, LCK_A>
[src]
Get enumerated values variant
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, RXDM_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDM_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<bool, RXDP_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDP_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<u32, Reg<u32, _FNR>>
[src]
pub fn fn_(&self) -> FN_R
[src]
Bits 0:10 - Frame number
pub fn lsof(&self) -> LSOF_R
[src]
Bits 11:12 - Lost SOF
pub fn lck(&self) -> LCK_R
[src]
Bit 13 - Locked
pub fn rxdm(&self) -> RXDM_R
[src]
Bit 14 - Receive data - line status
pub fn rxdp(&self) -> RXDP_R
[src]
Bit 15 - Receive data + line status
impl R<bool, EF_A>
[src]
pub fn variant(&self) -> EF_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DADDR>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:6 - Device address
pub fn ef(&self) -> EF_R
[src]
Bit 7 - Enable function
impl R<u32, Reg<u32, _BTABLE>>
[src]
impl R<u32, Reg<u32, _FS_DCFG>>
[src]
pub fn dspd(&self) -> DSPD_R
[src]
Bits 0:1 - Device speed
pub fn nzlsohsk(&self) -> NZLSOHSK_R
[src]
Bit 2 - Non-zero-length status OUT handshake
pub fn dad(&self) -> DAD_R
[src]
Bits 4:10 - Device address
pub fn pfivl(&self) -> PFIVL_R
[src]
Bits 11:12 - Periodic frame interval
impl R<u32, Reg<u32, _FS_DCTL>>
[src]
pub fn rwusig(&self) -> RWUSIG_R
[src]
Bit 0 - Remote wakeup signaling
pub fn sdis(&self) -> SDIS_R
[src]
Bit 1 - Soft disconnect
pub fn ginsts(&self) -> GINSTS_R
[src]
Bit 2 - Global IN NAK status
pub fn gonsts(&self) -> GONSTS_R
[src]
Bit 3 - Global OUT NAK status
pub fn tctl(&self) -> TCTL_R
[src]
Bits 4:6 - Test control
pub fn sginak(&self) -> SGINAK_R
[src]
Bit 7 - Set global IN NAK
pub fn cginak(&self) -> CGINAK_R
[src]
Bit 8 - Clear global IN NAK
pub fn sgonak(&self) -> SGONAK_R
[src]
Bit 9 - Set global OUT NAK
pub fn cgonak(&self) -> CGONAK_R
[src]
Bit 10 - Clear global OUT NAK
pub fn poprgdne(&self) -> POPRGDNE_R
[src]
Bit 11 - Power-on programming done
impl R<u32, Reg<u32, _FS_DSTS>>
[src]
pub fn suspsts(&self) -> SUSPSTS_R
[src]
Bit 0 - Suspend status
pub fn enumspd(&self) -> ENUMSPD_R
[src]
Bits 1:2 - Enumerated speed
pub fn eerr(&self) -> EERR_R
[src]
Bit 3 - Erratic error
pub fn fnsof(&self) -> FNSOF_R
[src]
Bits 8:21 - Frame number of the received SOF
impl R<u32, Reg<u32, _FS_DIEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn tom(&self) -> TOM_R
[src]
Bit 3 - Timeout condition mask (Non-isochronous endpoints)
pub fn ittxfemsk(&self) -> ITTXFEMSK_R
[src]
Bit 4 - IN token received when TxFIFO empty mask
pub fn inepnmm(&self) -> INEPNMM_R
[src]
Bit 5 - IN token received with EP mismatch mask
pub fn inepnem(&self) -> INEPNEM_R
[src]
Bit 6 - IN endpoint NAK effective mask
impl R<u32, Reg<u32, _FS_DOEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn stupm(&self) -> STUPM_R
[src]
Bit 3 - SETUP phase done mask
pub fn otepdm(&self) -> OTEPDM_R
[src]
Bit 4 - OUT token received when endpoint disabled mask
impl R<u32, Reg<u32, _FS_DAINT>>
[src]
pub fn iepint(&self) -> IEPINT_R
[src]
Bits 0:15 - IN endpoint interrupt bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _FS_DAINTMSK>>
[src]
pub fn iepm(&self) -> IEPM_R
[src]
Bits 0:15 - IN EP interrupt mask bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _DVBUSDIS>>
[src]
impl R<u32, Reg<u32, _DVBUSPULSE>>
[src]
impl R<u32, Reg<u32, _DIEPEMPMSK>>
[src]
pub fn ineptxfem(&self) -> INEPTXFEM_R
[src]
Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits
impl R<u32, Reg<u32, _FS_DIEPCTL0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - Maximum packet size
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USB active endpoint
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAK status
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - STALL handshake
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TxFIFO number
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - Endpoint disable
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - Endpoint enable
impl R<u32, Reg<u32, _DIEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL0>>
[src]
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPINT0>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT1>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT2>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT3>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT0>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT1>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT2>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT3>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPTSIZ0>>
[src]
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:20 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ0>>
[src]
pub fn stupcnt(&self) -> STUPCNT_R
[src]
Bits 29:30 - SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bit 19 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ1>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ2>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ3>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DTXFSTS0>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS1>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS2>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS3>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DOEPTSIZ1>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ2>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ3>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _FS_GOTGCTL>>
[src]
pub fn srqscs(&self) -> SRQSCS_R
[src]
Bit 0 - Session request success
pub fn srq(&self) -> SRQ_R
[src]
Bit 1 - Session request
pub fn hngscs(&self) -> HNGSCS_R
[src]
Bit 8 - Host negotiation success
pub fn hnprq(&self) -> HNPRQ_R
[src]
Bit 9 - HNP request
pub fn hshnpen(&self) -> HSHNPEN_R
[src]
Bit 10 - Host set HNP enable
pub fn dhnpen(&self) -> DHNPEN_R
[src]
Bit 11 - Device HNP enabled
pub fn cidsts(&self) -> CIDSTS_R
[src]
Bit 16 - Connector ID status
pub fn dbct(&self) -> DBCT_R
[src]
Bit 17 - Long/short debounce time
pub fn asvld(&self) -> ASVLD_R
[src]
Bit 18 - A-session valid
pub fn bsvld(&self) -> BSVLD_R
[src]
Bit 19 - B-session valid
impl R<u32, Reg<u32, _FS_GOTGINT>>
[src]
pub fn sedet(&self) -> SEDET_R
[src]
Bit 2 - Session end detected
pub fn srsschg(&self) -> SRSSCHG_R
[src]
Bit 8 - Session request success status change
pub fn hnsschg(&self) -> HNSSCHG_R
[src]
Bit 9 - Host negotiation success status change
pub fn hngdet(&self) -> HNGDET_R
[src]
Bit 17 - Host negotiation detected
pub fn adtochg(&self) -> ADTOCHG_R
[src]
Bit 18 - A-device timeout change
pub fn dbcdne(&self) -> DBCDNE_R
[src]
Bit 19 - Debounce done
impl R<u32, Reg<u32, _FS_GAHBCFG>>
[src]
pub fn gint(&self) -> GINT_R
[src]
Bit 0 - Global interrupt mask
pub fn txfelvl(&self) -> TXFELVL_R
[src]
Bit 7 - TxFIFO empty level
pub fn ptxfelvl(&self) -> PTXFELVL_R
[src]
Bit 8 - Periodic TxFIFO empty level
impl R<u32, Reg<u32, _FS_GUSBCFG>>
[src]
pub fn tocal(&self) -> TOCAL_R
[src]
Bits 0:2 - FS timeout calibration
pub fn srpcap(&self) -> SRPCAP_R
[src]
Bit 8 - SRP-capable
pub fn hnpcap(&self) -> HNPCAP_R
[src]
Bit 9 - HNP-capable
pub fn trdt(&self) -> TRDT_R
[src]
Bits 10:13 - USB turnaround time
pub fn fhmod(&self) -> FHMOD_R
[src]
Bit 29 - Force host mode
pub fn fdmod(&self) -> FDMOD_R
[src]
Bit 30 - Force device mode
pub fn ctxpkt(&self) -> CTXPKT_R
[src]
Bit 31 - Corrupt Tx packet
impl R<u32, Reg<u32, _FS_GRSTCTL>>
[src]
pub fn csrst(&self) -> CSRST_R
[src]
Bit 0 - Core soft reset
pub fn hsrst(&self) -> HSRST_R
[src]
Bit 1 - HCLK soft reset
pub fn fcrst(&self) -> FCRST_R
[src]
Bit 2 - Host frame counter reset
pub fn rxfflsh(&self) -> RXFFLSH_R
[src]
Bit 4 - RxFIFO flush
pub fn txfflsh(&self) -> TXFFLSH_R
[src]
Bit 5 - TxFIFO flush
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 6:10 - TxFIFO number
pub fn ahbidl(&self) -> AHBIDL_R
[src]
Bit 31 - AHB master idle
impl R<u32, Reg<u32, _FS_GINTSTS>>
[src]
pub fn cmod(&self) -> CMOD_R
[src]
Bit 0 - Current mode of operation
pub fn mmis(&self) -> MMIS_R
[src]
Bit 1 - Mode mismatch interrupt
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt
pub fn sof(&self) -> SOF_R
[src]
Bit 3 - Start of frame
pub fn rxflvl(&self) -> RXFLVL_R
[src]
Bit 4 - RxFIFO non-empty
pub fn nptxfe(&self) -> NPTXFE_R
[src]
Bit 5 - Non-periodic TxFIFO empty
pub fn ginakeff(&self) -> GINAKEFF_R
[src]
Bit 6 - Global IN non-periodic NAK effective
pub fn goutnakeff(&self) -> GOUTNAKEFF_R
[src]
Bit 7 - Global OUT NAK effective
pub fn esusp(&self) -> ESUSP_R
[src]
Bit 10 - Early suspend
pub fn usbsusp(&self) -> USBSUSP_R
[src]
Bit 11 - USB suspend
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset
pub fn enumdne(&self) -> ENUMDNE_R
[src]
Bit 13 - Enumeration done
pub fn isoodrp(&self) -> ISOODRP_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt
pub fn eopf(&self) -> EOPF_R
[src]
Bit 15 - End of periodic frame interrupt
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoint interrupt
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoint interrupt
pub fn iisoixfr(&self) -> IISOIXFR_R
[src]
Bit 20 - Incomplete isochronous IN transfer
pub fn ipxfr_incompisoout(&self) -> IPXFR_INCOMPISOOUT_R
[src]
Bit 21 - Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)
pub fn hprtint(&self) -> HPRTINT_R
[src]
Bit 24 - Host port interrupt
pub fn hcint(&self) -> HCINT_R
[src]
Bit 25 - Host channels interrupt
pub fn ptxfe(&self) -> PTXFE_R
[src]
Bit 26 - Periodic TxFIFO empty
pub fn cidschg(&self) -> CIDSCHG_R
[src]
Bit 28 - Connector ID status change
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt
pub fn srqint(&self) -> SRQINT_R
[src]
Bit 30 - Session request/new session detected interrupt
pub fn wkupint(&self) -> WKUPINT_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt
impl R<u32, Reg<u32, _FS_GINTMSK>>
[src]
pub fn mmism(&self) -> MMISM_R
[src]
Bit 1 - Mode mismatch interrupt mask
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 3 - Start of frame mask
pub fn rxflvlm(&self) -> RXFLVLM_R
[src]
Bit 4 - Receive FIFO non-empty mask
pub fn nptxfem(&self) -> NPTXFEM_R
[src]
Bit 5 - Non-periodic TxFIFO empty mask
pub fn ginakeffm(&self) -> GINAKEFFM_R
[src]
Bit 6 - Global non-periodic IN NAK effective mask
pub fn gonakeffm(&self) -> GONAKEFFM_R
[src]
Bit 7 - Global OUT NAK effective mask
pub fn esuspm(&self) -> ESUSPM_R
[src]
Bit 10 - Early suspend mask
pub fn usbsuspm(&self) -> USBSUSPM_R
[src]
Bit 11 - USB suspend mask
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset mask
pub fn enumdnem(&self) -> ENUMDNEM_R
[src]
Bit 13 - Enumeration done mask
pub fn isoodrpm(&self) -> ISOODRPM_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt mask
pub fn eopfm(&self) -> EOPFM_R
[src]
Bit 15 - End of periodic frame interrupt mask
pub fn epmism(&self) -> EPMISM_R
[src]
Bit 17 - Endpoint mismatch interrupt mask
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoints interrupt mask
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoints interrupt mask
pub fn iisoixfrm(&self) -> IISOIXFRM_R
[src]
Bit 20 - Incomplete isochronous IN transfer mask
pub fn ipxfrm_iisooxfrm(&self) -> IPXFRM_IISOOXFRM_R
[src]
Bit 21 - Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)
pub fn prtim(&self) -> PRTIM_R
[src]
Bit 24 - Host port interrupt mask
pub fn hcim(&self) -> HCIM_R
[src]
Bit 25 - Host channels interrupt mask
pub fn ptxfem(&self) -> PTXFEM_R
[src]
Bit 26 - Periodic TxFIFO empty mask
pub fn cidschgm(&self) -> CIDSCHGM_R
[src]
Bit 28 - Connector ID status change mask
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt mask
pub fn srqim(&self) -> SRQIM_R
[src]
Bit 30 - Session request/new session detected interrupt mask
pub fn wuim(&self) -> WUIM_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt mask
impl R<u32, Reg<u32, _FS_GRXSTSR_DEVICE>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXSTSR_HOST>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXFSIZ>>
[src]
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_DEVICE>>
[src]
pub fn tx0fsa(&self) -> TX0FSA_R
[src]
Bits 0:15 - Endpoint 0 transmit RAM start address
pub fn tx0fd(&self) -> TX0FD_R
[src]
Bits 16:31 - Endpoint 0 TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_HOST>>
[src]
pub fn nptxfsa(&self) -> NPTXFSA_R
[src]
Bits 0:15 - Non-periodic transmit RAM start address
pub fn nptxfd(&self) -> NPTXFD_R
[src]
Bits 16:31 - Non-periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXSTS>>
[src]
pub fn nptxfsav(&self) -> NPTXFSAV_R
[src]
Bits 0:15 - Non-periodic TxFIFO space available
pub fn nptqxsav(&self) -> NPTQXSAV_R
[src]
Bits 16:23 - Non-periodic transmit request queue space available
pub fn nptxqtop(&self) -> NPTXQTOP_R
[src]
Bits 24:30 - Top of the non-periodic transmit request queue
impl R<u32, Reg<u32, _FS_GCCFG>>
[src]
pub fn pwrdwn(&self) -> PWRDWN_R
[src]
Bit 16 - Power down
pub fn vbusasen(&self) -> VBUSASEN_R
[src]
Bit 18 - Enable the VBUS sensing device
pub fn vbusbsen(&self) -> VBUSBSEN_R
[src]
Bit 19 - Enable the VBUS sensing device
pub fn sofouten(&self) -> SOFOUTEN_R
[src]
Bit 20 - SOF output enable
impl R<u32, Reg<u32, _FS_CID>>
[src]
pub fn product_id(&self) -> PRODUCT_ID_R
[src]
Bits 0:31 - Product ID field
impl R<u32, Reg<u32, _FS_HPTXFSIZ>>
[src]
pub fn ptxsa(&self) -> PTXSA_R
[src]
Bits 0:15 - Host periodic TxFIFO start address
pub fn ptxfsiz(&self) -> PTXFSIZ_R
[src]
Bits 16:31 - Host periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF1>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO2 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF2>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO3 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF3>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO4 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_HCFG>>
[src]
pub fn fslspcs(&self) -> FSLSPCS_R
[src]
Bits 0:1 - FS/LS PHY clock select
pub fn fslss(&self) -> FSLSS_R
[src]
Bit 2 - FS- and LS-only support
impl R<u32, Reg<u32, _HFIR>>
[src]
impl R<u32, Reg<u32, _FS_HFNUM>>
[src]
pub fn frnum(&self) -> FRNUM_R
[src]
Bits 0:15 - Frame number
pub fn ftrem(&self) -> FTREM_R
[src]
Bits 16:31 - Frame time remaining
impl R<u32, Reg<u32, _FS_HPTXSTS>>
[src]
pub fn ptxfsavl(&self) -> PTXFSAVL_R
[src]
Bits 0:15 - Periodic transmit data FIFO space available
pub fn ptxqsav(&self) -> PTXQSAV_R
[src]
Bits 16:23 - Periodic transmit request queue space available
pub fn ptxqtop(&self) -> PTXQTOP_R
[src]
Bits 24:31 - Top of the periodic transmit request queue
impl R<u32, Reg<u32, _HAINT>>
[src]
impl R<u32, Reg<u32, _HAINTMSK>>
[src]
impl R<u32, Reg<u32, _FS_HPRT>>
[src]
pub fn pcsts(&self) -> PCSTS_R
[src]
Bit 0 - Port connect status
pub fn pcdet(&self) -> PCDET_R
[src]
Bit 1 - Port connect detected
pub fn pena(&self) -> PENA_R
[src]
Bit 2 - Port enable
pub fn penchng(&self) -> PENCHNG_R
[src]
Bit 3 - Port enable/disable change
pub fn poca(&self) -> POCA_R
[src]
Bit 4 - Port overcurrent active
pub fn pocchng(&self) -> POCCHNG_R
[src]
Bit 5 - Port overcurrent change
pub fn pres(&self) -> PRES_R
[src]
Bit 6 - Port resume
pub fn psusp(&self) -> PSUSP_R
[src]
Bit 7 - Port suspend
pub fn prst(&self) -> PRST_R
[src]
Bit 8 - Port reset
pub fn plsts(&self) -> PLSTS_R
[src]
Bits 10:11 - Port line status
pub fn ppwr(&self) -> PPWR_R
[src]
Bit 12 - Port power
pub fn ptctl(&self) -> PTCTL_R
[src]
Bits 13:16 - Port test control
pub fn pspd(&self) -> PSPD_R
[src]
Bits 17:18 - Port speed
impl R<u32, Reg<u32, _FS_HCCHAR0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR1>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR2>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR3>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR4>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR5>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR6>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR7>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCINT0>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT1>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT2>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT3>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT4>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT5>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT6>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT7>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINTMSK0>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK1>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK2>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK3>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK4>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK5>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK6>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK7>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCTSIZ0>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ1>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ2>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ3>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ4>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ5>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ6>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ7>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_PCGCCTL>>
[src]
pub fn stppclk(&self) -> STPPCLK_R
[src]
Bit 0 - Stop PHY clock
pub fn gatehclk(&self) -> GATEHCLK_R
[src]
Bit 1 - Gate HCLK
pub fn physusp(&self) -> PHYSUSP_R
[src]
Bit 4 - PHY Suspended
impl R<u32, Reg<u32, _MMCCR>>
[src]
pub fn cr(&self) -> CR_R
[src]
Bit 0 - Counter reset
pub fn csr(&self) -> CSR_R
[src]
Bit 1 - Counter stop rollover
pub fn ror(&self) -> ROR_R
[src]
Bit 2 - Reset on read
pub fn mcf(&self) -> MCF_R
[src]
Bit 31 - MMC counter freeze
impl R<u32, Reg<u32, _MMCRIR>>
[src]
pub fn rfces(&self) -> RFCES_R
[src]
Bit 5 - Received frames CRC error status
pub fn rfaes(&self) -> RFAES_R
[src]
Bit 6 - Received frames alignment error status
pub fn rgufs(&self) -> RGUFS_R
[src]
Bit 17 - Received Good Unicast Frames Status
impl R<u32, Reg<u32, _MMCTIR>>
[src]
pub fn tgfscs(&self) -> TGFSCS_R
[src]
Bit 14 - Transmitted good frames single collision status
pub fn tgfmscs(&self) -> TGFMSCS_R
[src]
Bit 15 - Transmitted good frames more single collision status
pub fn tgfs(&self) -> TGFS_R
[src]
Bit 21 - Transmitted good frames status
impl R<u32, Reg<u32, _MMCRIMR>>
[src]
pub fn rfcem(&self) -> RFCEM_R
[src]
Bit 5 - Received frame CRC error mask
pub fn rfaem(&self) -> RFAEM_R
[src]
Bit 6 - Received frames alignment error mask
pub fn rgufm(&self) -> RGUFM_R
[src]
Bit 17 - Received good unicast frames mask
impl R<u32, Reg<u32, _MMCTIMR>>
[src]
pub fn tgfscm(&self) -> TGFSCM_R
[src]
Bit 14 - Transmitted good frames single collision mask
pub fn tgfmscm(&self) -> TGFMSCM_R
[src]
Bit 15 - Transmitted good frames more single collision mask
pub fn tgfm(&self) -> TGFM_R
[src]
Bit 21 - Transmitted good frames mask
impl R<u32, Reg<u32, _MMCTGFSCCR>>
[src]
pub fn tgfscc(&self) -> TGFSCC_R
[src]
Bits 0:31 - Transmitted good frames after a single collision counter
impl R<u32, Reg<u32, _MMCTGFMSCCR>>
[src]
pub fn tgfmscc(&self) -> TGFMSCC_R
[src]
Bits 0:31 - Transmitted good frames after more than a single collision counter
impl R<u32, Reg<u32, _MMCTGFCR>>
[src]
impl R<u32, Reg<u32, _MMCRFCECR>>
[src]
impl R<u32, Reg<u32, _MMCRFAECR>>
[src]
impl R<u32, Reg<u32, _MMCRGUFCR>>
[src]
impl R<u32, Reg<u32, _MACCR>>
[src]
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn dc(&self) -> DC_R
[src]
Bit 4 - Deferral check
pub fn bl(&self) -> BL_R
[src]
Bits 5:6 - Back-off limit
pub fn apcs(&self) -> APCS_R
[src]
Bit 7 - Automatic pad/CRC stripping
pub fn rd(&self) -> RD_R
[src]
Bit 9 - Retry disable
pub fn ipco(&self) -> IPCO_R
[src]
Bit 10 - IPv4 checksum offload
pub fn dm(&self) -> DM_R
[src]
Bit 11 - Duplex mode
pub fn lm(&self) -> LM_R
[src]
Bit 12 - Loopback mode
pub fn rod(&self) -> ROD_R
[src]
Bit 13 - Receive own disable
pub fn fes(&self) -> FES_R
[src]
Bit 14 - Fast Ethernet speed
pub fn csd(&self) -> CSD_R
[src]
Bit 16 - Carrier sense disable
pub fn ifg(&self) -> IFG_R
[src]
Bits 17:19 - Interframe gap
pub fn jd(&self) -> JD_R
[src]
Bit 22 - Jabber disable
pub fn wd(&self) -> WD_R
[src]
Bit 23 - Watchdog disable
impl R<u32, Reg<u32, _MACFFR>>
[src]
pub fn pm(&self) -> PM_R
[src]
Bit 0 - Promiscuous mode
pub fn hu(&self) -> HU_R
[src]
Bit 1 - Hash unicast
pub fn hm(&self) -> HM_R
[src]
Bit 2 - Hash multicast
pub fn daif(&self) -> DAIF_R
[src]
Bit 3 - Destination address inverse filtering
pub fn pam(&self) -> PAM_R
[src]
Bit 4 - Pass all multicast
pub fn bfd(&self) -> BFD_R
[src]
Bit 5 - Broadcast frames disable
pub fn pcf(&self) -> PCF_R
[src]
Bits 6:7 - Pass control frames
pub fn saif(&self) -> SAIF_R
[src]
Bit 8 - Source address inverse filtering
pub fn saf(&self) -> SAF_R
[src]
Bit 9 - Source address filter
pub fn hpf(&self) -> HPF_R
[src]
Bit 10 - Hash or perfect filter
pub fn ra(&self) -> RA_R
[src]
Bit 31 - Receive all
impl R<u32, Reg<u32, _MACHTHR>>
[src]
impl R<u32, Reg<u32, _MACHTLR>>
[src]
impl R<u32, Reg<u32, _MACMIIAR>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - MII busy
pub fn mw(&self) -> MW_R
[src]
Bit 1 - MII write
pub fn cr(&self) -> CR_R
[src]
Bits 2:4 - Clock range
pub fn mr(&self) -> MR_R
[src]
Bits 6:10 - MII register
pub fn pa(&self) -> PA_R
[src]
Bits 11:15 - PHY address
impl R<u32, Reg<u32, _MACMIIDR>>
[src]
impl R<u32, Reg<u32, _MACFCR>>
[src]
pub fn fcb_bpa(&self) -> FCB_BPA_R
[src]
Bit 0 - Flow control busy/back pressure activate
pub fn tfce(&self) -> TFCE_R
[src]
Bit 1 - Transmit flow control enable
pub fn rfce(&self) -> RFCE_R
[src]
Bit 2 - Receive flow control enable
pub fn upfd(&self) -> UPFD_R
[src]
Bit 3 - Unicast pause frame detect
pub fn plt(&self) -> PLT_R
[src]
Bits 4:5 - Pause low threshold
pub fn zqpd(&self) -> ZQPD_R
[src]
Bit 7 - Zero-quanta pause disable
pub fn pt(&self) -> PT_R
[src]
Bits 16:31 - Pass control frames
impl R<u32, Reg<u32, _MACVLANTR>>
[src]
pub fn vlanti(&self) -> VLANTI_R
[src]
Bits 0:15 - VLAN tag identifier (for receive frames)
pub fn vlantc(&self) -> VLANTC_R
[src]
Bit 16 - 12-bit VLAN tag comparison
impl R<u32, Reg<u32, _MACPMTCSR>>
[src]
pub fn pd(&self) -> PD_R
[src]
Bit 0 - Power down
pub fn mpe(&self) -> MPE_R
[src]
Bit 1 - Magic Packet enable
pub fn wfe(&self) -> WFE_R
[src]
Bit 2 - Wakeup frame enable
pub fn mpr(&self) -> MPR_R
[src]
Bit 5 - Magic packet received
pub fn wfr(&self) -> WFR_R
[src]
Bit 6 - Wakeup frame received
pub fn gu(&self) -> GU_R
[src]
Bit 9 - Global unicast
pub fn wffrpr(&self) -> WFFRPR_R
[src]
Bit 31 - Wakeup frame filter register pointer reset
impl R<u32, Reg<u32, _MACSR>>
[src]
pub fn pmts(&self) -> PMTS_R
[src]
Bit 3 - PMT status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 4 - MMC status
pub fn mmcrs(&self) -> MMCRS_R
[src]
Bit 5 - MMC receive status
pub fn mmcts(&self) -> MMCTS_R
[src]
Bit 6 - MMC transmit status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 9 - Time stamp trigger status
impl R<u32, Reg<u32, _MACIMR>>
[src]
pub fn pmtim(&self) -> PMTIM_R
[src]
Bit 3 - PMT interrupt mask
pub fn tstim(&self) -> TSTIM_R
[src]
Bit 9 - Time stamp trigger interrupt mask
impl R<u32, Reg<u32, _MACA0HR>>
[src]
pub fn maca0h(&self) -> MACA0H_R
[src]
Bits 0:15 - MAC address0 high
pub fn mo(&self) -> MO_R
[src]
Bit 31 - Always 1
impl R<u32, Reg<u32, _MACA0LR>>
[src]
impl R<u32, Reg<u32, _MACA1HR>>
[src]
pub fn maca1h(&self) -> MACA1H_R
[src]
Bits 0:15 - MAC address1 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA1LR>>
[src]
impl R<u32, Reg<u32, _MACA2HR>>
[src]
pub fn eth_maca2hr(&self) -> ETH_MACA2HR_R
[src]
Bits 0:15 - Ethernet MAC address 2 high register
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA2LR>>
[src]
impl R<u32, Reg<u32, _MACA3HR>>
[src]
pub fn maca3h(&self) -> MACA3H_R
[src]
Bits 0:15 - MAC address3 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA3LR>>
[src]
impl R<u32, Reg<u32, _PTPTSCR>>
[src]
pub fn tse(&self) -> TSE_R
[src]
Bit 0 - Time stamp enable
pub fn tsfcu(&self) -> TSFCU_R
[src]
Bit 1 - Time stamp fine or coarse update
pub fn tssti(&self) -> TSSTI_R
[src]
Bit 2 - Time stamp system time initialize
pub fn tsstu(&self) -> TSSTU_R
[src]
Bit 3 - Time stamp system time update
pub fn tsite(&self) -> TSITE_R
[src]
Bit 4 - Time stamp interrupt trigger enable
pub fn tsaru(&self) -> TSARU_R
[src]
Bit 5 - Time stamp addend register update
impl R<u32, Reg<u32, _PTPSSIR>>
[src]
impl R<u32, Reg<u32, _PTPTSHR>>
[src]
impl R<u32, Reg<u32, _PTPTSLR>>
[src]
pub fn stss(&self) -> STSS_R
[src]
Bits 0:30 - System time subseconds
pub fn stpns(&self) -> STPNS_R
[src]
Bit 31 - System time positive or negative sign
impl R<u32, Reg<u32, _PTPTSHUR>>
[src]
impl R<u32, Reg<u32, _PTPTSLUR>>
[src]
pub fn tsuss(&self) -> TSUSS_R
[src]
Bits 0:30 - Time stamp update subseconds
pub fn tsupns(&self) -> TSUPNS_R
[src]
Bit 31 - Time stamp update positive or negative sign
impl R<u32, Reg<u32, _PTPTSAR>>
[src]
impl R<u32, Reg<u32, _PTPTTHR>>
[src]
impl R<u32, Reg<u32, _PTPTTLR>>
[src]
impl R<u32, Reg<u32, _DMABMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 0 - Software reset
pub fn da(&self) -> DA_R
[src]
Bit 1 - DMA Arbitration
pub fn dsl(&self) -> DSL_R
[src]
Bits 2:6 - Descriptor skip length
pub fn pbl(&self) -> PBL_R
[src]
Bits 8:13 - Programmable burst length
pub fn rtpr(&self) -> RTPR_R
[src]
Bits 14:15 - Rx Tx priority ratio
pub fn fb(&self) -> FB_R
[src]
Bit 16 - Fixed burst
pub fn rdp(&self) -> RDP_R
[src]
Bits 17:22 - Rx DMA PBL
pub fn usp(&self) -> USP_R
[src]
Bit 23 - Use separate PBL
pub fn fpm(&self) -> FPM_R
[src]
Bit 24 - 4xPBL mode
pub fn aab(&self) -> AAB_R
[src]
Bit 25 - Address-aligned beats
impl R<u32, Reg<u32, _DMATPDR>>
[src]
impl R<u32, Reg<u32, _DMARPDR>>
[src]
impl R<u32, Reg<u32, _DMARDLAR>>
[src]
impl R<u32, Reg<u32, _DMATDLAR>>
[src]
impl R<u32, Reg<u32, _DMASR>>
[src]
pub fn ts(&self) -> TS_R
[src]
Bit 0 - Transmit status
pub fn tpss(&self) -> TPSS_R
[src]
Bit 1 - Transmit process stopped status
pub fn tbus(&self) -> TBUS_R
[src]
Bit 2 - Transmit buffer unavailable status
pub fn tjts(&self) -> TJTS_R
[src]
Bit 3 - Transmit jabber timeout status
pub fn ros(&self) -> ROS_R
[src]
Bit 4 - Receive overflow status
pub fn tus(&self) -> TUS_R
[src]
Bit 5 - Transmit underflow status
pub fn rs(&self) -> RS_R
[src]
Bit 6 - Receive status
pub fn rbus(&self) -> RBUS_R
[src]
Bit 7 - Receive buffer unavailable status
pub fn rpss(&self) -> RPSS_R
[src]
Bit 8 - Receive process stopped status
pub fn pwts(&self) -> PWTS_R
[src]
Bit 9 - Receive watchdog timeout status
pub fn ets(&self) -> ETS_R
[src]
Bit 10 - Early transmit status
pub fn fbes(&self) -> FBES_R
[src]
Bit 13 - Fatal bus error status
pub fn ers(&self) -> ERS_R
[src]
Bit 14 - Early receive status
pub fn ais(&self) -> AIS_R
[src]
Bit 15 - Abnormal interrupt summary
pub fn nis(&self) -> NIS_R
[src]
Bit 16 - Normal interrupt summary
pub fn rps(&self) -> RPS_R
[src]
Bits 17:19 - Receive process state
pub fn tps(&self) -> TPS_R
[src]
Bits 20:22 - Transmit process state
pub fn ebs(&self) -> EBS_R
[src]
Bits 23:25 - Error bits status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 27 - MMC status
pub fn pmts(&self) -> PMTS_R
[src]
Bit 28 - PMT status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 29 - Time stamp trigger status
impl R<u32, Reg<u32, _DMAOMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 1 - SR
pub fn osf(&self) -> OSF_R
[src]
Bit 2 - OSF
pub fn rtc(&self) -> RTC_R
[src]
Bits 3:4 - RTC
pub fn fugf(&self) -> FUGF_R
[src]
Bit 6 - FUGF
pub fn fef(&self) -> FEF_R
[src]
Bit 7 - FEF
pub fn st(&self) -> ST_R
[src]
Bit 13 - ST
pub fn ttc(&self) -> TTC_R
[src]
Bits 14:16 - TTC
pub fn ftf(&self) -> FTF_R
[src]
Bit 20 - FTF
pub fn tsf(&self) -> TSF_R
[src]
Bit 21 - TSF
pub fn dfrf(&self) -> DFRF_R
[src]
Bit 24 - DFRF
pub fn rsf(&self) -> RSF_R
[src]
Bit 25 - RSF
pub fn dtcefd(&self) -> DTCEFD_R
[src]
Bit 26 - DTCEFD
impl R<u32, Reg<u32, _DMAIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 0 - Transmit interrupt enable
pub fn tpsie(&self) -> TPSIE_R
[src]
Bit 1 - Transmit process stopped interrupt enable
pub fn tbuie(&self) -> TBUIE_R
[src]
Bit 2 - Transmit buffer unavailable interrupt enable
pub fn tjtie(&self) -> TJTIE_R
[src]
Bit 3 - Transmit jabber timeout interrupt enable
pub fn roie(&self) -> ROIE_R
[src]
Bit 4 - Overflow interrupt enable
pub fn tuie(&self) -> TUIE_R
[src]
Bit 5 - Underflow interrupt enable
pub fn rie(&self) -> RIE_R
[src]
Bit 6 - Receive interrupt enable
pub fn rbuie(&self) -> RBUIE_R
[src]
Bit 7 - Receive buffer unavailable interrupt enable
pub fn rpsie(&self) -> RPSIE_R
[src]
Bit 8 - Receive process stopped interrupt enable
pub fn rwtie(&self) -> RWTIE_R
[src]
Bit 9 - receive watchdog timeout interrupt enable
pub fn etie(&self) -> ETIE_R
[src]
Bit 10 - Early transmit interrupt enable
pub fn fbeie(&self) -> FBEIE_R
[src]
Bit 13 - Fatal bus error interrupt enable
pub fn erie(&self) -> ERIE_R
[src]
Bit 14 - Early receive interrupt enable
pub fn aise(&self) -> AISE_R
[src]
Bit 15 - Abnormal interrupt summary enable
pub fn nise(&self) -> NISE_R
[src]
Bit 16 - Normal interrupt summary enable
impl R<u32, Reg<u32, _DMAMFBOCR>>
[src]
pub fn mfc(&self) -> MFC_R
[src]
Bits 0:15 - Missed frames by the controller
pub fn omfc(&self) -> OMFC_R
[src]
Bit 16 - Overflow bit for missed frame counter
pub fn mfa(&self) -> MFA_R
[src]
Bits 17:27 - Missed frames by the application
pub fn ofoc(&self) -> OFOC_R
[src]
Bit 28 - Overflow bit for FIFO overflow counter
impl R<u32, Reg<u32, _DMACHTDR>>
[src]
impl R<u32, Reg<u32, _DMACHRDR>>
[src]
impl R<u32, Reg<u32, _DMACHTBAR>>
[src]
impl R<u32, Reg<u32, _DMACHRBAR>>
[src]
impl R<u32, Reg<u32, _ACTRL>>
[src]
pub fn disfold(&self) -> DISFOLD_R
[src]
Bit 2 - DISFOLD
pub fn fpexcodis(&self) -> FPEXCODIS_R
[src]
Bit 10 - FPEXCODIS
pub fn disramode(&self) -> DISRAMODE_R
[src]
Bit 11 - DISRAMODE
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R
[src]
Bit 12 - DISITMATBFLUSH
impl R<u32, Reg<u32, _STIR>>
[src]
impl R<u32, Reg<u32, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 0 - Counter enable
pub fn tickint(&self) -> TICKINT_R
[src]
Bit 1 - SysTick exception request enable
pub fn clksource(&self) -> CLKSOURCE_R
[src]
Bit 2 - Clock source selection
pub fn countflag(&self) -> COUNTFLAG_R
[src]
Bit 16 - COUNTFLAG
impl R<u32, Reg<u32, _LOAD_>>
[src]
impl R<u32, Reg<u32, _VAL>>
[src]
impl R<u32, Reg<u32, _CALIB>>
[src]
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim3cc1(&self) -> bool
[src]
Checks if the value of the field is TIM3CC1
pub fn is_tim2cc3(&self) -> bool
[src]
Checks if the value of the field is TIM2CC3
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim8cc1(&self) -> bool
[src]
Checks if the value of the field is TIM8CC1
pub fn is_tim8trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8TRGO
pub fn is_tim5cc1(&self) -> bool
[src]
Checks if the value of the field is TIM5CC1
pub fn is_tim5cc3(&self) -> bool
[src]
Checks if the value of the field is TIM5CC3
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim4cc3(&self) -> bool
[src]
Checks if the value of the field is TIM4CC3
pub fn is_tim8cc2(&self) -> bool
[src]
Checks if the value of the field is TIM8CC2
pub fn is_tim8cc4(&self) -> bool
[src]
Checks if the value of the field is TIM8CC4
pub fn is_tim5trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5TRGO
pub fn is_tim5cc4(&self) -> bool
[src]
Checks if the value of the field is TIM5CC4
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sample time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sample time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sample time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sample time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sample time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sample time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sample time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sample time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sample time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sample time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sample time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sample time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sample time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sample time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sample time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sample time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sample time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _JOFR>>
[src]
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, PDDS_A>
[src]
pub fn variant(&self) -> PDDS_A
[src]
Get enumerated values variant
pub fn is_stop_mode(&self) -> bool
[src]
Checks if the value of the field is STOP_MODE
pub fn is_standby_mode(&self) -> bool
[src]
Checks if the value of the field is STANDBY_MODE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn lpds(&self) -> LPDS_R
[src]
Bit 0 - Low Power Deep Sleep
pub fn pdds(&self) -> PDDS_R
[src]
Bit 1 - Power Down Deep Sleep
pub fn cwuf(&self) -> CWUF_R
[src]
Bit 2 - Clear Wake-up Flag
pub fn csbf(&self) -> CSBF_R
[src]
Bit 3 - Clear STANDBY Flag
pub fn pvde(&self) -> PVDE_R
[src]
Bit 4 - Power Voltage Detector Enable
pub fn pls(&self) -> PLS_R
[src]
Bits 5:7 - PVD Level Selection
pub fn dbp(&self) -> DBP_R
[src]
Bit 8 - Disable Backup Domain write protection
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn wuf(&self) -> WUF_R
[src]
Bit 0 - Wake-Up Flag
pub fn sbf(&self) -> SBF_R
[src]
Bit 1 - STANDBY Flag
pub fn pvdo(&self) -> PVDO_R
[src]
Bit 2 - PVD Output
pub fn ewup(&self) -> EWUP_R
[src]
Bit 8 - Enable WKUP pin
impl R<bool, HSION_A>
[src]
pub fn variant(&self) -> HSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, HSIRDY_A>
[src]
pub fn variant(&self) -> HSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, HSEBYP_A>
[src]
pub fn variant(&self) -> HSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<bool, CSSON_A>
[src]
pub fn variant(&self) -> CSSON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<u32, Reg<u32, _CR>>
[src]
pub fn hsion(&self) -> HSION_R
[src]
Bit 0 - Internal High Speed clock enable
pub fn hsirdy(&self) -> HSIRDY_R
[src]
Bit 1 - Internal High Speed clock ready flag
pub fn hsitrim(&self) -> HSITRIM_R
[src]
Bits 3:7 - Internal High Speed clock trimming
pub fn hsical(&self) -> HSICAL_R
[src]
Bits 8:15 - Internal High Speed clock Calibration
pub fn hseon(&self) -> HSEON_R
[src]
Bit 16 - External High Speed clock enable
pub fn hserdy(&self) -> HSERDY_R
[src]
Bit 17 - External High Speed clock ready flag
pub fn hsebyp(&self) -> HSEBYP_R
[src]
Bit 18 - External High Speed clock Bypass
pub fn csson(&self) -> CSSON_R
[src]
Bit 19 - Clock Security System enable
pub fn pllon(&self) -> PLLON_R
[src]
Bit 24 - PLL enable
pub fn pllrdy(&self) -> PLLRDY_R
[src]
Bit 25 - PLL clock ready flag
pub fn pll2on(&self) -> PLL2ON_R
[src]
Bit 26 - PLL2 enable
pub fn pll2rdy(&self) -> PLL2RDY_R
[src]
Bit 27 - PLL2 clock ready flag
pub fn pll3on(&self) -> PLL3ON_R
[src]
Bit 28 - PLL3 enable
pub fn pll3rdy(&self) -> PLL3RDY_R
[src]
Bit 29 - PLL3 clock ready flag
impl R<u8, SW_A>
[src]
pub fn variant(&self) -> Variant<u8, SW_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, SWS_A>
[src]
pub fn variant(&self) -> Variant<u8, SWS_A>
[src]
Get enumerated values variant
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
impl R<u8, HPRE_A>
[src]
pub fn variant(&self) -> Variant<u8, HPRE_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
impl R<u8, PPRE1_A>
[src]
pub fn variant(&self) -> Variant<u8, PPRE1_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPRE_A>
[src]
pub fn variant(&self) -> ADCPRE_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSRC_A>
[src]
pub fn variant(&self) -> PLLSRC_A
[src]
Get enumerated values variant
pub fn is_hsi_div2(&self) -> bool
[src]
Checks if the value of the field is HSI_DIV2
pub fn is_hse_div_prediv(&self) -> bool
[src]
Checks if the value of the field is HSE_DIV_PREDIV
impl R<bool, PLLXTPRE_A>
[src]
pub fn variant(&self) -> PLLXTPRE_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMUL_A>
[src]
pub fn variant(&self) -> Variant<u8, PLLMUL_A>
[src]
Get enumerated values variant
pub fn is_mul4(&self) -> bool
[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool
[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool
[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool
[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool
[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
[src]
Checks if the value of the field is MUL9
pub fn is_mul6_5(&self) -> bool
[src]
Checks if the value of the field is MUL6_5
impl R<bool, OTGFSPRE_A>
[src]
pub fn variant(&self) -> OTGFSPRE_A
[src]
Get enumerated values variant
pub fn is_div1_5(&self) -> bool
[src]
Checks if the value of the field is DIV1_5
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
impl R<u8, MCO_A>
[src]
pub fn variant(&self) -> Variant<u8, MCO_A>
[src]
Get enumerated values variant
pub fn is_no_mco(&self) -> bool
[src]
Checks if the value of the field is NOMCO
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_hsi(&self) -> bool
[src]
Checks if the value of the field is HSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll(&self) -> bool
[src]
Checks if the value of the field is PLL
pub fn is_pll2(&self) -> bool
[src]
Checks if the value of the field is PLL2
pub fn is_pll3(&self) -> bool
[src]
Checks if the value of the field is PLL3
pub fn is_xt1(&self) -> bool
[src]
Checks if the value of the field is XT1
pub fn is_pll3ethernet(&self) -> bool
[src]
Checks if the value of the field is PLL3ETHERNET
impl R<u32, Reg<u32, _CFGR>>
[src]
pub fn sw(&self) -> SW_R
[src]
Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
[src]
Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
[src]
Bits 4:7 - AHB prescaler
pub fn ppre1(&self) -> PPRE1_R
[src]
Bits 8:10 - APB Low speed prescaler (APB1)
pub fn ppre2(&self) -> PPRE2_R
[src]
Bits 11:13 - APB High speed prescaler (APB2)
pub fn adcpre(&self) -> ADCPRE_R
[src]
Bits 14:15 - ADC prescaler
pub fn pllsrc(&self) -> PLLSRC_R
[src]
Bit 16 - PLL entry clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
[src]
Bit 17 - HSE divider for PLL entry
pub fn pllmul(&self) -> PLLMUL_R
[src]
Bits 18:21 - PLL Multiplication Factor
pub fn otgfspre(&self) -> OTGFSPRE_R
[src]
Bit 22 - USB OTG FS prescaler
pub fn mco(&self) -> MCO_R
[src]
Bits 24:27 - Microcontroller clock output
impl R<bool, LSIRDYF_A>
[src]
pub fn variant(&self) -> LSIRDYF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CSSF_A>
[src]
pub fn variant(&self) -> CSSF_A
[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool
[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool
[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LSIRDYIE_A>
[src]
pub fn variant(&self) -> LSIRDYIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CIR>>
[src]
pub fn lsirdyf(&self) -> LSIRDYF_R
[src]
Bit 0 - LSI Ready Interrupt flag
pub fn lserdyf(&self) -> LSERDYF_R
[src]
Bit 1 - LSE Ready Interrupt flag
pub fn hsirdyf(&self) -> HSIRDYF_R
[src]
Bit 2 - HSI Ready Interrupt flag
pub fn hserdyf(&self) -> HSERDYF_R
[src]
Bit 3 - HSE Ready Interrupt flag
pub fn pllrdyf(&self) -> PLLRDYF_R
[src]
Bit 4 - PLL Ready Interrupt flag
pub fn pll2rdyf(&self) -> PLL2RDYF_R
[src]
Bit 5 - PLL2 Ready Interrupt flag
pub fn pll3rdyf(&self) -> PLL3RDYF_R
[src]
Bit 6 - PLL3 Ready Interrupt flag
pub fn cssf(&self) -> CSSF_R
[src]
Bit 7 - Clock Security System Interrupt flag
pub fn lsirdyie(&self) -> LSIRDYIE_R
[src]
Bit 8 - LSI Ready Interrupt Enable
pub fn lserdyie(&self) -> LSERDYIE_R
[src]
Bit 9 - LSE Ready Interrupt Enable
pub fn hsirdyie(&self) -> HSIRDYIE_R
[src]
Bit 10 - HSI Ready Interrupt Enable
pub fn hserdyie(&self) -> HSERDYIE_R
[src]
Bit 11 - HSE Ready Interrupt Enable
pub fn pllrdyie(&self) -> PLLRDYIE_R
[src]
Bit 12 - PLL Ready Interrupt Enable
pub fn pll2rdyie(&self) -> PLL2RDYIE_R
[src]
Bit 13 - PLL2 Ready Interrupt Enable
pub fn pll3rdyie(&self) -> PLL3RDYIE_R
[src]
Bit 14 - PLL3 Ready Interrupt Enable
impl R<bool, AFIORST_A>
[src]
pub fn variant(&self) -> Variant<bool, AFIORST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RSTR>>
[src]
pub fn afiorst(&self) -> AFIORST_R
[src]
Bit 0 - Alternate function I/O reset
pub fn ioparst(&self) -> IOPARST_R
[src]
Bit 2 - IO port A reset
pub fn iopbrst(&self) -> IOPBRST_R
[src]
Bit 3 - IO port B reset
pub fn iopcrst(&self) -> IOPCRST_R
[src]
Bit 4 - IO port C reset
pub fn iopdrst(&self) -> IOPDRST_R
[src]
Bit 5 - IO port D reset
pub fn ioperst(&self) -> IOPERST_R
[src]
Bit 6 - IO port E reset
pub fn adc1rst(&self) -> ADC1RST_R
[src]
Bit 9 - ADC 1 interface reset
pub fn adc2rst(&self) -> ADC2RST_R
[src]
Bit 10 - ADC 2 interface reset
pub fn tim1rst(&self) -> TIM1RST_R
[src]
Bit 11 - TIM1 timer reset
pub fn spi1rst(&self) -> SPI1RST_R
[src]
Bit 12 - SPI 1 reset
pub fn usart1rst(&self) -> USART1RST_R
[src]
Bit 14 - USART1 reset
impl R<bool, TIM2RST_A>
[src]
pub fn variant(&self) -> Variant<bool, TIM2RST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RSTR>>
[src]
pub fn tim2rst(&self) -> TIM2RST_R
[src]
Bit 0 - Timer 2 reset
pub fn tim3rst(&self) -> TIM3RST_R
[src]
Bit 1 - Timer 3 reset
pub fn tim4rst(&self) -> TIM4RST_R
[src]
Bit 2 - Timer 4 reset
pub fn tim5rst(&self) -> TIM5RST_R
[src]
Bit 3 - Timer 5 reset
pub fn tim6rst(&self) -> TIM6RST_R
[src]
Bit 4 - Timer 6 reset
pub fn tim7rst(&self) -> TIM7RST_R
[src]
Bit 5 - Timer 7 reset
pub fn wwdgrst(&self) -> WWDGRST_R
[src]
Bit 11 - Window watchdog reset
pub fn spi2rst(&self) -> SPI2RST_R
[src]
Bit 14 - SPI2 reset
pub fn spi3rst(&self) -> SPI3RST_R
[src]
Bit 15 - SPI3 reset
pub fn usart2rst(&self) -> USART2RST_R
[src]
Bit 17 - USART 2 reset
pub fn usart3rst(&self) -> USART3RST_R
[src]
Bit 18 - USART 3 reset
pub fn uart4rst(&self) -> UART4RST_R
[src]
Bit 19 - USART 4 reset
pub fn uart5rst(&self) -> UART5RST_R
[src]
Bit 20 - USART 5 reset
pub fn i2c1rst(&self) -> I2C1RST_R
[src]
Bit 21 - I2C1 reset
pub fn i2c2rst(&self) -> I2C2RST_R
[src]
Bit 22 - I2C2 reset
pub fn can1rst(&self) -> CAN1RST_R
[src]
Bit 25 - CAN1 reset
pub fn can2rst(&self) -> CAN2RST_R
[src]
Bit 26 - CAN2 reset
pub fn bkprst(&self) -> BKPRST_R
[src]
Bit 27 - Backup interface reset
pub fn pwrrst(&self) -> PWRRST_R
[src]
Bit 28 - Power interface reset
pub fn dacrst(&self) -> DACRST_R
[src]
Bit 29 - DAC interface reset
impl R<bool, DMA1EN_A>
[src]
pub fn variant(&self) -> DMA1EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBENR>>
[src]
pub fn dma1en(&self) -> DMA1EN_R
[src]
Bit 0 - DMA1 clock enable
pub fn dma2en(&self) -> DMA2EN_R
[src]
Bit 1 - DMA2 clock enable
pub fn sramen(&self) -> SRAMEN_R
[src]
Bit 2 - SRAM interface clock enable
pub fn flitfen(&self) -> FLITFEN_R
[src]
Bit 4 - FLITF clock enable
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 6 - CRC clock enable
pub fn otgfsen(&self) -> OTGFSEN_R
[src]
Bit 12 - USB OTG FS clock enable
pub fn ethmacen(&self) -> ETHMACEN_R
[src]
Bit 14 - Ethernet MAC clock enable
pub fn ethmactxen(&self) -> ETHMACTXEN_R
[src]
Bit 15 - Ethernet MAC TX clock enable
pub fn ethmacrxen(&self) -> ETHMACRXEN_R
[src]
Bit 16 - Ethernet MAC RX clock enable
impl R<bool, AFIOEN_A>
[src]
pub fn variant(&self) -> AFIOEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2ENR>>
[src]
pub fn afioen(&self) -> AFIOEN_R
[src]
Bit 0 - Alternate function I/O clock enable
pub fn iopaen(&self) -> IOPAEN_R
[src]
Bit 2 - I/O port A clock enable
pub fn iopben(&self) -> IOPBEN_R
[src]
Bit 3 - I/O port B clock enable
pub fn iopcen(&self) -> IOPCEN_R
[src]
Bit 4 - I/O port C clock enable
pub fn iopden(&self) -> IOPDEN_R
[src]
Bit 5 - I/O port D clock enable
pub fn iopeen(&self) -> IOPEEN_R
[src]
Bit 6 - I/O port E clock enable
pub fn adc1en(&self) -> ADC1EN_R
[src]
Bit 9 - ADC 1 interface clock enable
pub fn adc2en(&self) -> ADC2EN_R
[src]
Bit 10 - ADC 2 interface clock enable
pub fn tim1en(&self) -> TIM1EN_R
[src]
Bit 11 - TIM1 Timer clock enable
pub fn spi1en(&self) -> SPI1EN_R
[src]
Bit 12 - SPI 1 clock enable
pub fn usart1en(&self) -> USART1EN_R
[src]
Bit 14 - USART1 clock enable
impl R<bool, TIM2EN_A>
[src]
pub fn variant(&self) -> TIM2EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1ENR>>
[src]
pub fn tim2en(&self) -> TIM2EN_R
[src]
Bit 0 - Timer 2 clock enable
pub fn tim3en(&self) -> TIM3EN_R
[src]
Bit 1 - Timer 3 clock enable
pub fn tim4en(&self) -> TIM4EN_R
[src]
Bit 2 - Timer 4 clock enable
pub fn tim5en(&self) -> TIM5EN_R
[src]
Bit 3 - Timer 5 clock enable
pub fn tim6en(&self) -> TIM6EN_R
[src]
Bit 4 - Timer 6 clock enable
pub fn tim7en(&self) -> TIM7EN_R
[src]
Bit 5 - Timer 7 clock enable
pub fn wwdgen(&self) -> WWDGEN_R
[src]
Bit 11 - Window watchdog clock enable
pub fn spi2en(&self) -> SPI2EN_R
[src]
Bit 14 - SPI 2 clock enable
pub fn spi3en(&self) -> SPI3EN_R
[src]
Bit 15 - SPI 3 clock enable
pub fn usart2en(&self) -> USART2EN_R
[src]
Bit 17 - USART 2 clock enable
pub fn usart3en(&self) -> USART3EN_R
[src]
Bit 18 - USART 3 clock enable
pub fn uart4en(&self) -> UART4EN_R
[src]
Bit 19 - UART 4 clock enable
pub fn uart5en(&self) -> UART5EN_R
[src]
Bit 20 - UART 5 clock enable
pub fn i2c1en(&self) -> I2C1EN_R
[src]
Bit 21 - I2C 1 clock enable
pub fn i2c2en(&self) -> I2C2EN_R
[src]
Bit 22 - I2C 2 clock enable
pub fn can1en(&self) -> CAN1EN_R
[src]
Bit 25 - CAN1 clock enable
pub fn can2en(&self) -> CAN2EN_R
[src]
Bit 26 - CAN2 clock enable
pub fn bkpen(&self) -> BKPEN_R
[src]
Bit 27 - Backup interface clock enable
pub fn pwren(&self) -> PWREN_R
[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R
[src]
Bit 29 - DAC interface clock enable
impl R<bool, LSEON_A>
[src]
pub fn variant(&self) -> LSEON_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSERDY_A>
[src]
pub fn variant(&self) -> LSERDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, LSEBYP_A>
[src]
pub fn variant(&self) -> LSEBYP_A
[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool
[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool
[src]
Checks if the value of the field is BYPASSED
impl R<u8, RTCSEL_A>
[src]
pub fn variant(&self) -> RTCSEL_A
[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool
[src]
Checks if the value of the field is NOCLOCK
pub fn is_lse(&self) -> bool
[src]
Checks if the value of the field is LSE
pub fn is_lsi(&self) -> bool
[src]
Checks if the value of the field is LSI
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
impl R<bool, RTCEN_A>
[src]
pub fn variant(&self) -> RTCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BDRST_A>
[src]
pub fn variant(&self) -> BDRST_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BDCR>>
[src]
pub fn lseon(&self) -> LSEON_R
[src]
Bit 0 - External Low Speed oscillator enable
pub fn lserdy(&self) -> LSERDY_R
[src]
Bit 1 - External Low Speed oscillator ready
pub fn lsebyp(&self) -> LSEBYP_R
[src]
Bit 2 - External Low Speed oscillator bypass
pub fn rtcsel(&self) -> RTCSEL_R
[src]
Bits 8:9 - RTC clock source selection
pub fn rtcen(&self) -> RTCEN_R
[src]
Bit 15 - RTC clock enable
pub fn bdrst(&self) -> BDRST_R
[src]
Bit 16 - Backup domain software reset
impl R<bool, LSION_A>
[src]
pub fn variant(&self) -> LSION_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
impl R<bool, LSIRDY_A>
[src]
pub fn variant(&self) -> LSIRDY_A
[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool
[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool
[src]
Checks if the value of the field is READY
impl R<bool, RMVF_A>
[src]
pub fn variant(&self) -> Variant<bool, RMVF_A>
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
impl R<bool, PINRSTF_A>
[src]
pub fn variant(&self) -> PINRSTF_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn lsion(&self) -> LSION_R
[src]
Bit 0 - Internal low speed oscillator enable
pub fn lsirdy(&self) -> LSIRDY_R
[src]
Bit 1 - Internal low speed oscillator ready
pub fn rmvf(&self) -> RMVF_R
[src]
Bit 24 - Remove reset flag
pub fn pinrstf(&self) -> PINRSTF_R
[src]
Bit 26 - PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R
[src]
Bit 27 - POR/PDR reset flag
pub fn sftrstf(&self) -> SFTRSTF_R
[src]
Bit 28 - Software reset flag
pub fn iwdgrstf(&self) -> IWDGRSTF_R
[src]
Bit 29 - Independent watchdog reset flag
pub fn wwdgrstf(&self) -> WWDGRSTF_R
[src]
Bit 30 - Window watchdog reset flag
pub fn lpwrrstf(&self) -> LPWRRSTF_R
[src]
Bit 31 - Low-power reset flag
impl R<bool, OTGFSRST_A>
[src]
pub fn variant(&self) -> Variant<bool, OTGFSRST_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _AHBRSTR>>
[src]
pub fn otgfsrst(&self) -> OTGFSRST_R
[src]
Bit 12 - USB OTG FS reset
pub fn ethmacrst(&self) -> ETHMACRST_R
[src]
Bit 14 - Ethernet MAC reset
impl R<u8, PREDIV1_A>
[src]
pub fn variant(&self) -> PREDIV1_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div3(&self) -> bool
[src]
Checks if the value of the field is DIV3
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div5(&self) -> bool
[src]
Checks if the value of the field is DIV5
pub fn is_div6(&self) -> bool
[src]
Checks if the value of the field is DIV6
pub fn is_div7(&self) -> bool
[src]
Checks if the value of the field is DIV7
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div9(&self) -> bool
[src]
Checks if the value of the field is DIV9
pub fn is_div10(&self) -> bool
[src]
Checks if the value of the field is DIV10
pub fn is_div11(&self) -> bool
[src]
Checks if the value of the field is DIV11
pub fn is_div12(&self) -> bool
[src]
Checks if the value of the field is DIV12
pub fn is_div13(&self) -> bool
[src]
Checks if the value of the field is DIV13
pub fn is_div14(&self) -> bool
[src]
Checks if the value of the field is DIV14
pub fn is_div15(&self) -> bool
[src]
Checks if the value of the field is DIV15
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
impl R<u8, PLL2MUL_A>
[src]
pub fn variant(&self) -> Variant<u8, PLL2MUL_A>
[src]
Get enumerated values variant
pub fn is_mul8(&self) -> bool
[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool
[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool
[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool
[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool
[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool
[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool
[src]
Checks if the value of the field is MUL14
pub fn is_mul16(&self) -> bool
[src]
Checks if the value of the field is MUL16
pub fn is_mul20(&self) -> bool
[src]
Checks if the value of the field is MUL20
impl R<bool, PREDIV1SRC_A>
[src]
pub fn variant(&self) -> PREDIV1SRC_A
[src]
Get enumerated values variant
pub fn is_hse(&self) -> bool
[src]
Checks if the value of the field is HSE
pub fn is_pll2(&self) -> bool
[src]
Checks if the value of the field is PLL2
impl R<bool, I2S2SRC_A>
[src]
pub fn variant(&self) -> I2S2SRC_A
[src]
Get enumerated values variant
pub fn is_sysclk(&self) -> bool
[src]
Checks if the value of the field is SYSCLK
pub fn is_pll3(&self) -> bool
[src]
Checks if the value of the field is PLL3
impl R<u32, Reg<u32, _CFGR2>>
[src]
pub fn prediv1(&self) -> PREDIV1_R
[src]
Bits 0:3 - PREDIV1 division factor
pub fn prediv2(&self) -> PREDIV2_R
[src]
Bits 4:7 - PREDIV2 division factor
pub fn pll2mul(&self) -> PLL2MUL_R
[src]
Bits 8:11 - PLL2 Multiplication Factor
pub fn pll3mul(&self) -> PLL3MUL_R
[src]
Bits 12:15 - PLL3 Multiplication Factor
pub fn prediv1src(&self) -> PREDIV1SRC_R
[src]
Bit 16 - PREDIV1 entry clock source
pub fn i2s2src(&self) -> I2S2SRC_R
[src]
Bit 17 - I2S2 clock source
pub fn i2s3src(&self) -> I2S3SRC_R
[src]
Bit 18 - I2S3 clock source
impl R<u8, MODE0_A>
[src]
pub fn variant(&self) -> MODE0_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF0_A>
[src]
pub fn variant(&self) -> CNF0_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn mode0(&self) -> MODE0_R
[src]
Bits 0:1 - Port n.0 mode bits
pub fn cnf0(&self) -> CNF0_R
[src]
Bits 2:3 - Port n.0 configuration bits
pub fn mode1(&self) -> MODE1_R
[src]
Bits 4:5 - Port n.1 mode bits
pub fn cnf1(&self) -> CNF1_R
[src]
Bits 6:7 - Port n.1 configuration bits
pub fn mode2(&self) -> MODE2_R
[src]
Bits 8:9 - Port n.2 mode bits
pub fn cnf2(&self) -> CNF2_R
[src]
Bits 10:11 - Port n.2 configuration bits
pub fn mode3(&self) -> MODE3_R
[src]
Bits 12:13 - Port n.3 mode bits
pub fn cnf3(&self) -> CNF3_R
[src]
Bits 14:15 - Port n.3 configuration bits
pub fn mode4(&self) -> MODE4_R
[src]
Bits 16:17 - Port n.4 mode bits
pub fn cnf4(&self) -> CNF4_R
[src]
Bits 18:19 - Port n.4 configuration bits
pub fn mode5(&self) -> MODE5_R
[src]
Bits 20:21 - Port n.5 mode bits
pub fn cnf5(&self) -> CNF5_R
[src]
Bits 22:23 - Port n.5 configuration bits
pub fn mode6(&self) -> MODE6_R
[src]
Bits 24:25 - Port n.6 mode bits
pub fn cnf6(&self) -> CNF6_R
[src]
Bits 26:27 - Port n.6 configuration bits
pub fn mode7(&self) -> MODE7_R
[src]
Bits 28:29 - Port n.7 mode bits
pub fn cnf7(&self) -> CNF7_R
[src]
Bits 30:31 - Port n.7 configuration bits
impl R<u8, MODE8_A>
[src]
pub fn variant(&self) -> MODE8_A
[src]
Get enumerated values variant
pub fn is_input(&self) -> bool
[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
pub fn is_output2(&self) -> bool
[src]
Checks if the value of the field is OUTPUT2
pub fn is_output50(&self) -> bool
[src]
Checks if the value of the field is OUTPUT50
impl R<u8, CNF8_A>
[src]
pub fn variant(&self) -> CNF8_A
[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool
[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool
[src]
Checks if the value of the field is OPENDRAIN
pub fn is_alt_push_pull(&self) -> bool
[src]
Checks if the value of the field is ALTPUSHPULL
pub fn is_alt_open_drain(&self) -> bool
[src]
Checks if the value of the field is ALTOPENDRAIN
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn mode8(&self) -> MODE8_R
[src]
Bits 0:1 - Port n.8 mode bits
pub fn cnf8(&self) -> CNF8_R
[src]
Bits 2:3 - Port n.8 configuration bits
pub fn mode9(&self) -> MODE9_R
[src]
Bits 4:5 - Port n.9 mode bits
pub fn cnf9(&self) -> CNF9_R
[src]
Bits 6:7 - Port n.9 configuration bits
pub fn mode10(&self) -> MODE10_R
[src]
Bits 8:9 - Port n.10 mode bits
pub fn cnf10(&self) -> CNF10_R
[src]
Bits 10:11 - Port n.10 configuration bits
pub fn mode11(&self) -> MODE11_R
[src]
Bits 12:13 - Port n.11 mode bits
pub fn cnf11(&self) -> CNF11_R
[src]
Bits 14:15 - Port n.11 configuration bits
pub fn mode12(&self) -> MODE12_R
[src]
Bits 16:17 - Port n.12 mode bits
pub fn cnf12(&self) -> CNF12_R
[src]
Bits 18:19 - Port n.12 configuration bits
pub fn mode13(&self) -> MODE13_R
[src]
Bits 20:21 - Port n.13 mode bits
pub fn cnf13(&self) -> CNF13_R
[src]
Bits 22:23 - Port n.13 configuration bits
pub fn mode14(&self) -> MODE14_R
[src]
Bits 24:25 - Port n.14 mode bits
pub fn cnf14(&self) -> CNF14_R
[src]
Bits 26:27 - Port n.14 configuration bits
pub fn mode15(&self) -> MODE15_R
[src]
Bits 28:29 - Port n.15 mode bits
pub fn cnf15(&self) -> CNF15_R
[src]
Bits 30:31 - Port n.15 configuration bits
impl R<bool, IDR0_A>
[src]
pub fn variant(&self) -> IDR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _IDR>>
[src]
pub fn idr0(&self) -> IDR0_R
[src]
Bit 0 - Port input data
pub fn idr1(&self) -> IDR1_R
[src]
Bit 1 - Port input data
pub fn idr2(&self) -> IDR2_R
[src]
Bit 2 - Port input data
pub fn idr3(&self) -> IDR3_R
[src]
Bit 3 - Port input data
pub fn idr4(&self) -> IDR4_R
[src]
Bit 4 - Port input data
pub fn idr5(&self) -> IDR5_R
[src]
Bit 5 - Port input data
pub fn idr6(&self) -> IDR6_R
[src]
Bit 6 - Port input data
pub fn idr7(&self) -> IDR7_R
[src]
Bit 7 - Port input data
pub fn idr8(&self) -> IDR8_R
[src]
Bit 8 - Port input data
pub fn idr9(&self) -> IDR9_R
[src]
Bit 9 - Port input data
pub fn idr10(&self) -> IDR10_R
[src]
Bit 10 - Port input data
pub fn idr11(&self) -> IDR11_R
[src]
Bit 11 - Port input data
pub fn idr12(&self) -> IDR12_R
[src]
Bit 12 - Port input data
pub fn idr13(&self) -> IDR13_R
[src]
Bit 13 - Port input data
pub fn idr14(&self) -> IDR14_R
[src]
Bit 14 - Port input data
pub fn idr15(&self) -> IDR15_R
[src]
Bit 15 - Port input data
impl R<bool, ODR0_A>
[src]
pub fn variant(&self) -> ODR0_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _ODR>>
[src]
pub fn odr0(&self) -> ODR0_R
[src]
Bit 0 - Port output data
pub fn odr1(&self) -> ODR1_R
[src]
Bit 1 - Port output data
pub fn odr2(&self) -> ODR2_R
[src]
Bit 2 - Port output data
pub fn odr3(&self) -> ODR3_R
[src]
Bit 3 - Port output data
pub fn odr4(&self) -> ODR4_R
[src]
Bit 4 - Port output data
pub fn odr5(&self) -> ODR5_R
[src]
Bit 5 - Port output data
pub fn odr6(&self) -> ODR6_R
[src]
Bit 6 - Port output data
pub fn odr7(&self) -> ODR7_R
[src]
Bit 7 - Port output data
pub fn odr8(&self) -> ODR8_R
[src]
Bit 8 - Port output data
pub fn odr9(&self) -> ODR9_R
[src]
Bit 9 - Port output data
pub fn odr10(&self) -> ODR10_R
[src]
Bit 10 - Port output data
pub fn odr11(&self) -> ODR11_R
[src]
Bit 11 - Port output data
pub fn odr12(&self) -> ODR12_R
[src]
Bit 12 - Port output data
pub fn odr13(&self) -> ODR13_R
[src]
Bit 13 - Port output data
pub fn odr14(&self) -> ODR14_R
[src]
Bit 14 - Port output data
pub fn odr15(&self) -> ODR15_R
[src]
Bit 15 - Port output data
impl R<bool, LCK0_A>
[src]
pub fn variant(&self) -> LCK0_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCK10_A>
[src]
pub fn variant(&self) -> LCK10_A
[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool
[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, LCKK_A>
[src]
pub fn variant(&self) -> LCKK_A
[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool
[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _LCKR>>
[src]
pub fn lck0(&self) -> LCK0_R
[src]
Bit 0 - Port A Lock bit 0
pub fn lck1(&self) -> LCK1_R
[src]
Bit 1 - Port A Lock bit 1
pub fn lck2(&self) -> LCK2_R
[src]
Bit 2 - Port A Lock bit 2
pub fn lck3(&self) -> LCK3_R
[src]
Bit 3 - Port A Lock bit 3
pub fn lck4(&self) -> LCK4_R
[src]
Bit 4 - Port A Lock bit 4
pub fn lck5(&self) -> LCK5_R
[src]
Bit 5 - Port A Lock bit 5
pub fn lck6(&self) -> LCK6_R
[src]
Bit 6 - Port A Lock bit 6
pub fn lck7(&self) -> LCK7_R
[src]
Bit 7 - Port A Lock bit 7
pub fn lck8(&self) -> LCK8_R
[src]
Bit 8 - Port A Lock bit 8
pub fn lck9(&self) -> LCK9_R
[src]
Bit 9 - Port A Lock bit 9
pub fn lck10(&self) -> LCK10_R
[src]
Bit 10 - Port A Lock bit 10
pub fn lck11(&self) -> LCK11_R
[src]
Bit 11 - Port A Lock bit 11
pub fn lck12(&self) -> LCK12_R
[src]
Bit 12 - Port A Lock bit 12
pub fn lck13(&self) -> LCK13_R
[src]
Bit 13 - Port A Lock bit 13
pub fn lck14(&self) -> LCK14_R
[src]
Bit 14 - Port A Lock bit 14
pub fn lck15(&self) -> LCK15_R
[src]
Bit 15 - Port A Lock bit 15
pub fn lckk(&self) -> LCKK_R
[src]
Bit 16 - Lock key
impl R<u32, Reg<u32, _EVCR>>
[src]
pub fn pin(&self) -> PIN_R
[src]
Bits 0:3 - Pin selection
pub fn port(&self) -> PORT_R
[src]
Bits 4:6 - Port selection
pub fn evoe(&self) -> EVOE_R
[src]
Bit 7 - Event Output Enable
impl R<u32, Reg<u32, _MAPR>>
[src]
pub fn spi1_remap(&self) -> SPI1_REMAP_R
[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAP_R
[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAP_R
[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAP_R
[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAP_R
[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAP_R
[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAP_R
[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAP_R
[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAP_R
[src]
Bit 12 - TIM4 remapping
pub fn can1_remap(&self) -> CAN1_REMAP_R
[src]
Bits 13:14 - CAN1 remapping
pub fn pd01_remap(&self) -> PD01_REMAP_R
[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R
[src]
Bit 16 - Set and cleared by software
pub fn eth_remap(&self) -> ETH_REMAP_R
[src]
Bit 21 - Ethernet MAC I/O remapping
pub fn can2_remap(&self) -> CAN2_REMAP_R
[src]
Bit 22 - CAN2 I/O remapping
pub fn mii_rmii_sel(&self) -> MII_RMII_SEL_R
[src]
Bit 23 - MII or RMII selection
pub fn spi3_remap(&self) -> SPI3_REMAP_R
[src]
Bit 28 - SPI3/I2S3 remapping
pub fn tim2itr1_iremap(&self) -> TIM2ITR1_IREMAP_R
[src]
Bit 29 - TIM2 internal trigger 1 remapping
pub fn ptp_pps_remap(&self) -> PTP_PPS_REMAP_R
[src]
Bit 30 - Ethernet PTP PPS remapping
impl R<u32, Reg<u32, _EXTICR1>>
[src]
pub fn exti0(&self) -> EXTI0_R
[src]
Bits 0:3 - EXTI0 configuration
pub fn exti1(&self) -> EXTI1_R
[src]
Bits 4:7 - EXTI1 configuration
pub fn exti2(&self) -> EXTI2_R
[src]
Bits 8:11 - EXTI2 configuration
pub fn exti3(&self) -> EXTI3_R
[src]
Bits 12:15 - EXTI3 configuration
impl R<u32, Reg<u32, _EXTICR2>>
[src]
pub fn exti4(&self) -> EXTI4_R
[src]
Bits 0:3 - EXTI4 configuration
pub fn exti5(&self) -> EXTI5_R
[src]
Bits 4:7 - EXTI5 configuration
pub fn exti6(&self) -> EXTI6_R
[src]
Bits 8:11 - EXTI6 configuration
pub fn exti7(&self) -> EXTI7_R
[src]
Bits 12:15 - EXTI7 configuration
impl R<u32, Reg<u32, _EXTICR3>>
[src]
pub fn exti8(&self) -> EXTI8_R
[src]
Bits 0:3 - EXTI8 configuration
pub fn exti9(&self) -> EXTI9_R
[src]
Bits 4:7 - EXTI9 configuration
pub fn exti10(&self) -> EXTI10_R
[src]
Bits 8:11 - EXTI10 configuration
pub fn exti11(&self) -> EXTI11_R
[src]
Bits 12:15 - EXTI11 configuration
impl R<u32, Reg<u32, _EXTICR4>>
[src]
pub fn exti12(&self) -> EXTI12_R
[src]
Bits 0:3 - EXTI12 configuration
pub fn exti13(&self) -> EXTI13_R
[src]
Bits 4:7 - EXTI13 configuration
pub fn exti14(&self) -> EXTI14_R
[src]
Bits 8:11 - EXTI14 configuration
pub fn exti15(&self) -> EXTI15_R
[src]
Bits 12:15 - EXTI15 configuration
impl R<u32, Reg<u32, _MAPR2>>
[src]
pub fn tim9_remap(&self) -> TIM9_REMAP_R
[src]
Bit 5 - TIM9 remapping
pub fn tim10_remap(&self) -> TIM10_REMAP_R
[src]
Bit 6 - TIM10 remapping
pub fn tim11_remap(&self) -> TIM11_REMAP_R
[src]
Bit 7 - TIM11 remapping
pub fn tim13_remap(&self) -> TIM13_REMAP_R
[src]
Bit 8 - TIM13 remapping
pub fn tim14_remap(&self) -> TIM14_REMAP_R
[src]
Bit 9 - TIM14 remapping
pub fn fsmc_nadv(&self) -> FSMC_NADV_R
[src]
Bit 10 - NADV connect/disconnect
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _IMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Interrupt Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Interrupt Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Interrupt Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Interrupt Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Interrupt Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Interrupt Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Interrupt Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Interrupt Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Interrupt Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Interrupt Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Interrupt Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Interrupt Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Interrupt Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Interrupt Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Interrupt Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Interrupt Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Interrupt Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Interrupt Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Interrupt Mask on line 18
pub fn mr19(&self) -> MR19_R
[src]
Bit 19 - Interrupt Mask on line 19
impl R<bool, MR0_A>
[src]
pub fn variant(&self) -> MR0_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EMR>>
[src]
pub fn mr0(&self) -> MR0_R
[src]
Bit 0 - Event Mask on line 0
pub fn mr1(&self) -> MR1_R
[src]
Bit 1 - Event Mask on line 1
pub fn mr2(&self) -> MR2_R
[src]
Bit 2 - Event Mask on line 2
pub fn mr3(&self) -> MR3_R
[src]
Bit 3 - Event Mask on line 3
pub fn mr4(&self) -> MR4_R
[src]
Bit 4 - Event Mask on line 4
pub fn mr5(&self) -> MR5_R
[src]
Bit 5 - Event Mask on line 5
pub fn mr6(&self) -> MR6_R
[src]
Bit 6 - Event Mask on line 6
pub fn mr7(&self) -> MR7_R
[src]
Bit 7 - Event Mask on line 7
pub fn mr8(&self) -> MR8_R
[src]
Bit 8 - Event Mask on line 8
pub fn mr9(&self) -> MR9_R
[src]
Bit 9 - Event Mask on line 9
pub fn mr10(&self) -> MR10_R
[src]
Bit 10 - Event Mask on line 10
pub fn mr11(&self) -> MR11_R
[src]
Bit 11 - Event Mask on line 11
pub fn mr12(&self) -> MR12_R
[src]
Bit 12 - Event Mask on line 12
pub fn mr13(&self) -> MR13_R
[src]
Bit 13 - Event Mask on line 13
pub fn mr14(&self) -> MR14_R
[src]
Bit 14 - Event Mask on line 14
pub fn mr15(&self) -> MR15_R
[src]
Bit 15 - Event Mask on line 15
pub fn mr16(&self) -> MR16_R
[src]
Bit 16 - Event Mask on line 16
pub fn mr17(&self) -> MR17_R
[src]
Bit 17 - Event Mask on line 17
pub fn mr18(&self) -> MR18_R
[src]
Bit 18 - Event Mask on line 18
pub fn mr19(&self) -> MR19_R
[src]
Bit 19 - Event Mask on line 19
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Rising trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Rising trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Rising trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Rising trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Rising trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Rising trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Rising trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Rising trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Rising trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Rising trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Rising trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Rising trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Rising trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Rising trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Rising trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Rising trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Rising trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Rising trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Rising trigger event configuration of line 18
pub fn tr19(&self) -> TR19_R
[src]
Bit 19 - Rising trigger event configuration of line 19
impl R<bool, TR0_A>
[src]
pub fn variant(&self) -> TR0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTSR>>
[src]
pub fn tr0(&self) -> TR0_R
[src]
Bit 0 - Falling trigger event configuration of line 0
pub fn tr1(&self) -> TR1_R
[src]
Bit 1 - Falling trigger event configuration of line 1
pub fn tr2(&self) -> TR2_R
[src]
Bit 2 - Falling trigger event configuration of line 2
pub fn tr3(&self) -> TR3_R
[src]
Bit 3 - Falling trigger event configuration of line 3
pub fn tr4(&self) -> TR4_R
[src]
Bit 4 - Falling trigger event configuration of line 4
pub fn tr5(&self) -> TR5_R
[src]
Bit 5 - Falling trigger event configuration of line 5
pub fn tr6(&self) -> TR6_R
[src]
Bit 6 - Falling trigger event configuration of line 6
pub fn tr7(&self) -> TR7_R
[src]
Bit 7 - Falling trigger event configuration of line 7
pub fn tr8(&self) -> TR8_R
[src]
Bit 8 - Falling trigger event configuration of line 8
pub fn tr9(&self) -> TR9_R
[src]
Bit 9 - Falling trigger event configuration of line 9
pub fn tr10(&self) -> TR10_R
[src]
Bit 10 - Falling trigger event configuration of line 10
pub fn tr11(&self) -> TR11_R
[src]
Bit 11 - Falling trigger event configuration of line 11
pub fn tr12(&self) -> TR12_R
[src]
Bit 12 - Falling trigger event configuration of line 12
pub fn tr13(&self) -> TR13_R
[src]
Bit 13 - Falling trigger event configuration of line 13
pub fn tr14(&self) -> TR14_R
[src]
Bit 14 - Falling trigger event configuration of line 14
pub fn tr15(&self) -> TR15_R
[src]
Bit 15 - Falling trigger event configuration of line 15
pub fn tr16(&self) -> TR16_R
[src]
Bit 16 - Falling trigger event configuration of line 16
pub fn tr17(&self) -> TR17_R
[src]
Bit 17 - Falling trigger event configuration of line 17
pub fn tr18(&self) -> TR18_R
[src]
Bit 18 - Falling trigger event configuration of line 18
pub fn tr19(&self) -> TR19_R
[src]
Bit 19 - Falling trigger event configuration of line 19
impl R<bool, SWIER0_A>
[src]
pub fn variant(&self) -> Variant<bool, SWIER0_A>
[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool
[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIER>>
[src]
pub fn swier0(&self) -> SWIER0_R
[src]
Bit 0 - Software Interrupt on line 0
pub fn swier1(&self) -> SWIER1_R
[src]
Bit 1 - Software Interrupt on line 1
pub fn swier2(&self) -> SWIER2_R
[src]
Bit 2 - Software Interrupt on line 2
pub fn swier3(&self) -> SWIER3_R
[src]
Bit 3 - Software Interrupt on line 3
pub fn swier4(&self) -> SWIER4_R
[src]
Bit 4 - Software Interrupt on line 4
pub fn swier5(&self) -> SWIER5_R
[src]
Bit 5 - Software Interrupt on line 5
pub fn swier6(&self) -> SWIER6_R
[src]
Bit 6 - Software Interrupt on line 6
pub fn swier7(&self) -> SWIER7_R
[src]
Bit 7 - Software Interrupt on line 7
pub fn swier8(&self) -> SWIER8_R
[src]
Bit 8 - Software Interrupt on line 8
pub fn swier9(&self) -> SWIER9_R
[src]
Bit 9 - Software Interrupt on line 9
pub fn swier10(&self) -> SWIER10_R
[src]
Bit 10 - Software Interrupt on line 10
pub fn swier11(&self) -> SWIER11_R
[src]
Bit 11 - Software Interrupt on line 11
pub fn swier12(&self) -> SWIER12_R
[src]
Bit 12 - Software Interrupt on line 12
pub fn swier13(&self) -> SWIER13_R
[src]
Bit 13 - Software Interrupt on line 13
pub fn swier14(&self) -> SWIER14_R
[src]
Bit 14 - Software Interrupt on line 14
pub fn swier15(&self) -> SWIER15_R
[src]
Bit 15 - Software Interrupt on line 15
pub fn swier16(&self) -> SWIER16_R
[src]
Bit 16 - Software Interrupt on line 16
pub fn swier17(&self) -> SWIER17_R
[src]
Bit 17 - Software Interrupt on line 17
pub fn swier18(&self) -> SWIER18_R
[src]
Bit 18 - Software Interrupt on line 18
pub fn swier19(&self) -> SWIER19_R
[src]
Bit 19 - Software Interrupt on line 19
impl R<bool, PR0_A>
[src]
pub fn variant(&self) -> PR0_A
[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool
[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PR>>
[src]
pub fn pr0(&self) -> PR0_R
[src]
Bit 0 - Pending bit 0
pub fn pr1(&self) -> PR1_R
[src]
Bit 1 - Pending bit 1
pub fn pr2(&self) -> PR2_R
[src]
Bit 2 - Pending bit 2
pub fn pr3(&self) -> PR3_R
[src]
Bit 3 - Pending bit 3
pub fn pr4(&self) -> PR4_R
[src]
Bit 4 - Pending bit 4
pub fn pr5(&self) -> PR5_R
[src]
Bit 5 - Pending bit 5
pub fn pr6(&self) -> PR6_R
[src]
Bit 6 - Pending bit 6
pub fn pr7(&self) -> PR7_R
[src]
Bit 7 - Pending bit 7
pub fn pr8(&self) -> PR8_R
[src]
Bit 8 - Pending bit 8
pub fn pr9(&self) -> PR9_R
[src]
Bit 9 - Pending bit 9
pub fn pr10(&self) -> PR10_R
[src]
Bit 10 - Pending bit 10
pub fn pr11(&self) -> PR11_R
[src]
Bit 11 - Pending bit 11
pub fn pr12(&self) -> PR12_R
[src]
Bit 12 - Pending bit 12
pub fn pr13(&self) -> PR13_R
[src]
Bit 13 - Pending bit 13
pub fn pr14(&self) -> PR14_R
[src]
Bit 14 - Pending bit 14
pub fn pr15(&self) -> PR15_R
[src]
Bit 15 - Pending bit 15
pub fn pr16(&self) -> PR16_R
[src]
Bit 16 - Pending bit 16
pub fn pr17(&self) -> PR17_R
[src]
Bit 17 - Pending bit 17
pub fn pr18(&self) -> PR18_R
[src]
Bit 18 - Pending bit 18
pub fn pr19(&self) -> PR19_R
[src]
Bit 19 - Pending bit 19
impl R<bool, EN_A>
[src]
pub fn variant(&self) -> EN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HTIE_A>
[src]
pub fn variant(&self) -> HTIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TEIE_A>
[src]
pub fn variant(&self) -> TEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool
[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool
[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CIRC_A>
[src]
pub fn variant(&self) -> CIRC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PINC_A>
[src]
pub fn variant(&self) -> PINC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, PSIZE_A>
[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool
[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool
[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool
[src]
Checks if the value of the field is BITS32
impl R<u8, PL_A>
[src]
pub fn variant(&self) -> PL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool
[src]
Checks if the value of the field is VERYHIGH
impl R<bool, MEM2MEM_A>
[src]
pub fn variant(&self) -> MEM2MEM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en(&self) -> EN_R
[src]
Bit 0 - Channel enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 1 - Transfer complete interrupt enable
pub fn htie(&self) -> HTIE_R
[src]
Bit 2 - Half Transfer interrupt enable
pub fn teie(&self) -> TEIE_R
[src]
Bit 3 - Transfer error interrupt enable
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Data transfer direction
pub fn circ(&self) -> CIRC_R
[src]
Bit 5 - Circular mode
pub fn pinc(&self) -> PINC_R
[src]
Bit 6 - Peripheral increment mode
pub fn minc(&self) -> MINC_R
[src]
Bit 7 - Memory increment mode
pub fn psize(&self) -> PSIZE_R
[src]
Bits 8:9 - Peripheral size
pub fn msize(&self) -> MSIZE_R
[src]
Bits 10:11 - Memory size
pub fn pl(&self) -> PL_R
[src]
Bits 12:13 - Channel Priority level
pub fn mem2mem(&self) -> MEM2MEM_R
[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _NDTR>>
[src]
impl R<u32, Reg<u32, _PAR>>
[src]
impl R<u32, Reg<u32, _MAR>>
[src]
impl R<bool, GIF1_A>
[src]
pub fn variant(&self) -> GIF1_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<bool, TCIF1_A>
[src]
pub fn variant(&self) -> TCIF1_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTIF1_A>
[src]
pub fn variant(&self) -> HTIF1_A
[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool
[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
impl R<bool, TEIF1_A>
[src]
pub fn variant(&self) -> TEIF1_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _ISR>>
[src]
pub fn gif1(&self) -> GIF1_R
[src]
Bit 0 - Channel 1 Global interrupt flag
pub fn tcif1(&self) -> TCIF1_R
[src]
Bit 1 - Channel 1 Transfer Complete flag
pub fn htif1(&self) -> HTIF1_R
[src]
Bit 2 - Channel 1 Half Transfer Complete flag
pub fn teif1(&self) -> TEIF1_R
[src]
Bit 3 - Channel 1 Transfer Error flag
pub fn gif2(&self) -> GIF2_R
[src]
Bit 4 - Channel 2 Global interrupt flag
pub fn tcif2(&self) -> TCIF2_R
[src]
Bit 5 - Channel 2 Transfer Complete flag
pub fn htif2(&self) -> HTIF2_R
[src]
Bit 6 - Channel 2 Half Transfer Complete flag
pub fn teif2(&self) -> TEIF2_R
[src]
Bit 7 - Channel 2 Transfer Error flag
pub fn gif3(&self) -> GIF3_R
[src]
Bit 8 - Channel 3 Global interrupt flag
pub fn tcif3(&self) -> TCIF3_R
[src]
Bit 9 - Channel 3 Transfer Complete flag
pub fn htif3(&self) -> HTIF3_R
[src]
Bit 10 - Channel 3 Half Transfer Complete flag
pub fn teif3(&self) -> TEIF3_R
[src]
Bit 11 - Channel 3 Transfer Error flag
pub fn gif4(&self) -> GIF4_R
[src]
Bit 12 - Channel 4 Global interrupt flag
pub fn tcif4(&self) -> TCIF4_R
[src]
Bit 13 - Channel 4 Transfer Complete flag
pub fn htif4(&self) -> HTIF4_R
[src]
Bit 14 - Channel 4 Half Transfer Complete flag
pub fn teif4(&self) -> TEIF4_R
[src]
Bit 15 - Channel 4 Transfer Error flag
pub fn gif5(&self) -> GIF5_R
[src]
Bit 16 - Channel 5 Global interrupt flag
pub fn tcif5(&self) -> TCIF5_R
[src]
Bit 17 - Channel 5 Transfer Complete flag
pub fn htif5(&self) -> HTIF5_R
[src]
Bit 18 - Channel 5 Half Transfer Complete flag
pub fn teif5(&self) -> TEIF5_R
[src]
Bit 19 - Channel 5 Transfer Error flag
pub fn gif6(&self) -> GIF6_R
[src]
Bit 20 - Channel 6 Global interrupt flag
pub fn tcif6(&self) -> TCIF6_R
[src]
Bit 21 - Channel 6 Transfer Complete flag
pub fn htif6(&self) -> HTIF6_R
[src]
Bit 22 - Channel 6 Half Transfer Complete flag
pub fn teif6(&self) -> TEIF6_R
[src]
Bit 23 - Channel 6 Transfer Error flag
pub fn gif7(&self) -> GIF7_R
[src]
Bit 24 - Channel 7 Global interrupt flag
pub fn tcif7(&self) -> TCIF7_R
[src]
Bit 25 - Channel 7 Transfer Complete flag
pub fn htif7(&self) -> HTIF7_R
[src]
Bit 26 - Channel 7 Half Transfer Complete flag
pub fn teif7(&self) -> TEIF7_R
[src]
Bit 27 - Channel 7 Transfer Error flag
impl R<bool, SECIE_A>
[src]
pub fn variant(&self) -> SECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ALRIE_A>
[src]
pub fn variant(&self) -> ALRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OWIE_A>
[src]
pub fn variant(&self) -> OWIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CRH>>
[src]
pub fn secie(&self) -> SECIE_R
[src]
Bit 0 - Second interrupt Enable
pub fn alrie(&self) -> ALRIE_R
[src]
Bit 1 - Alarm interrupt Enable
pub fn owie(&self) -> OWIE_R
[src]
Bit 2 - Overflow interrupt Enable
impl R<bool, SECF_A>
[src]
pub fn variant(&self) -> SECF_A
[src]
Get enumerated values variant
pub fn is_no_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is NOPRESCALEROVERFLOW
pub fn is_prescaler_overflow(&self) -> bool
[src]
Checks if the value of the field is PRESCALEROVERFLOW
impl R<bool, ALRF_A>
[src]
pub fn variant(&self) -> ALRF_A
[src]
Get enumerated values variant
pub fn is_no_alarm(&self) -> bool
[src]
Checks if the value of the field is NOALARM
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
impl R<bool, OWF_A>
[src]
pub fn variant(&self) -> OWF_A
[src]
Get enumerated values variant
pub fn is_no_overflow(&self) -> bool
[src]
Checks if the value of the field is NOOVERFLOW
pub fn is_overflow(&self) -> bool
[src]
Checks if the value of the field is OVERFLOW
impl R<bool, RSF_A>
[src]
pub fn variant(&self) -> RSF_A
[src]
Get enumerated values variant
pub fn is_not_synchronized(&self) -> bool
[src]
Checks if the value of the field is NOTSYNCHRONIZED
pub fn is_synchronized(&self) -> bool
[src]
Checks if the value of the field is SYNCHRONIZED
impl R<bool, CNF_A>
[src]
pub fn variant(&self) -> CNF_A
[src]
Get enumerated values variant
pub fn is_exit(&self) -> bool
[src]
Checks if the value of the field is EXIT
pub fn is_enter(&self) -> bool
[src]
Checks if the value of the field is ENTER
impl R<bool, RTOFF_A>
[src]
pub fn variant(&self) -> RTOFF_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _CRL>>
[src]
pub fn secf(&self) -> SECF_R
[src]
Bit 0 - Second Flag
pub fn alrf(&self) -> ALRF_R
[src]
Bit 1 - Alarm Flag
pub fn owf(&self) -> OWF_R
[src]
Bit 2 - Overflow Flag
pub fn rsf(&self) -> RSF_R
[src]
Bit 3 - Registers Synchronized Flag
pub fn cnf(&self) -> CNF_R
[src]
Bit 4 - Configuration Flag
pub fn rtoff(&self) -> RTOFF_R
[src]
Bit 5 - RTC operation OFF
impl R<u32, Reg<u32, _DIVH>>
[src]
impl R<u32, Reg<u32, _DIVL>>
[src]
impl R<u32, Reg<u32, _CNTH>>
[src]
impl R<u32, Reg<u32, _CNTL>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BKP_DR>>
[src]
impl R<bool, ASOE_A>
[src]
pub fn variant(&self) -> ASOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ASOS_A>
[src]
pub fn variant(&self) -> ASOS_A
[src]
Get enumerated values variant
pub fn is_alarm(&self) -> bool
[src]
Checks if the value of the field is ALARM
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<u32, Reg<u32, _RTCCR>>
[src]
pub fn cal(&self) -> CAL_R
[src]
Bits 0:6 - Calibration value
pub fn cco(&self) -> CCO_R
[src]
Bit 7 - Calibration Clock Output
pub fn asoe(&self) -> ASOE_R
[src]
Bit 8 - Alarm or second output enable
pub fn asos(&self) -> ASOS_R
[src]
Bit 9 - Alarm or second output selection
impl R<bool, TPE_A>
[src]
pub fn variant(&self) -> TPE_A
[src]
Get enumerated values variant
pub fn is_general(&self) -> bool
[src]
Checks if the value of the field is GENERAL
pub fn is_alternate(&self) -> bool
[src]
Checks if the value of the field is ALTERNATE
impl R<bool, TPAL_A>
[src]
pub fn variant(&self) -> TPAL_A
[src]
Get enumerated values variant
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CR>>
[src]
pub fn tpe(&self) -> TPE_R
[src]
Bit 0 - Tamper pin enable
pub fn tpal(&self) -> TPAL_R
[src]
Bit 1 - Tamper pin active level
impl R<bool, TPIE_A>
[src]
pub fn variant(&self) -> TPIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CSR>>
[src]
pub fn tpie(&self) -> TPIE_R
[src]
Bit 2 - Tamper Pin interrupt enable
pub fn tef(&self) -> TEF_R
[src]
Bit 8 - Tamper Event Flag
pub fn tif(&self) -> TIF_R
[src]
Bit 9 - Tamper Interrupt Flag
impl R<u8, PR_A>
[src]
pub fn variant(&self) -> PR_A
[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool
[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PR>>
[src]
impl R<u32, Reg<u32, _RLR>>
[src]
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pvu(&self) -> PVU_R
[src]
Bit 0 - Watchdog prescaler value update
pub fn rvu(&self) -> RVU_R
[src]
Bit 1 - Watchdog counter reload value update
impl R<bool, WDGA_A>
[src]
pub fn variant(&self) -> WDGA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR>>
[src]
pub fn t(&self) -> T_R
[src]
Bits 0:6 - 7-bit counter (MSB to LSB)
pub fn wdga(&self) -> WDGA_R
[src]
Bit 7 - Activation bit
impl R<bool, EWI_A>
[src]
pub fn variant(&self) -> Variant<bool, EWI_A>
[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
impl R<u8, WDGTB_A>
[src]
pub fn variant(&self) -> WDGTB_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFR>>
[src]
pub fn w(&self) -> W_R
[src]
Bits 0:6 - 7-bit window value
pub fn ewi(&self) -> EWI_R
[src]
Bit 9 - Early Wakeup Interrupt
pub fn wdgtb(&self) -> WDGTB_R
[src]
Bits 7:8 - Timer Base
impl R<bool, EWIF_A>
[src]
pub fn variant(&self) -> EWIF_A
[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool
[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4DE_A>
[src]
pub fn variant(&self) -> CC4DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC4IE_A>
[src]
pub fn variant(&self) -> CC4IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 12:15 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> Variant<u8, MMS_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<bool, SWRST_A>
[src]
pub fn variant(&self) -> SWRST_A
[src]
Get enumerated values variant
pub fn is_not_reset(&self) -> bool
[src]
Checks if the value of the field is NOTRESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, ALERT_A>
[src]
pub fn variant(&self) -> ALERT_A
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
pub fn is_drive(&self) -> bool
[src]
Checks if the value of the field is DRIVE
impl R<bool, PEC_A>
[src]
pub fn variant(&self) -> PEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, POS_A>
[src]
pub fn variant(&self) -> POS_A
[src]
Get enumerated values variant
pub fn is_current(&self) -> bool
[src]
Checks if the value of the field is CURRENT
pub fn is_next(&self) -> bool
[src]
Checks if the value of the field is NEXT
impl R<bool, ACK_A>
[src]
pub fn variant(&self) -> ACK_A
[src]
Get enumerated values variant
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
impl R<bool, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, START_A>
[src]
pub fn variant(&self) -> START_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<bool, NOSTRETCH_A>
[src]
pub fn variant(&self) -> NOSTRETCH_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, ENGC_A>
[src]
pub fn variant(&self) -> ENGC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENPEC_A>
[src]
pub fn variant(&self) -> ENPEC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ENARP_A>
[src]
pub fn variant(&self) -> ENARP_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SMBTYPE_A>
[src]
pub fn variant(&self) -> SMBTYPE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<bool, SMBUS_A>
[src]
pub fn variant(&self) -> SMBUS_A
[src]
Get enumerated values variant
pub fn is_i2c(&self) -> bool
[src]
Checks if the value of the field is I2C
pub fn is_smbus(&self) -> bool
[src]
Checks if the value of the field is SMBUS
impl R<bool, PE_A>
[src]
pub fn variant(&self) -> PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 15 - Software reset
pub fn alert(&self) -> ALERT_R
[src]
Bit 13 - SMBus alert
pub fn pec(&self) -> PEC_R
[src]
Bit 12 - Packet error checking
pub fn pos(&self) -> POS_R
[src]
Bit 11 - Acknowledge/PEC Position (for data reception)
pub fn ack(&self) -> ACK_R
[src]
Bit 10 - Acknowledge enable
pub fn stop(&self) -> STOP_R
[src]
Bit 9 - Stop generation
pub fn start(&self) -> START_R
[src]
Bit 8 - Start generation
pub fn nostretch(&self) -> NOSTRETCH_R
[src]
Bit 7 - Clock stretching disable (Slave mode)
pub fn engc(&self) -> ENGC_R
[src]
Bit 6 - General call enable
pub fn enpec(&self) -> ENPEC_R
[src]
Bit 5 - PEC enable
pub fn enarp(&self) -> ENARP_R
[src]
Bit 4 - ARP enable
pub fn smbtype(&self) -> SMBTYPE_R
[src]
Bit 3 - SMBus type
pub fn smbus(&self) -> SMBUS_R
[src]
Bit 1 - SMBus mode
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Peripheral enable
impl R<bool, LAST_A>
[src]
pub fn variant(&self) -> LAST_A
[src]
Get enumerated values variant
pub fn is_not_last(&self) -> bool
[src]
Checks if the value of the field is NOTLAST
pub fn is_last(&self) -> bool
[src]
Checks if the value of the field is LAST
impl R<bool, DMAEN_A>
[src]
pub fn variant(&self) -> DMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITBUFEN_A>
[src]
pub fn variant(&self) -> ITBUFEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITEVTEN_A>
[src]
pub fn variant(&self) -> ITEVTEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ITERREN_A>
[src]
pub fn variant(&self) -> ITERREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn last(&self) -> LAST_R
[src]
Bit 12 - DMA last transfer
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 11 - DMA requests enable
pub fn itbufen(&self) -> ITBUFEN_R
[src]
Bit 10 - Buffer interrupt enable
pub fn itevten(&self) -> ITEVTEN_R
[src]
Bit 9 - Event interrupt enable
pub fn iterren(&self) -> ITERREN_R
[src]
Bit 8 - Error interrupt enable
pub fn freq(&self) -> FREQ_R
[src]
Bits 0:5 - Peripheral clock frequency
impl R<bool, ADDMODE_A>
[src]
pub fn variant(&self) -> ADDMODE_A
[src]
Get enumerated values variant
pub fn is_add7(&self) -> bool
[src]
Checks if the value of the field is ADD7
pub fn is_add10(&self) -> bool
[src]
Checks if the value of the field is ADD10
impl R<u32, Reg<u32, _OAR1>>
[src]
pub fn addmode(&self) -> ADDMODE_R
[src]
Bit 15 - Addressing mode (slave mode)
pub fn add(&self) -> ADD_R
[src]
Bits 0:9 - Interface address
impl R<bool, ENDUAL_A>
[src]
pub fn variant(&self) -> ENDUAL_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u32, Reg<u32, _OAR2>>
[src]
pub fn add2(&self) -> ADD2_R
[src]
Bits 1:7 - Interface address
pub fn endual(&self) -> ENDUAL_R
[src]
Bit 0 - Dual addressing mode enable
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, SMBALERT_A>
[src]
pub fn variant(&self) -> SMBALERT_A
[src]
Get enumerated values variant
pub fn is_no_alert(&self) -> bool
[src]
Checks if the value of the field is NOALERT
pub fn is_alert(&self) -> bool
[src]
Checks if the value of the field is ALERT
impl R<bool, TIMEOUT_A>
[src]
pub fn variant(&self) -> TIMEOUT_A
[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool
[src]
Checks if the value of the field is NOTIMEOUT
pub fn is_timeout(&self) -> bool
[src]
Checks if the value of the field is TIMEOUT
impl R<bool, PECERR_A>
[src]
pub fn variant(&self) -> PECERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, AF_A>
[src]
pub fn variant(&self) -> AF_A
[src]
Get enumerated values variant
pub fn is_no_failure(&self) -> bool
[src]
Checks if the value of the field is NOFAILURE
pub fn is_failure(&self) -> bool
[src]
Checks if the value of the field is FAILURE
impl R<bool, ARLO_A>
[src]
pub fn variant(&self) -> ARLO_A
[src]
Get enumerated values variant
pub fn is_no_lost(&self) -> bool
[src]
Checks if the value of the field is NOLOST
pub fn is_lost(&self) -> bool
[src]
Checks if the value of the field is LOST
impl R<bool, BERR_A>
[src]
pub fn variant(&self) -> BERR_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<bool, STOPF_A>
[src]
pub fn variant(&self) -> STOPF_A
[src]
Get enumerated values variant
pub fn is_no_stop(&self) -> bool
[src]
Checks if the value of the field is NOSTOP
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<bool, BTF_A>
[src]
pub fn variant(&self) -> BTF_A
[src]
Get enumerated values variant
pub fn is_not_finished(&self) -> bool
[src]
Checks if the value of the field is NOTFINISHED
pub fn is_finished(&self) -> bool
[src]
Checks if the value of the field is FINISHED
impl R<bool, ADDR_A>
[src]
pub fn variant(&self) -> ADDR_A
[src]
Get enumerated values variant
pub fn is_not_match(&self) -> bool
[src]
Checks if the value of the field is NOTMATCH
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, SB_A>
[src]
pub fn variant(&self) -> SB_A
[src]
Get enumerated values variant
pub fn is_no_start(&self) -> bool
[src]
Checks if the value of the field is NOSTART
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
impl R<u32, Reg<u32, _SR1>>
[src]
pub fn smbalert(&self) -> SMBALERT_R
[src]
Bit 15 - SMBus alert
pub fn timeout(&self) -> TIMEOUT_R
[src]
Bit 14 - Timeout or Tlow error
pub fn pecerr(&self) -> PECERR_R
[src]
Bit 12 - PEC Error in reception
pub fn ovr(&self) -> OVR_R
[src]
Bit 11 - Overrun/Underrun
pub fn af(&self) -> AF_R
[src]
Bit 10 - Acknowledge failure
pub fn arlo(&self) -> ARLO_R
[src]
Bit 9 - Arbitration lost (master mode)
pub fn berr(&self) -> BERR_R
[src]
Bit 8 - Bus error
pub fn tx_e(&self) -> TXE_R
[src]
Bit 7 - Data register empty (transmitters)
pub fn rx_ne(&self) -> RXNE_R
[src]
Bit 6 - Data register not empty (receivers)
pub fn stopf(&self) -> STOPF_R
[src]
Bit 4 - Stop detection (slave mode)
pub fn add10(&self) -> ADD10_R
[src]
Bit 3 - 10-bit header sent (Master mode)
pub fn btf(&self) -> BTF_R
[src]
Bit 2 - Byte transfer finished
pub fn addr(&self) -> ADDR_R
[src]
Bit 1 - Address sent (master mode)/matched (slave mode)
pub fn sb(&self) -> SB_R
[src]
Bit 0 - Start bit (Master mode)
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn pec(&self) -> PEC_R
[src]
Bits 8:15 - acket error checking register
pub fn dualf(&self) -> DUALF_R
[src]
Bit 7 - Dual flag (Slave mode)
pub fn smbhost(&self) -> SMBHOST_R
[src]
Bit 6 - SMBus host header (Slave mode)
pub fn smbdefault(&self) -> SMBDEFAULT_R
[src]
Bit 5 - SMBus device default address (Slave mode)
pub fn gencall(&self) -> GENCALL_R
[src]
Bit 4 - General call address (Slave mode)
pub fn tra(&self) -> TRA_R
[src]
Bit 2 - Transmitter/receiver
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Bus busy
pub fn msl(&self) -> MSL_R
[src]
Bit 0 - Master/slave
impl R<bool, F_S_A>
[src]
pub fn variant(&self) -> F_S_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_fast(&self) -> bool
[src]
Checks if the value of the field is FAST
impl R<bool, DUTY_A>
[src]
pub fn variant(&self) -> DUTY_A
[src]
Get enumerated values variant
pub fn is_duty2_1(&self) -> bool
[src]
Checks if the value of the field is DUTY2_1
pub fn is_duty16_9(&self) -> bool
[src]
Checks if the value of the field is DUTY16_9
impl R<u32, Reg<u32, _CCR>>
[src]
pub fn f_s(&self) -> F_S_R
[src]
Bit 15 - I2C master mode selection
pub fn duty(&self) -> DUTY_R
[src]
Bit 14 - Fast mode duty cycle
pub fn ccr(&self) -> CCR_R
[src]
Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)
impl R<u32, Reg<u32, _TRISE>>
[src]
impl R<bool, BIDIMODE_A>
[src]
pub fn variant(&self) -> BIDIMODE_A
[src]
Get enumerated values variant
pub fn is_unidirectional(&self) -> bool
[src]
Checks if the value of the field is UNIDIRECTIONAL
pub fn is_bidirectional(&self) -> bool
[src]
Checks if the value of the field is BIDIRECTIONAL
impl R<bool, BIDIOE_A>
[src]
pub fn variant(&self) -> BIDIOE_A
[src]
Get enumerated values variant
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
pub fn is_output_enabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTENABLED
impl R<bool, CRCEN_A>
[src]
pub fn variant(&self) -> CRCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CRCNEXT_A>
[src]
pub fn variant(&self) -> CRCNEXT_A
[src]
Get enumerated values variant
pub fn is_tx_buffer(&self) -> bool
[src]
Checks if the value of the field is TXBUFFER
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
impl R<bool, DFF_A>
[src]
pub fn variant(&self) -> DFF_A
[src]
Get enumerated values variant
pub fn is_eight_bit(&self) -> bool
[src]
Checks if the value of the field is EIGHTBIT
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
impl R<bool, RXONLY_A>
[src]
pub fn variant(&self) -> RXONLY_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_output_disabled(&self) -> bool
[src]
Checks if the value of the field is OUTPUTDISABLED
impl R<bool, SSM_A>
[src]
pub fn variant(&self) -> SSM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SSI_A>
[src]
pub fn variant(&self) -> SSI_A
[src]
Get enumerated values variant
pub fn is_slave_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVESELECTED
pub fn is_slave_not_selected(&self) -> bool
[src]
Checks if the value of the field is SLAVENOTSELECTED
impl R<bool, LSBFIRST_A>
[src]
pub fn variant(&self) -> LSBFIRST_A
[src]
Get enumerated values variant
pub fn is_msbfirst(&self) -> bool
[src]
Checks if the value of the field is MSBFIRST
pub fn is_lsbfirst(&self) -> bool
[src]
Checks if the value of the field is LSBFIRST
impl R<bool, SPE_A>
[src]
pub fn variant(&self) -> SPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BR_A>
[src]
pub fn variant(&self) -> BR_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
impl R<bool, MSTR_A>
[src]
pub fn variant(&self) -> MSTR_A
[src]
Get enumerated values variant
pub fn is_slave(&self) -> bool
[src]
Checks if the value of the field is SLAVE
pub fn is_master(&self) -> bool
[src]
Checks if the value of the field is MASTER
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first_edge(&self) -> bool
[src]
Checks if the value of the field is FIRSTEDGE
pub fn is_second_edge(&self) -> bool
[src]
Checks if the value of the field is SECONDEDGE
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn bidimode(&self) -> BIDIMODE_R
[src]
Bit 15 - Bidirectional data mode enable
pub fn bidioe(&self) -> BIDIOE_R
[src]
Bit 14 - Output enable in bidirectional mode
pub fn crcen(&self) -> CRCEN_R
[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnext(&self) -> CRCNEXT_R
[src]
Bit 12 - CRC transfer next
pub fn dff(&self) -> DFF_R
[src]
Bit 11 - Data frame format
pub fn rxonly(&self) -> RXONLY_R
[src]
Bit 10 - Receive only
pub fn ssm(&self) -> SSM_R
[src]
Bit 9 - Software slave management
pub fn ssi(&self) -> SSI_R
[src]
Bit 8 - Internal slave select
pub fn lsbfirst(&self) -> LSBFIRST_R
[src]
Bit 7 - Frame format
pub fn spe(&self) -> SPE_R
[src]
Bit 6 - SPI enable
pub fn br(&self) -> BR_R
[src]
Bits 3:5 - Baud rate control
pub fn mstr(&self) -> MSTR_R
[src]
Bit 2 - Master selection
pub fn cpol(&self) -> CPOL_R
[src]
Bit 1 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 0 - Clock phase
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
pub fn is_not_masked(&self) -> bool
[src]
Checks if the value of the field is NOTMASKED
impl R<bool, SSOE_A>
[src]
pub fn variant(&self) -> SSOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXDMAEN_A>
[src]
pub fn variant(&self) -> TXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXDMAEN_A>
[src]
pub fn variant(&self) -> RXDMAEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 5 - Error interrupt enable
pub fn ssoe(&self) -> SSOE_R
[src]
Bit 2 - SS output enable
pub fn txdmaen(&self) -> TXDMAEN_R
[src]
Bit 1 - Tx buffer DMA enable
pub fn rxdmaen(&self) -> RXDMAEN_R
[src]
Bit 0 - Rx buffer DMA enable
impl R<bool, BSY_A>
[src]
pub fn variant(&self) -> BSY_A
[src]
Get enumerated values variant
pub fn is_not_busy(&self) -> bool
[src]
Checks if the value of the field is NOTBUSY
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, OVR_A>
[src]
pub fn variant(&self) -> OVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, MODF_A>
[src]
pub fn variant(&self) -> MODF_A
[src]
Get enumerated values variant
pub fn is_no_fault(&self) -> bool
[src]
Checks if the value of the field is NOFAULT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<bool, CRCERR_A>
[src]
pub fn variant(&self) -> CRCERR_A
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
pub fn is_no_match(&self) -> bool
[src]
Checks if the value of the field is NOMATCH
impl R<bool, UDR_A>
[src]
pub fn variant(&self) -> UDR_A
[src]
Get enumerated values variant
pub fn is_no_underrun(&self) -> bool
[src]
Checks if the value of the field is NOUNDERRUN
pub fn is_underrun(&self) -> bool
[src]
Checks if the value of the field is UNDERRUN
impl R<bool, CHSIDE_A>
[src]
pub fn variant(&self) -> CHSIDE_A
[src]
Get enumerated values variant
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
impl R<bool, TXE_A>
[src]
pub fn variant(&self) -> TXE_A
[src]
Get enumerated values variant
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
impl R<bool, RXNE_A>
[src]
pub fn variant(&self) -> RXNE_A
[src]
Get enumerated values variant
pub fn is_empty(&self) -> bool
[src]
Checks if the value of the field is EMPTY
pub fn is_not_empty(&self) -> bool
[src]
Checks if the value of the field is NOTEMPTY
impl R<u32, Reg<u32, _SR>>
[src]
pub fn bsy(&self) -> BSY_R
[src]
Bit 7 - Busy flag
pub fn ovr(&self) -> OVR_R
[src]
Bit 6 - Overrun flag
pub fn modf(&self) -> MODF_R
[src]
Bit 5 - Mode fault
pub fn crcerr(&self) -> CRCERR_R
[src]
Bit 4 - CRC error flag
pub fn udr(&self) -> UDR_R
[src]
Bit 3 - Underrun flag
pub fn chside(&self) -> CHSIDE_R
[src]
Bit 2 - Channel side
pub fn txe(&self) -> TXE_R
[src]
Bit 1 - Transmit buffer empty
pub fn rxne(&self) -> RXNE_R
[src]
Bit 0 - Receive buffer not empty
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _CRCPR>>
[src]
impl R<u32, Reg<u32, _RXCRCR>>
[src]
impl R<u32, Reg<u32, _TXCRCR>>
[src]
impl R<bool, I2SMOD_A>
[src]
pub fn variant(&self) -> I2SMOD_A
[src]
Get enumerated values variant
pub fn is_spimode(&self) -> bool
[src]
Checks if the value of the field is SPIMODE
pub fn is_i2smode(&self) -> bool
[src]
Checks if the value of the field is I2SMODE
impl R<bool, I2SE_A>
[src]
pub fn variant(&self) -> I2SE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, I2SCFG_A>
[src]
pub fn variant(&self) -> I2SCFG_A
[src]
Get enumerated values variant
pub fn is_slave_tx(&self) -> bool
[src]
Checks if the value of the field is SLAVETX
pub fn is_slave_rx(&self) -> bool
[src]
Checks if the value of the field is SLAVERX
pub fn is_master_tx(&self) -> bool
[src]
Checks if the value of the field is MASTERTX
pub fn is_master_rx(&self) -> bool
[src]
Checks if the value of the field is MASTERRX
impl R<bool, PCMSYNC_A>
[src]
pub fn variant(&self) -> PCMSYNC_A
[src]
Get enumerated values variant
pub fn is_short(&self) -> bool
[src]
Checks if the value of the field is SHORT
pub fn is_long(&self) -> bool
[src]
Checks if the value of the field is LONG
impl R<u8, I2SSTD_A>
[src]
pub fn variant(&self) -> I2SSTD_A
[src]
Get enumerated values variant
pub fn is_philips(&self) -> bool
[src]
Checks if the value of the field is PHILIPS
pub fn is_msb(&self) -> bool
[src]
Checks if the value of the field is MSB
pub fn is_lsb(&self) -> bool
[src]
Checks if the value of the field is LSB
pub fn is_pcm(&self) -> bool
[src]
Checks if the value of the field is PCM
impl R<bool, CKPOL_A>
[src]
pub fn variant(&self) -> CKPOL_A
[src]
Get enumerated values variant
pub fn is_idle_low(&self) -> bool
[src]
Checks if the value of the field is IDLELOW
pub fn is_idle_high(&self) -> bool
[src]
Checks if the value of the field is IDLEHIGH
impl R<u8, DATLEN_A>
[src]
pub fn variant(&self) -> Variant<u8, DATLEN_A>
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_twenty_four_bit(&self) -> bool
[src]
Checks if the value of the field is TWENTYFOURBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<bool, CHLEN_A>
[src]
pub fn variant(&self) -> CHLEN_A
[src]
Get enumerated values variant
pub fn is_sixteen_bit(&self) -> bool
[src]
Checks if the value of the field is SIXTEENBIT
pub fn is_thirty_two_bit(&self) -> bool
[src]
Checks if the value of the field is THIRTYTWOBIT
impl R<u32, Reg<u32, _I2SCFGR>>
[src]
pub fn i2smod(&self) -> I2SMOD_R
[src]
Bit 11 - I2S mode selection
pub fn i2se(&self) -> I2SE_R
[src]
Bit 10 - I2S Enable
pub fn i2scfg(&self) -> I2SCFG_R
[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsync(&self) -> PCMSYNC_R
[src]
Bit 7 - PCM frame synchronization
pub fn i2sstd(&self) -> I2SSTD_R
[src]
Bits 4:5 - I2S standard selection
pub fn ckpol(&self) -> CKPOL_R
[src]
Bit 3 - Steady state clock polarity
pub fn datlen(&self) -> DATLEN_R
[src]
Bits 1:2 - Data length to be transferred
pub fn chlen(&self) -> CHLEN_R
[src]
Bit 0 - Channel length (number of bits per audio channel)
impl R<bool, MCKOE_A>
[src]
pub fn variant(&self) -> MCKOE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ODD_A>
[src]
pub fn variant(&self) -> ODD_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<u32, Reg<u32, _I2SPR>>
[src]
pub fn mckoe(&self) -> MCKOE_R
[src]
Bit 9 - Master clock output enable
pub fn odd(&self) -> ODD_R
[src]
Bit 8 - Odd factor for the prescaler
pub fn i2sdiv(&self) -> I2SDIV_R
[src]
Bits 0:7 - I2S Linear prescaler
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cts(&self) -> CTS_R
[src]
Bit 9 - CTS flag
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - mantissa of USARTDIV
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - fraction of USARTDIV
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> STOP_A
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool
[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool
[src]
Checks if the value of the field is STOP1P5
impl R<bool, CLKEN_A>
[src]
pub fn variant(&self) -> CLKEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CPOL_A>
[src]
pub fn variant(&self) -> CPOL_A
[src]
Get enumerated values variant
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<bool, CPHA_A>
[src]
pub fn variant(&self) -> CPHA_A
[src]
Get enumerated values variant
pub fn is_first(&self) -> bool
[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool
[src]
Checks if the value of the field is SECOND
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn clken(&self) -> CLKEN_R
[src]
Bit 11 - Clock enable
pub fn cpol(&self) -> CPOL_R
[src]
Bit 10 - Clock polarity
pub fn cpha(&self) -> CPHA_R
[src]
Bit 9 - Clock phase
pub fn lbcl(&self) -> LBCL_R
[src]
Bit 8 - Last bit clock pulse
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
impl R<bool, CTSIE_A>
[src]
pub fn variant(&self) -> CTSIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSE_A>
[src]
pub fn variant(&self) -> CTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSE_A>
[src]
pub fn variant(&self) -> RTSE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>
[src]
pub fn variant(&self) -> SCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, NACK_A>
[src]
pub fn variant(&self) -> NACK_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn ctsie(&self) -> CTSIE_R
[src]
Bit 10 - CTS interrupt enable
pub fn ctse(&self) -> CTSE_R
[src]
Bit 9 - CTS enable
pub fn rtse(&self) -> RTSE_R
[src]
Bit 8 - RTS enable
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn scen(&self) -> SCEN_R
[src]
Bit 5 - Smartcard mode enable
pub fn nack(&self) -> NACK_R
[src]
Bit 4 - Smartcard NACK enable
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _GTPR>>
[src]
pub fn gt(&self) -> GT_R
[src]
Bits 8:15 - Guard time value
pub fn psc(&self) -> PSC_R
[src]
Bits 0:7 - Prescaler value
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, DUALMOD_A>
[src]
pub fn variant(&self) -> Variant<u8, DUALMOD_A>
[src]
Get enumerated values variant
pub fn is_independent(&self) -> bool
[src]
Checks if the value of the field is INDEPENDENT
pub fn is_regular_injected(&self) -> bool
[src]
Checks if the value of the field is REGULARINJECTED
pub fn is_regular_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is REGULARALTERNATETRIGGER
pub fn is_injected_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDFASTINTERLEAVED
pub fn is_injected_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is INJECTEDSLOWINTERLEAVED
pub fn is_injected(&self) -> bool
[src]
Checks if the value of the field is INJECTED
pub fn is_regular(&self) -> bool
[src]
Checks if the value of the field is REGULAR
pub fn is_fast_interleaved(&self) -> bool
[src]
Checks if the value of the field is FASTINTERLEAVED
pub fn is_slow_interleaved(&self) -> bool
[src]
Checks if the value of the field is SLOWINTERLEAVED
pub fn is_alternate_trigger(&self) -> bool
[src]
Checks if the value of the field is ALTERNATETRIGGER
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn dualmod(&self) -> DUALMOD_R
[src]
Bits 16:19 - Dual mode selection
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sampling time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sampling time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sampling time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sampling time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sampling time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sampling time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sampling time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sampling time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sampling time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sampling time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sampling time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sampling time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sampling time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sampling time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sampling time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sampling time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sampling time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sampling time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
pub fn data(&self) -> DATA_R
[src]
Bits 0:15 - Regular data
pub fn adc2data(&self) -> ADC2DATA_R
[src]
Bits 16:31 - ADC2 data
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1cc1(&self) -> bool
[src]
Checks if the value of the field is TIM1CC1
pub fn is_tim1cc2(&self) -> bool
[src]
Checks if the value of the field is TIM1CC2
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim2cc2(&self) -> bool
[src]
Checks if the value of the field is TIM2CC2
pub fn is_tim3trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3TRGO
pub fn is_tim4cc4(&self) -> bool
[src]
Checks if the value of the field is TIM4CC4
pub fn is_exti11(&self) -> bool
[src]
Checks if the value of the field is EXTI11
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim2trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2TRGO
pub fn is_tim2cc1(&self) -> bool
[src]
Checks if the value of the field is TIM2CC1
pub fn is_tim3cc4(&self) -> bool
[src]
Checks if the value of the field is TIM3CC4
pub fn is_tim4trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4TRGO
pub fn is_exti15(&self) -> bool
[src]
Checks if the value of the field is EXTI15
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sampling time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sampling time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sampling time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sampling time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sampling time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sampling time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sampling time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sampling time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
[src]
pub fn smp0(&self) -> SMP0_R
[src]
Bits 0:2 - Channel 0 sampling time selection
pub fn smp1(&self) -> SMP1_R
[src]
Bits 3:5 - Channel 1 sampling time selection
pub fn smp2(&self) -> SMP2_R
[src]
Bits 6:8 - Channel 2 sampling time selection
pub fn smp3(&self) -> SMP3_R
[src]
Bits 9:11 - Channel 3 sampling time selection
pub fn smp4(&self) -> SMP4_R
[src]
Bits 12:14 - Channel 4 sampling time selection
pub fn smp5(&self) -> SMP5_R
[src]
Bits 15:17 - Channel 5 sampling time selection
pub fn smp6(&self) -> SMP6_R
[src]
Bits 18:20 - Channel 6 sampling time selection
pub fn smp7(&self) -> SMP7_R
[src]
Bits 21:23 - Channel 7 sampling time selection
pub fn smp8(&self) -> SMP8_R
[src]
Bits 24:26 - Channel 8 sampling time selection
pub fn smp9(&self) -> SMP9_R
[src]
Bits 27:29 - Channel 9 sampling time selection
impl R<u32, Reg<u32, _JOFR1>>
[src]
pub fn joffset1(&self) -> JOFFSET1_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
[src]
pub fn joffset2(&self) -> JOFFSET2_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
[src]
pub fn joffset3(&self) -> JOFFSET3_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
[src]
pub fn joffset4(&self) -> JOFFSET4_R
[src]
Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
[src]
impl R<u32, Reg<u32, _LTR>>
[src]
impl R<u32, Reg<u32, _SQR1>>
[src]
pub fn l(&self) -> L_R
[src]
Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
[src]
pub fn sq12(&self) -> SQ12_R
[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
[src]
pub fn sq6(&self) -> SQ6_R
[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
[src]
pub fn jl(&self) -> JL_R
[src]
Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
[src]
impl R<u32, Reg<u32, _JDR2>>
[src]
impl R<u32, Reg<u32, _JDR3>>
[src]
impl R<u32, Reg<u32, _JDR4>>
[src]
impl R<u32, Reg<u32, _DR>>
[src]
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _TIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
pub fn txrq(&self) -> TXRQ_R
[src]
Bit 0 - TXRQ
impl R<u32, Reg<u32, _TDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn tgt(&self) -> TGT_R
[src]
Bit 8 - TGT
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _TDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _TDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _RIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
impl R<u32, Reg<u32, _RDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn fmi(&self) -> FMI_R
[src]
Bits 8:15 - FMI
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _RDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _RDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _MCR>>
[src]
pub fn dbf(&self) -> DBF_R
[src]
Bit 16 - DBF
pub fn reset(&self) -> RESET_R
[src]
Bit 15 - RESET
pub fn ttcm(&self) -> TTCM_R
[src]
Bit 7 - TTCM
pub fn abom(&self) -> ABOM_R
[src]
Bit 6 - ABOM
pub fn awum(&self) -> AWUM_R
[src]
Bit 5 - AWUM
pub fn nart(&self) -> NART_R
[src]
Bit 4 - NART
pub fn rflm(&self) -> RFLM_R
[src]
Bit 3 - RFLM
pub fn txfp(&self) -> TXFP_R
[src]
Bit 2 - TXFP
pub fn sleep(&self) -> SLEEP_R
[src]
Bit 1 - SLEEP
pub fn inrq(&self) -> INRQ_R
[src]
Bit 0 - INRQ
impl R<u32, Reg<u32, _MSR>>
[src]
pub fn rx(&self) -> RX_R
[src]
Bit 11 - RX
pub fn samp(&self) -> SAMP_R
[src]
Bit 10 - SAMP
pub fn rxm(&self) -> RXM_R
[src]
Bit 9 - RXM
pub fn txm(&self) -> TXM_R
[src]
Bit 8 - TXM
pub fn slaki(&self) -> SLAKI_R
[src]
Bit 4 - SLAKI
pub fn wkui(&self) -> WKUI_R
[src]
Bit 3 - WKUI
pub fn erri(&self) -> ERRI_R
[src]
Bit 2 - ERRI
pub fn slak(&self) -> SLAK_R
[src]
Bit 1 - SLAK
pub fn inak(&self) -> INAK_R
[src]
Bit 0 - INAK
impl R<u32, Reg<u32, _TSR>>
[src]
pub fn low2(&self) -> LOW2_R
[src]
Bit 31 - Lowest priority flag for mailbox 2
pub fn low1(&self) -> LOW1_R
[src]
Bit 30 - Lowest priority flag for mailbox 1
pub fn low0(&self) -> LOW0_R
[src]
Bit 29 - Lowest priority flag for mailbox 0
pub fn tme2(&self) -> TME2_R
[src]
Bit 28 - Lowest priority flag for mailbox 2
pub fn tme1(&self) -> TME1_R
[src]
Bit 27 - Lowest priority flag for mailbox 1
pub fn tme0(&self) -> TME0_R
[src]
Bit 26 - Lowest priority flag for mailbox 0
pub fn code(&self) -> CODE_R
[src]
Bits 24:25 - CODE
pub fn abrq2(&self) -> ABRQ2_R
[src]
Bit 23 - ABRQ2
pub fn terr2(&self) -> TERR2_R
[src]
Bit 19 - TERR2
pub fn alst2(&self) -> ALST2_R
[src]
Bit 18 - ALST2
pub fn txok2(&self) -> TXOK2_R
[src]
Bit 17 - TXOK2
pub fn rqcp2(&self) -> RQCP2_R
[src]
Bit 16 - RQCP2
pub fn abrq1(&self) -> ABRQ1_R
[src]
Bit 15 - ABRQ1
pub fn terr1(&self) -> TERR1_R
[src]
Bit 11 - TERR1
pub fn alst1(&self) -> ALST1_R
[src]
Bit 10 - ALST1
pub fn txok1(&self) -> TXOK1_R
[src]
Bit 9 - TXOK1
pub fn rqcp1(&self) -> RQCP1_R
[src]
Bit 8 - RQCP1
pub fn abrq0(&self) -> ABRQ0_R
[src]
Bit 7 - ABRQ0
pub fn terr0(&self) -> TERR0_R
[src]
Bit 3 - TERR0
pub fn alst0(&self) -> ALST0_R
[src]
Bit 2 - ALST0
pub fn txok0(&self) -> TXOK0_R
[src]
Bit 1 - TXOK0
pub fn rqcp0(&self) -> RQCP0_R
[src]
Bit 0 - RQCP0
impl R<bool, RFOM_A>
[src]
pub fn variant(&self) -> Variant<bool, RFOM_A>
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
impl R<bool, FOVR_A>
[src]
pub fn variant(&self) -> FOVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, FULL_A>
[src]
pub fn variant(&self) -> FULL_A
[src]
Get enumerated values variant
pub fn is_not_full(&self) -> bool
[src]
Checks if the value of the field is NOTFULL
pub fn is_full(&self) -> bool
[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _RFR>>
[src]
pub fn rfom(&self) -> RFOM_R
[src]
Bit 5 - RFOM0
pub fn fovr(&self) -> FOVR_R
[src]
Bit 4 - FOVR0
pub fn full(&self) -> FULL_R
[src]
Bit 3 - FULL0
pub fn fmp(&self) -> FMP_R
[src]
Bits 0:1 - FMP0
impl R<bool, SLKIE_A>
[src]
pub fn variant(&self) -> SLKIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUIE_A>
[src]
pub fn variant(&self) -> WKUIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LECIE_A>
[src]
pub fn variant(&self) -> LECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFIE_A>
[src]
pub fn variant(&self) -> BOFIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EPVIE_A>
[src]
pub fn variant(&self) -> EPVIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EWGIE_A>
[src]
pub fn variant(&self) -> EWGIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE1_A>
[src]
pub fn variant(&self) -> FOVIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE1_A>
[src]
pub fn variant(&self) -> FFIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE1_A>
[src]
pub fn variant(&self) -> FMPIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE0_A>
[src]
pub fn variant(&self) -> FOVIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE0_A>
[src]
pub fn variant(&self) -> FFIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE0_A>
[src]
pub fn variant(&self) -> FMPIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TMEIE_A>
[src]
pub fn variant(&self) -> TMEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _IER>>
[src]
pub fn slkie(&self) -> SLKIE_R
[src]
Bit 17 - SLKIE
pub fn wkuie(&self) -> WKUIE_R
[src]
Bit 16 - WKUIE
pub fn errie(&self) -> ERRIE_R
[src]
Bit 15 - ERRIE
pub fn lecie(&self) -> LECIE_R
[src]
Bit 11 - LECIE
pub fn bofie(&self) -> BOFIE_R
[src]
Bit 10 - BOFIE
pub fn epvie(&self) -> EPVIE_R
[src]
Bit 9 - EPVIE
pub fn ewgie(&self) -> EWGIE_R
[src]
Bit 8 - EWGIE
pub fn fovie1(&self) -> FOVIE1_R
[src]
Bit 6 - FOVIE1
pub fn ffie1(&self) -> FFIE1_R
[src]
Bit 5 - FFIE1
pub fn fmpie1(&self) -> FMPIE1_R
[src]
Bit 4 - FMPIE1
pub fn fovie0(&self) -> FOVIE0_R
[src]
Bit 3 - FOVIE0
pub fn ffie0(&self) -> FFIE0_R
[src]
Bit 2 - FFIE0
pub fn fmpie0(&self) -> FMPIE0_R
[src]
Bit 1 - FMPIE0
pub fn tmeie(&self) -> TMEIE_R
[src]
Bit 0 - TMEIE
impl R<u8, LEC_A>
[src]
pub fn variant(&self) -> LEC_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_stuff(&self) -> bool
[src]
Checks if the value of the field is STUFF
pub fn is_form(&self) -> bool
[src]
Checks if the value of the field is FORM
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
pub fn is_bit_recessive(&self) -> bool
[src]
Checks if the value of the field is BITRECESSIVE
pub fn is_bit_dominant(&self) -> bool
[src]
Checks if the value of the field is BITDOMINANT
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
pub fn is_custom(&self) -> bool
[src]
Checks if the value of the field is CUSTOM
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn rec(&self) -> REC_R
[src]
Bits 24:31 - REC
pub fn tec(&self) -> TEC_R
[src]
Bits 16:23 - TEC
pub fn lec(&self) -> LEC_R
[src]
Bits 4:6 - LEC
pub fn boff(&self) -> BOFF_R
[src]
Bit 2 - BOFF
pub fn epvf(&self) -> EPVF_R
[src]
Bit 1 - EPVF
pub fn ewgf(&self) -> EWGF_R
[src]
Bit 0 - EWGF
impl R<bool, SILM_A>
[src]
pub fn variant(&self) -> SILM_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_silent(&self) -> bool
[src]
Checks if the value of the field is SILENT
impl R<bool, LBKM_A>
[src]
pub fn variant(&self) -> LBKM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn silm(&self) -> SILM_R
[src]
Bit 31 - SILM
pub fn lbkm(&self) -> LBKM_R
[src]
Bit 30 - LBKM
pub fn sjw(&self) -> SJW_R
[src]
Bits 24:25 - SJW
pub fn ts2(&self) -> TS2_R
[src]
Bits 20:22 - TS2
pub fn ts1(&self) -> TS1_R
[src]
Bits 16:19 - TS1
pub fn brp(&self) -> BRP_R
[src]
Bits 0:9 - BRP
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _TIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
pub fn txrq(&self) -> TXRQ_R
[src]
Bit 0 - TXRQ
impl R<u32, Reg<u32, _TDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn tgt(&self) -> TGT_R
[src]
Bit 8 - TGT
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _TDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _TDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<bool, IDE_A>
[src]
pub fn variant(&self) -> IDE_A
[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool
[src]
Checks if the value of the field is STANDARD
pub fn is_extended(&self) -> bool
[src]
Checks if the value of the field is EXTENDED
impl R<bool, RTR_A>
[src]
pub fn variant(&self) -> RTR_A
[src]
Get enumerated values variant
pub fn is_data(&self) -> bool
[src]
Checks if the value of the field is DATA
pub fn is_remote(&self) -> bool
[src]
Checks if the value of the field is REMOTE
impl R<u32, Reg<u32, _RIR>>
[src]
pub fn stid(&self) -> STID_R
[src]
Bits 21:31 - STID
pub fn exid(&self) -> EXID_R
[src]
Bits 3:20 - EXID
pub fn ide(&self) -> IDE_R
[src]
Bit 2 - IDE
pub fn rtr(&self) -> RTR_R
[src]
Bit 1 - RTR
impl R<u32, Reg<u32, _RDTR>>
[src]
pub fn time(&self) -> TIME_R
[src]
Bits 16:31 - TIME
pub fn fmi(&self) -> FMI_R
[src]
Bits 8:15 - FMI
pub fn dlc(&self) -> DLC_R
[src]
Bits 0:3 - DLC
impl R<u32, Reg<u32, _RDLR>>
[src]
pub fn data3(&self) -> DATA3_R
[src]
Bits 24:31 - DATA3
pub fn data2(&self) -> DATA2_R
[src]
Bits 16:23 - DATA2
pub fn data1(&self) -> DATA1_R
[src]
Bits 8:15 - DATA1
pub fn data0(&self) -> DATA0_R
[src]
Bits 0:7 - DATA0
impl R<u32, Reg<u32, _RDHR>>
[src]
pub fn data7(&self) -> DATA7_R
[src]
Bits 24:31 - DATA7
pub fn data6(&self) -> DATA6_R
[src]
Bits 16:23 - DATA6
pub fn data5(&self) -> DATA5_R
[src]
Bits 8:15 - DATA5
pub fn data4(&self) -> DATA4_R
[src]
Bits 0:7 - DATA4
impl R<u32, Reg<u32, _FR1>>
[src]
impl R<u32, Reg<u32, _FR2>>
[src]
impl R<u32, Reg<u32, _MCR>>
[src]
pub fn dbf(&self) -> DBF_R
[src]
Bit 16 - DBF
pub fn reset(&self) -> RESET_R
[src]
Bit 15 - RESET
pub fn ttcm(&self) -> TTCM_R
[src]
Bit 7 - TTCM
pub fn abom(&self) -> ABOM_R
[src]
Bit 6 - ABOM
pub fn awum(&self) -> AWUM_R
[src]
Bit 5 - AWUM
pub fn nart(&self) -> NART_R
[src]
Bit 4 - NART
pub fn rflm(&self) -> RFLM_R
[src]
Bit 3 - RFLM
pub fn txfp(&self) -> TXFP_R
[src]
Bit 2 - TXFP
pub fn sleep(&self) -> SLEEP_R
[src]
Bit 1 - SLEEP
pub fn inrq(&self) -> INRQ_R
[src]
Bit 0 - INRQ
impl R<u32, Reg<u32, _MSR>>
[src]
pub fn rx(&self) -> RX_R
[src]
Bit 11 - RX
pub fn samp(&self) -> SAMP_R
[src]
Bit 10 - SAMP
pub fn rxm(&self) -> RXM_R
[src]
Bit 9 - RXM
pub fn txm(&self) -> TXM_R
[src]
Bit 8 - TXM
pub fn slaki(&self) -> SLAKI_R
[src]
Bit 4 - SLAKI
pub fn wkui(&self) -> WKUI_R
[src]
Bit 3 - WKUI
pub fn erri(&self) -> ERRI_R
[src]
Bit 2 - ERRI
pub fn slak(&self) -> SLAK_R
[src]
Bit 1 - SLAK
pub fn inak(&self) -> INAK_R
[src]
Bit 0 - INAK
impl R<u32, Reg<u32, _TSR>>
[src]
pub fn low2(&self) -> LOW2_R
[src]
Bit 31 - Lowest priority flag for mailbox 2
pub fn low1(&self) -> LOW1_R
[src]
Bit 30 - Lowest priority flag for mailbox 1
pub fn low0(&self) -> LOW0_R
[src]
Bit 29 - Lowest priority flag for mailbox 0
pub fn tme2(&self) -> TME2_R
[src]
Bit 28 - Lowest priority flag for mailbox 2
pub fn tme1(&self) -> TME1_R
[src]
Bit 27 - Lowest priority flag for mailbox 1
pub fn tme0(&self) -> TME0_R
[src]
Bit 26 - Lowest priority flag for mailbox 0
pub fn code(&self) -> CODE_R
[src]
Bits 24:25 - CODE
pub fn abrq2(&self) -> ABRQ2_R
[src]
Bit 23 - ABRQ2
pub fn terr2(&self) -> TERR2_R
[src]
Bit 19 - TERR2
pub fn alst2(&self) -> ALST2_R
[src]
Bit 18 - ALST2
pub fn txok2(&self) -> TXOK2_R
[src]
Bit 17 - TXOK2
pub fn rqcp2(&self) -> RQCP2_R
[src]
Bit 16 - RQCP2
pub fn abrq1(&self) -> ABRQ1_R
[src]
Bit 15 - ABRQ1
pub fn terr1(&self) -> TERR1_R
[src]
Bit 11 - TERR1
pub fn alst1(&self) -> ALST1_R
[src]
Bit 10 - ALST1
pub fn txok1(&self) -> TXOK1_R
[src]
Bit 9 - TXOK1
pub fn rqcp1(&self) -> RQCP1_R
[src]
Bit 8 - RQCP1
pub fn abrq0(&self) -> ABRQ0_R
[src]
Bit 7 - ABRQ0
pub fn terr0(&self) -> TERR0_R
[src]
Bit 3 - TERR0
pub fn alst0(&self) -> ALST0_R
[src]
Bit 2 - ALST0
pub fn txok0(&self) -> TXOK0_R
[src]
Bit 1 - TXOK0
pub fn rqcp0(&self) -> RQCP0_R
[src]
Bit 0 - RQCP0
impl R<bool, RFOM_A>
[src]
pub fn variant(&self) -> Variant<bool, RFOM_A>
[src]
Get enumerated values variant
pub fn is_release(&self) -> bool
[src]
Checks if the value of the field is RELEASE
impl R<bool, FOVR_A>
[src]
pub fn variant(&self) -> FOVR_A
[src]
Get enumerated values variant
pub fn is_no_overrun(&self) -> bool
[src]
Checks if the value of the field is NOOVERRUN
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, FULL_A>
[src]
pub fn variant(&self) -> FULL_A
[src]
Get enumerated values variant
pub fn is_not_full(&self) -> bool
[src]
Checks if the value of the field is NOTFULL
pub fn is_full(&self) -> bool
[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _RFR>>
[src]
pub fn rfom(&self) -> RFOM_R
[src]
Bit 5 - RFOM0
pub fn fovr(&self) -> FOVR_R
[src]
Bit 4 - FOVR0
pub fn full(&self) -> FULL_R
[src]
Bit 3 - FULL0
pub fn fmp(&self) -> FMP_R
[src]
Bits 0:1 - FMP0
impl R<bool, SLKIE_A>
[src]
pub fn variant(&self) -> SLKIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUIE_A>
[src]
pub fn variant(&self) -> WKUIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>
[src]
pub fn variant(&self) -> ERRIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LECIE_A>
[src]
pub fn variant(&self) -> LECIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFIE_A>
[src]
pub fn variant(&self) -> BOFIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EPVIE_A>
[src]
pub fn variant(&self) -> EPVIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EWGIE_A>
[src]
pub fn variant(&self) -> EWGIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE1_A>
[src]
pub fn variant(&self) -> FOVIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE1_A>
[src]
pub fn variant(&self) -> FFIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE1_A>
[src]
pub fn variant(&self) -> FMPIE1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FOVIE0_A>
[src]
pub fn variant(&self) -> FOVIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FFIE0_A>
[src]
pub fn variant(&self) -> FFIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FMPIE0_A>
[src]
pub fn variant(&self) -> FMPIE0_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TMEIE_A>
[src]
pub fn variant(&self) -> TMEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _IER>>
[src]
pub fn slkie(&self) -> SLKIE_R
[src]
Bit 17 - SLKIE
pub fn wkuie(&self) -> WKUIE_R
[src]
Bit 16 - WKUIE
pub fn errie(&self) -> ERRIE_R
[src]
Bit 15 - ERRIE
pub fn lecie(&self) -> LECIE_R
[src]
Bit 11 - LECIE
pub fn bofie(&self) -> BOFIE_R
[src]
Bit 10 - BOFIE
pub fn epvie(&self) -> EPVIE_R
[src]
Bit 9 - EPVIE
pub fn ewgie(&self) -> EWGIE_R
[src]
Bit 8 - EWGIE
pub fn fovie1(&self) -> FOVIE1_R
[src]
Bit 6 - FOVIE1
pub fn ffie1(&self) -> FFIE1_R
[src]
Bit 5 - FFIE1
pub fn fmpie1(&self) -> FMPIE1_R
[src]
Bit 4 - FMPIE1
pub fn fovie0(&self) -> FOVIE0_R
[src]
Bit 3 - FOVIE0
pub fn ffie0(&self) -> FFIE0_R
[src]
Bit 2 - FFIE0
pub fn fmpie0(&self) -> FMPIE0_R
[src]
Bit 1 - FMPIE0
pub fn tmeie(&self) -> TMEIE_R
[src]
Bit 0 - TMEIE
impl R<u8, LEC_A>
[src]
pub fn variant(&self) -> LEC_A
[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool
[src]
Checks if the value of the field is NOERROR
pub fn is_stuff(&self) -> bool
[src]
Checks if the value of the field is STUFF
pub fn is_form(&self) -> bool
[src]
Checks if the value of the field is FORM
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
pub fn is_bit_recessive(&self) -> bool
[src]
Checks if the value of the field is BITRECESSIVE
pub fn is_bit_dominant(&self) -> bool
[src]
Checks if the value of the field is BITDOMINANT
pub fn is_crc(&self) -> bool
[src]
Checks if the value of the field is CRC
pub fn is_custom(&self) -> bool
[src]
Checks if the value of the field is CUSTOM
impl R<u32, Reg<u32, _ESR>>
[src]
pub fn rec(&self) -> REC_R
[src]
Bits 24:31 - REC
pub fn tec(&self) -> TEC_R
[src]
Bits 16:23 - TEC
pub fn lec(&self) -> LEC_R
[src]
Bits 4:6 - LEC
pub fn boff(&self) -> BOFF_R
[src]
Bit 2 - BOFF
pub fn epvf(&self) -> EPVF_R
[src]
Bit 1 - EPVF
pub fn ewgf(&self) -> EWGF_R
[src]
Bit 0 - EWGF
impl R<bool, SILM_A>
[src]
pub fn variant(&self) -> SILM_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_silent(&self) -> bool
[src]
Checks if the value of the field is SILENT
impl R<bool, LBKM_A>
[src]
pub fn variant(&self) -> LBKM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _BTR>>
[src]
pub fn silm(&self) -> SILM_R
[src]
Bit 31 - SILM
pub fn lbkm(&self) -> LBKM_R
[src]
Bit 30 - LBKM
pub fn sjw(&self) -> SJW_R
[src]
Bits 24:25 - SJW
pub fn ts2(&self) -> TS2_R
[src]
Bits 20:22 - TS2
pub fn ts1(&self) -> TS1_R
[src]
Bits 16:19 - TS1
pub fn brp(&self) -> BRP_R
[src]
Bits 0:9 - BRP
impl R<u32, Reg<u32, _FMR>>
[src]
pub fn can2sb(&self) -> CAN2SB_R
[src]
Bits 8:13 - CAN2SB
pub fn finit(&self) -> FINIT_R
[src]
Bit 0 - FINIT
impl R<u32, Reg<u32, _FM1R>>
[src]
pub fn fbm0(&self) -> FBM0_R
[src]
Bit 0 - Filter mode
pub fn fbm1(&self) -> FBM1_R
[src]
Bit 1 - Filter mode
pub fn fbm2(&self) -> FBM2_R
[src]
Bit 2 - Filter mode
pub fn fbm3(&self) -> FBM3_R
[src]
Bit 3 - Filter mode
pub fn fbm4(&self) -> FBM4_R
[src]
Bit 4 - Filter mode
pub fn fbm5(&self) -> FBM5_R
[src]
Bit 5 - Filter mode
pub fn fbm6(&self) -> FBM6_R
[src]
Bit 6 - Filter mode
pub fn fbm7(&self) -> FBM7_R
[src]
Bit 7 - Filter mode
pub fn fbm8(&self) -> FBM8_R
[src]
Bit 8 - Filter mode
pub fn fbm9(&self) -> FBM9_R
[src]
Bit 9 - Filter mode
pub fn fbm10(&self) -> FBM10_R
[src]
Bit 10 - Filter mode
pub fn fbm11(&self) -> FBM11_R
[src]
Bit 11 - Filter mode
pub fn fbm12(&self) -> FBM12_R
[src]
Bit 12 - Filter mode
pub fn fbm13(&self) -> FBM13_R
[src]
Bit 13 - Filter mode
pub fn fbm14(&self) -> FBM14_R
[src]
Bit 14 - Filter mode
pub fn fbm15(&self) -> FBM15_R
[src]
Bit 15 - Filter mode
pub fn fbm16(&self) -> FBM16_R
[src]
Bit 16 - Filter mode
pub fn fbm17(&self) -> FBM17_R
[src]
Bit 17 - Filter mode
pub fn fbm18(&self) -> FBM18_R
[src]
Bit 18 - Filter mode
pub fn fbm19(&self) -> FBM19_R
[src]
Bit 19 - Filter mode
pub fn fbm20(&self) -> FBM20_R
[src]
Bit 20 - Filter mode
pub fn fbm21(&self) -> FBM21_R
[src]
Bit 21 - Filter mode
pub fn fbm22(&self) -> FBM22_R
[src]
Bit 22 - Filter mode
pub fn fbm23(&self) -> FBM23_R
[src]
Bit 23 - Filter mode
pub fn fbm24(&self) -> FBM24_R
[src]
Bit 24 - Filter mode
pub fn fbm25(&self) -> FBM25_R
[src]
Bit 25 - Filter mode
pub fn fbm26(&self) -> FBM26_R
[src]
Bit 26 - Filter mode
pub fn fbm27(&self) -> FBM27_R
[src]
Bit 27 - Filter mode
impl R<u32, Reg<u32, _FS1R>>
[src]
pub fn fsc0(&self) -> FSC0_R
[src]
Bit 0 - Filter scale configuration
pub fn fsc1(&self) -> FSC1_R
[src]
Bit 1 - Filter scale configuration
pub fn fsc2(&self) -> FSC2_R
[src]
Bit 2 - Filter scale configuration
pub fn fsc3(&self) -> FSC3_R
[src]
Bit 3 - Filter scale configuration
pub fn fsc4(&self) -> FSC4_R
[src]
Bit 4 - Filter scale configuration
pub fn fsc5(&self) -> FSC5_R
[src]
Bit 5 - Filter scale configuration
pub fn fsc6(&self) -> FSC6_R
[src]
Bit 6 - Filter scale configuration
pub fn fsc7(&self) -> FSC7_R
[src]
Bit 7 - Filter scale configuration
pub fn fsc8(&self) -> FSC8_R
[src]
Bit 8 - Filter scale configuration
pub fn fsc9(&self) -> FSC9_R
[src]
Bit 9 - Filter scale configuration
pub fn fsc10(&self) -> FSC10_R
[src]
Bit 10 - Filter scale configuration
pub fn fsc11(&self) -> FSC11_R
[src]
Bit 11 - Filter scale configuration
pub fn fsc12(&self) -> FSC12_R
[src]
Bit 12 - Filter scale configuration
pub fn fsc13(&self) -> FSC13_R
[src]
Bit 13 - Filter scale configuration
pub fn fsc14(&self) -> FSC14_R
[src]
Bit 14 - Filter scale configuration
pub fn fsc15(&self) -> FSC15_R
[src]
Bit 15 - Filter scale configuration
pub fn fsc16(&self) -> FSC16_R
[src]
Bit 16 - Filter scale configuration
pub fn fsc17(&self) -> FSC17_R
[src]
Bit 17 - Filter scale configuration
pub fn fsc18(&self) -> FSC18_R
[src]
Bit 18 - Filter scale configuration
pub fn fsc19(&self) -> FSC19_R
[src]
Bit 19 - Filter scale configuration
pub fn fsc20(&self) -> FSC20_R
[src]
Bit 20 - Filter scale configuration
pub fn fsc21(&self) -> FSC21_R
[src]
Bit 21 - Filter scale configuration
pub fn fsc22(&self) -> FSC22_R
[src]
Bit 22 - Filter scale configuration
pub fn fsc23(&self) -> FSC23_R
[src]
Bit 23 - Filter scale configuration
pub fn fsc24(&self) -> FSC24_R
[src]
Bit 24 - Filter scale configuration
pub fn fsc25(&self) -> FSC25_R
[src]
Bit 25 - Filter scale configuration
pub fn fsc26(&self) -> FSC26_R
[src]
Bit 26 - Filter scale configuration
pub fn fsc27(&self) -> FSC27_R
[src]
Bit 27 - Filter scale configuration
impl R<u32, Reg<u32, _FFA1R>>
[src]
pub fn ffa0(&self) -> FFA0_R
[src]
Bit 0 - Filter FIFO assignment for filter 0
pub fn ffa1(&self) -> FFA1_R
[src]
Bit 1 - Filter FIFO assignment for filter 1
pub fn ffa2(&self) -> FFA2_R
[src]
Bit 2 - Filter FIFO assignment for filter 2
pub fn ffa3(&self) -> FFA3_R
[src]
Bit 3 - Filter FIFO assignment for filter 3
pub fn ffa4(&self) -> FFA4_R
[src]
Bit 4 - Filter FIFO assignment for filter 4
pub fn ffa5(&self) -> FFA5_R
[src]
Bit 5 - Filter FIFO assignment for filter 5
pub fn ffa6(&self) -> FFA6_R
[src]
Bit 6 - Filter FIFO assignment for filter 6
pub fn ffa7(&self) -> FFA7_R
[src]
Bit 7 - Filter FIFO assignment for filter 7
pub fn ffa8(&self) -> FFA8_R
[src]
Bit 8 - Filter FIFO assignment for filter 8
pub fn ffa9(&self) -> FFA9_R
[src]
Bit 9 - Filter FIFO assignment for filter 9
pub fn ffa10(&self) -> FFA10_R
[src]
Bit 10 - Filter FIFO assignment for filter 10
pub fn ffa11(&self) -> FFA11_R
[src]
Bit 11 - Filter FIFO assignment for filter 11
pub fn ffa12(&self) -> FFA12_R
[src]
Bit 12 - Filter FIFO assignment for filter 12
pub fn ffa13(&self) -> FFA13_R
[src]
Bit 13 - Filter FIFO assignment for filter 13
pub fn ffa14(&self) -> FFA14_R
[src]
Bit 14 - Filter FIFO assignment for filter 14
pub fn ffa15(&self) -> FFA15_R
[src]
Bit 15 - Filter FIFO assignment for filter 15
pub fn ffa16(&self) -> FFA16_R
[src]
Bit 16 - Filter FIFO assignment for filter 16
pub fn ffa17(&self) -> FFA17_R
[src]
Bit 17 - Filter FIFO assignment for filter 17
pub fn ffa18(&self) -> FFA18_R
[src]
Bit 18 - Filter FIFO assignment for filter 18
pub fn ffa19(&self) -> FFA19_R
[src]
Bit 19 - Filter FIFO assignment for filter 19
pub fn ffa20(&self) -> FFA20_R
[src]
Bit 20 - Filter FIFO assignment for filter 20
pub fn ffa21(&self) -> FFA21_R
[src]
Bit 21 - Filter FIFO assignment for filter 21
pub fn ffa22(&self) -> FFA22_R
[src]
Bit 22 - Filter FIFO assignment for filter 22
pub fn ffa23(&self) -> FFA23_R
[src]
Bit 23 - Filter FIFO assignment for filter 23
pub fn ffa24(&self) -> FFA24_R
[src]
Bit 24 - Filter FIFO assignment for filter 24
pub fn ffa25(&self) -> FFA25_R
[src]
Bit 25 - Filter FIFO assignment for filter 25
pub fn ffa26(&self) -> FFA26_R
[src]
Bit 26 - Filter FIFO assignment for filter 26
pub fn ffa27(&self) -> FFA27_R
[src]
Bit 27 - Filter FIFO assignment for filter 27
impl R<u32, Reg<u32, _FA1R>>
[src]
pub fn fact0(&self) -> FACT0_R
[src]
Bit 0 - Filter active
pub fn fact1(&self) -> FACT1_R
[src]
Bit 1 - Filter active
pub fn fact2(&self) -> FACT2_R
[src]
Bit 2 - Filter active
pub fn fact3(&self) -> FACT3_R
[src]
Bit 3 - Filter active
pub fn fact4(&self) -> FACT4_R
[src]
Bit 4 - Filter active
pub fn fact5(&self) -> FACT5_R
[src]
Bit 5 - Filter active
pub fn fact6(&self) -> FACT6_R
[src]
Bit 6 - Filter active
pub fn fact7(&self) -> FACT7_R
[src]
Bit 7 - Filter active
pub fn fact8(&self) -> FACT8_R
[src]
Bit 8 - Filter active
pub fn fact9(&self) -> FACT9_R
[src]
Bit 9 - Filter active
pub fn fact10(&self) -> FACT10_R
[src]
Bit 10 - Filter active
pub fn fact11(&self) -> FACT11_R
[src]
Bit 11 - Filter active
pub fn fact12(&self) -> FACT12_R
[src]
Bit 12 - Filter active
pub fn fact13(&self) -> FACT13_R
[src]
Bit 13 - Filter active
pub fn fact14(&self) -> FACT14_R
[src]
Bit 14 - Filter active
pub fn fact15(&self) -> FACT15_R
[src]
Bit 15 - Filter active
pub fn fact16(&self) -> FACT16_R
[src]
Bit 16 - Filter active
pub fn fact17(&self) -> FACT17_R
[src]
Bit 17 - Filter active
pub fn fact18(&self) -> FACT18_R
[src]
Bit 18 - Filter active
pub fn fact19(&self) -> FACT19_R
[src]
Bit 19 - Filter active
pub fn fact20(&self) -> FACT20_R
[src]
Bit 20 - Filter active
pub fn fact21(&self) -> FACT21_R
[src]
Bit 21 - Filter active
pub fn fact22(&self) -> FACT22_R
[src]
Bit 22 - Filter active
pub fn fact23(&self) -> FACT23_R
[src]
Bit 23 - Filter active
pub fn fact24(&self) -> FACT24_R
[src]
Bit 24 - Filter active
pub fn fact25(&self) -> FACT25_R
[src]
Bit 25 - Filter active
pub fn fact26(&self) -> FACT26_R
[src]
Bit 26 - Filter active
pub fn fact27(&self) -> FACT27_R
[src]
Bit 27 - Filter active
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DC_A>
[src]
pub fn variant(&self) -> DC_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, BL_A>
[src]
pub fn variant(&self) -> BL_A
[src]
Get enumerated values variant
pub fn is_bl10(&self) -> bool
[src]
Checks if the value of the field is BL10
pub fn is_bl8(&self) -> bool
[src]
Checks if the value of the field is BL8
pub fn is_bl4(&self) -> bool
[src]
Checks if the value of the field is BL4
pub fn is_bl1(&self) -> bool
[src]
Checks if the value of the field is BL1
impl R<bool, APCS_A>
[src]
pub fn variant(&self) -> APCS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_strip(&self) -> bool
[src]
Checks if the value of the field is STRIP
impl R<bool, RD_A>
[src]
pub fn variant(&self) -> RD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, IPCO_A>
[src]
pub fn variant(&self) -> IPCO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_offload(&self) -> bool
[src]
Checks if the value of the field is OFFLOAD
impl R<bool, DM_A>
[src]
pub fn variant(&self) -> DM_A
[src]
Get enumerated values variant
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
impl R<bool, LM_A>
[src]
pub fn variant(&self) -> LM_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_loopback(&self) -> bool
[src]
Checks if the value of the field is LOOPBACK
impl R<bool, ROD_A>
[src]
pub fn variant(&self) -> ROD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, FES_A>
[src]
pub fn variant(&self) -> FES_A
[src]
Get enumerated values variant
pub fn is_fes10(&self) -> bool
[src]
Checks if the value of the field is FES10
pub fn is_fes100(&self) -> bool
[src]
Checks if the value of the field is FES100
impl R<bool, CSD_A>
[src]
pub fn variant(&self) -> CSD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u8, IFG_A>
[src]
pub fn variant(&self) -> Variant<u8, IFG_A>
[src]
Get enumerated values variant
pub fn is_ifg96(&self) -> bool
[src]
Checks if the value of the field is IFG96
pub fn is_ifg88(&self) -> bool
[src]
Checks if the value of the field is IFG88
pub fn is_ifg80(&self) -> bool
[src]
Checks if the value of the field is IFG80
pub fn is_ifg40(&self) -> bool
[src]
Checks if the value of the field is IFG40
impl R<bool, JD_A>
[src]
pub fn variant(&self) -> JD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, WD_A>
[src]
pub fn variant(&self) -> WD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _MACCR>>
[src]
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn dc(&self) -> DC_R
[src]
Bit 4 - Deferral check
pub fn bl(&self) -> BL_R
[src]
Bits 5:6 - Back-off limit
pub fn apcs(&self) -> APCS_R
[src]
Bit 7 - Automatic pad/CRC stripping
pub fn rd(&self) -> RD_R
[src]
Bit 9 - Retry disable
pub fn ipco(&self) -> IPCO_R
[src]
Bit 10 - IPv4 checksum offload
pub fn dm(&self) -> DM_R
[src]
Bit 11 - Duplex mode
pub fn lm(&self) -> LM_R
[src]
Bit 12 - Loopback mode
pub fn rod(&self) -> ROD_R
[src]
Bit 13 - Receive own disable
pub fn fes(&self) -> FES_R
[src]
Bit 14 - Fast Ethernet speed
pub fn csd(&self) -> CSD_R
[src]
Bit 16 - Carrier sense disable
pub fn ifg(&self) -> IFG_R
[src]
Bits 17:19 - Interframe gap
pub fn jd(&self) -> JD_R
[src]
Bit 22 - Jabber disable
pub fn wd(&self) -> WD_R
[src]
Bit 23 - Watchdog disable
impl R<bool, PM_A>
[src]
pub fn variant(&self) -> PM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HU_A>
[src]
pub fn variant(&self) -> HU_A
[src]
Get enumerated values variant
pub fn is_perfect(&self) -> bool
[src]
Checks if the value of the field is PERFECT
pub fn is_hash(&self) -> bool
[src]
Checks if the value of the field is HASH
impl R<bool, HM_A>
[src]
pub fn variant(&self) -> HM_A
[src]
Get enumerated values variant
pub fn is_perfect(&self) -> bool
[src]
Checks if the value of the field is PERFECT
pub fn is_hash(&self) -> bool
[src]
Checks if the value of the field is HASH
impl R<bool, DAIF_A>
[src]
pub fn variant(&self) -> DAIF_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_invert(&self) -> bool
[src]
Checks if the value of the field is INVERT
impl R<bool, PAM_A>
[src]
pub fn variant(&self) -> PAM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BFD_A>
[src]
pub fn variant(&self) -> BFD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u8, PCF_A>
[src]
pub fn variant(&self) -> PCF_A
[src]
Get enumerated values variant
pub fn is_prevent_all(&self) -> bool
[src]
Checks if the value of the field is PREVENTALL
pub fn is_forward_all_except_pause(&self) -> bool
[src]
Checks if the value of the field is FORWARDALLEXCEPTPAUSE
pub fn is_forward_all(&self) -> bool
[src]
Checks if the value of the field is FORWARDALL
pub fn is_forward_all_filtered(&self) -> bool
[src]
Checks if the value of the field is FORWARDALLFILTERED
impl R<bool, SAIF_A>
[src]
pub fn variant(&self) -> SAIF_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_invert(&self) -> bool
[src]
Checks if the value of the field is INVERT
impl R<bool, SAF_A>
[src]
pub fn variant(&self) -> SAF_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, HPF_A>
[src]
pub fn variant(&self) -> HPF_A
[src]
Get enumerated values variant
pub fn is_hash_only(&self) -> bool
[src]
Checks if the value of the field is HASHONLY
pub fn is_hash_or_perfect(&self) -> bool
[src]
Checks if the value of the field is HASHORPERFECT
impl R<bool, RA_A>
[src]
pub fn variant(&self) -> RA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MACFFR>>
[src]
pub fn pm(&self) -> PM_R
[src]
Bit 0 - Promiscuous mode
pub fn hu(&self) -> HU_R
[src]
Bit 1 - Hash unicast
pub fn hm(&self) -> HM_R
[src]
Bit 2 - Hash multicast
pub fn daif(&self) -> DAIF_R
[src]
Bit 3 - Destination address unique filtering
pub fn pam(&self) -> PAM_R
[src]
Bit 4 - Pass all multicast
pub fn bfd(&self) -> BFD_R
[src]
Bit 5 - Broadcast frames disable
pub fn pcf(&self) -> PCF_R
[src]
Bits 6:7 - Pass control frames
pub fn saif(&self) -> SAIF_R
[src]
Bit 8 - Source address inverse filtering
pub fn saf(&self) -> SAF_R
[src]
Bit 9 - Source address filter
pub fn hpf(&self) -> HPF_R
[src]
Bit 10 - Hash or perfect filter
pub fn ra(&self) -> RA_R
[src]
Bit 31 - Receive all
impl R<u32, Reg<u32, _MACHTHR>>
[src]
impl R<u32, Reg<u32, _MACHTLR>>
[src]
impl R<bool, MB_A>
[src]
pub fn variant(&self) -> Variant<bool, MB_A>
[src]
Get enumerated values variant
pub fn is_busy(&self) -> bool
[src]
Checks if the value of the field is BUSY
impl R<bool, MW_A>
[src]
pub fn variant(&self) -> MW_A
[src]
Get enumerated values variant
pub fn is_read(&self) -> bool
[src]
Checks if the value of the field is READ
pub fn is_write(&self) -> bool
[src]
Checks if the value of the field is WRITE
impl R<u8, CR_A>
[src]
pub fn variant(&self) -> Variant<u8, CR_A>
[src]
Get enumerated values variant
pub fn is_cr_60_100(&self) -> bool
[src]
Checks if the value of the field is CR_60_100
pub fn is_cr_100_150(&self) -> bool
[src]
Checks if the value of the field is CR_100_150
pub fn is_cr_20_35(&self) -> bool
[src]
Checks if the value of the field is CR_20_35
pub fn is_cr_35_60(&self) -> bool
[src]
Checks if the value of the field is CR_35_60
pub fn is_cr_150_168(&self) -> bool
[src]
Checks if the value of the field is CR_150_168
impl R<u32, Reg<u32, _MACMIIAR>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - MII busy
pub fn mw(&self) -> MW_R
[src]
Bit 1 - MII write
pub fn cr(&self) -> CR_R
[src]
Bits 2:4 - Clock range
pub fn mr(&self) -> MR_R
[src]
Bits 6:10 - MII register - select the desired MII register in the PHY device
pub fn pa(&self) -> PA_R
[src]
Bits 11:15 - PHY address - select which of possible 32 PHYs is being accessed
impl R<u32, Reg<u32, _MACMIIDR>>
[src]
impl R<bool, FCB_A>
[src]
pub fn variant(&self) -> FCB_A
[src]
Get enumerated values variant
pub fn is_pause_or_back_pressure(&self) -> bool
[src]
Checks if the value of the field is PAUSEORBACKPRESSURE
pub fn is_disable_back_pressure(&self) -> bool
[src]
Checks if the value of the field is DISABLEBACKPRESSURE
impl R<bool, TFCE_A>
[src]
pub fn variant(&self) -> TFCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RFCE_A>
[src]
pub fn variant(&self) -> RFCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UPFD_A>
[src]
pub fn variant(&self) -> UPFD_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, PLT_A>
[src]
pub fn variant(&self) -> PLT_A
[src]
Get enumerated values variant
pub fn is_plt4(&self) -> bool
[src]
Checks if the value of the field is PLT4
pub fn is_plt28(&self) -> bool
[src]
Checks if the value of the field is PLT28
pub fn is_plt144(&self) -> bool
[src]
Checks if the value of the field is PLT144
pub fn is_plt256(&self) -> bool
[src]
Checks if the value of the field is PLT256
impl R<bool, ZQPD_A>
[src]
pub fn variant(&self) -> ZQPD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _MACFCR>>
[src]
pub fn fcb(&self) -> FCB_R
[src]
Bit 0 - Flow control busy/back pressure activate
pub fn tfce(&self) -> TFCE_R
[src]
Bit 1 - Transmit flow control enable
pub fn rfce(&self) -> RFCE_R
[src]
Bit 2 - Receive flow control enable
pub fn upfd(&self) -> UPFD_R
[src]
Bit 3 - Unicast pause frame detect
pub fn plt(&self) -> PLT_R
[src]
Bits 4:5 - Pause low threshold
pub fn zqpd(&self) -> ZQPD_R
[src]
Bit 7 - Zero-quanta pause disable
pub fn pt(&self) -> PT_R
[src]
Bits 16:31 - Pause time
impl R<bool, VLANTC_A>
[src]
pub fn variant(&self) -> VLANTC_A
[src]
Get enumerated values variant
pub fn is_vlantc16(&self) -> bool
[src]
Checks if the value of the field is VLANTC16
pub fn is_vlantc12(&self) -> bool
[src]
Checks if the value of the field is VLANTC12
impl R<u32, Reg<u32, _MACVLANTR>>
[src]
pub fn vlanti(&self) -> VLANTI_R
[src]
Bits 0:15 - VLAN tag identifier (for receive frames)
pub fn vlantc(&self) -> VLANTC_R
[src]
Bit 16 - 12-bit VLAN tag comparison
impl R<bool, PD_A>
[src]
pub fn variant(&self) -> Variant<bool, PD_A>
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MPE_A>
[src]
pub fn variant(&self) -> MPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WFE_A>
[src]
pub fn variant(&self) -> WFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, GU_A>
[src]
pub fn variant(&self) -> GU_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WFFRPR_A>
[src]
pub fn variant(&self) -> Variant<bool, WFFRPR_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _MACPMTCSR>>
[src]
pub fn pd(&self) -> PD_R
[src]
Bit 0 - Power down
pub fn mpe(&self) -> MPE_R
[src]
Bit 1 - Magic packet enable
pub fn wfe(&self) -> WFE_R
[src]
Bit 2 - Wakeup frame enable
pub fn mpr(&self) -> MPR_R
[src]
Bit 5 - Magic packet received
pub fn wfr(&self) -> WFR_R
[src]
Bit 6 - Wakeup frame received
pub fn gu(&self) -> GU_R
[src]
Bit 9 - Global unicast
pub fn wffrpr(&self) -> WFFRPR_R
[src]
Bit 31 - Wakeup frame filter register pointer reset
impl R<u32, Reg<u32, _MACSR>>
[src]
pub fn pmts(&self) -> PMTS_R
[src]
Bit 3 - PMT status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 4 - MMC status
pub fn mmcrs(&self) -> MMCRS_R
[src]
Bit 5 - MMC receive status
pub fn mmcts(&self) -> MMCTS_R
[src]
Bit 6 - MMC transmit status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 9 - Time stamp trigger status
impl R<bool, PMTIM_A>
[src]
pub fn variant(&self) -> PMTIM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<bool, TSTIM_A>
[src]
pub fn variant(&self) -> TSTIM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<u32, Reg<u32, _MACIMR>>
[src]
pub fn pmtim(&self) -> PMTIM_R
[src]
Bit 3 - PMT interrupt mask
pub fn tstim(&self) -> TSTIM_R
[src]
Bit 9 - Time stamp trigger interrupt mask
impl R<u32, Reg<u32, _MACA0HR>>
[src]
pub fn maca0h(&self) -> MACA0H_R
[src]
Bits 0:15 - MAC address0 high
pub fn mo(&self) -> MO_R
[src]
Bit 31 - Always 1
impl R<u32, Reg<u32, _MACA0LR>>
[src]
impl R<bool, SA_A>
[src]
pub fn variant(&self) -> SA_A
[src]
Get enumerated values variant
pub fn is_destination(&self) -> bool
[src]
Checks if the value of the field is DESTINATION
pub fn is_source(&self) -> bool
[src]
Checks if the value of the field is SOURCE
impl R<bool, AE_A>
[src]
pub fn variant(&self) -> AE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MACA1HR>>
[src]
pub fn maca1h(&self) -> MACA1H_R
[src]
Bits 0:15 - MAC address1 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA1LR>>
[src]
impl R<bool, SA_A>
[src]
pub fn variant(&self) -> SA_A
[src]
Get enumerated values variant
pub fn is_destination(&self) -> bool
[src]
Checks if the value of the field is DESTINATION
pub fn is_source(&self) -> bool
[src]
Checks if the value of the field is SOURCE
impl R<bool, AE_A>
[src]
pub fn variant(&self) -> AE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MACA2HR>>
[src]
pub fn maca2h(&self) -> MACA2H_R
[src]
Bits 0:15 - Ethernet MAC address 2 high register
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA2LR>>
[src]
impl R<bool, SA_A>
[src]
pub fn variant(&self) -> SA_A
[src]
Get enumerated values variant
pub fn is_destination(&self) -> bool
[src]
Checks if the value of the field is DESTINATION
pub fn is_source(&self) -> bool
[src]
Checks if the value of the field is SOURCE
impl R<bool, AE_A>
[src]
pub fn variant(&self) -> AE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MACA3HR>>
[src]
pub fn maca3h(&self) -> MACA3H_R
[src]
Bits 0:15 - MAC address3 high
pub fn mbc(&self) -> MBC_R
[src]
Bits 24:29 - Mask byte control
pub fn sa(&self) -> SA_R
[src]
Bit 30 - Source address
pub fn ae(&self) -> AE_R
[src]
Bit 31 - Address enable
impl R<u32, Reg<u32, _MACA3LR>>
[src]
impl R<bool, CR_A>
[src]
pub fn variant(&self) -> Variant<bool, CR_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, CSR_A>
[src]
pub fn variant(&self) -> CSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ROR_A>
[src]
pub fn variant(&self) -> ROR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, MCF_A>
[src]
pub fn variant(&self) -> MCF_A
[src]
Get enumerated values variant
pub fn is_unfrozen(&self) -> bool
[src]
Checks if the value of the field is UNFROZEN
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
impl R<u32, Reg<u32, _MMCCR>>
[src]
pub fn cr(&self) -> CR_R
[src]
Bit 0 - Counter reset
pub fn csr(&self) -> CSR_R
[src]
Bit 1 - Counter stop rollover
pub fn ror(&self) -> ROR_R
[src]
Bit 2 - Reset on read
pub fn mcf(&self) -> MCF_R
[src]
Bit 31 - MMC counter freeze
impl R<u32, Reg<u32, _MMCRIR>>
[src]
pub fn rfces(&self) -> RFCES_R
[src]
Bit 5 - Received frames CRC error status
pub fn rfaes(&self) -> RFAES_R
[src]
Bit 6 - Received frames alignment error status
pub fn rgufs(&self) -> RGUFS_R
[src]
Bit 17 - Received good Unicast frames status
impl R<u32, Reg<u32, _MMCTIR>>
[src]
pub fn tgfscs(&self) -> TGFSCS_R
[src]
Bit 14 - Transmitted good frames single collision status
pub fn tgfmscs(&self) -> TGFMSCS_R
[src]
Bit 15 - Transmitted good frames more than single collision status
pub fn tgfs(&self) -> TGFS_R
[src]
Bit 21 - Transmitted good frames status
impl R<bool, RFCEM_A>
[src]
pub fn variant(&self) -> RFCEM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<bool, RFAEM_A>
[src]
pub fn variant(&self) -> RFAEM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<bool, RGUFM_A>
[src]
pub fn variant(&self) -> RGUFM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<u32, Reg<u32, _MMCRIMR>>
[src]
pub fn rfcem(&self) -> RFCEM_R
[src]
Bit 5 - Received frame CRC error mask
pub fn rfaem(&self) -> RFAEM_R
[src]
Bit 6 - Received frames alignment error mask
pub fn rgufm(&self) -> RGUFM_R
[src]
Bit 17 - Received good Unicast frames mask
impl R<bool, TGFSCM_A>
[src]
pub fn variant(&self) -> TGFSCM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<bool, TGFMSCM_A>
[src]
pub fn variant(&self) -> TGFMSCM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<bool, TGFM_A>
[src]
pub fn variant(&self) -> TGFM_A
[src]
Get enumerated values variant
pub fn is_unmasked(&self) -> bool
[src]
Checks if the value of the field is UNMASKED
pub fn is_masked(&self) -> bool
[src]
Checks if the value of the field is MASKED
impl R<u32, Reg<u32, _MMCTIMR>>
[src]
pub fn tgfscm(&self) -> TGFSCM_R
[src]
Bit 14 - Transmitted good frames single collision mask
pub fn tgfmscm(&self) -> TGFMSCM_R
[src]
Bit 15 - Transmitted good frames more than single collision mask
pub fn tgfm(&self) -> TGFM_R
[src]
Bit 21 - Transmitted good frames mask
impl R<u32, Reg<u32, _MMCTGFSCCR>>
[src]
impl R<u32, Reg<u32, _MMCTGFMSCCR>>
[src]
pub fn tgfmscc(&self) -> TGFMSCC_R
[src]
Bits 0:31 - Transmitted good frames after more than a single collision counter
impl R<u32, Reg<u32, _MMCTGFCR>>
[src]
impl R<u32, Reg<u32, _MMCRFCECR>>
[src]
impl R<u32, Reg<u32, _MMCRFAECR>>
[src]
impl R<u32, Reg<u32, _MMCRGUFCR>>
[src]
impl R<u32, Reg<u32, _PTPTSCR>>
[src]
pub fn tse(&self) -> TSE_R
[src]
Bit 0 - Time stamp enable
pub fn tsfcu(&self) -> TSFCU_R
[src]
Bit 1 - Time stamp fine or coarse update
pub fn tssti(&self) -> TSSTI_R
[src]
Bit 2 - Time stamp system time initialize
pub fn tsstu(&self) -> TSSTU_R
[src]
Bit 3 - Time stamp system time update
pub fn tsite(&self) -> TSITE_R
[src]
Bit 4 - Time stamp interrupt trigger enable
pub fn tsaru(&self) -> TSARU_R
[src]
Bit 5 - Time stamp addend register update
impl R<u32, Reg<u32, _PTPSSIR>>
[src]
impl R<u32, Reg<u32, _PTPTSHR>>
[src]
impl R<u32, Reg<u32, _PTPTSLR>>
[src]
pub fn stss(&self) -> STSS_R
[src]
Bits 0:30 - System time subseconds
pub fn stpns(&self) -> STPNS_R
[src]
Bit 31 - System time positive or negative sign
impl R<u32, Reg<u32, _PTPTSHUR>>
[src]
impl R<u32, Reg<u32, _PTPTSLUR>>
[src]
pub fn tsuss(&self) -> TSUSS_R
[src]
Bits 0:30 - Time stamp update subseconds
pub fn tsupns(&self) -> TSUPNS_R
[src]
Bit 31 - Time stamp update positive or negative sign
impl R<u32, Reg<u32, _PTPTSAR>>
[src]
impl R<u32, Reg<u32, _PTPTTHR>>
[src]
impl R<u32, Reg<u32, _PTPTTLR>>
[src]
impl R<bool, SR_A>
[src]
pub fn variant(&self) -> Variant<bool, SR_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, DA_A>
[src]
pub fn variant(&self) -> DA_A
[src]
Get enumerated values variant
pub fn is_round_robin(&self) -> bool
[src]
Checks if the value of the field is ROUNDROBIN
pub fn is_rx_priority(&self) -> bool
[src]
Checks if the value of the field is RXPRIORITY
impl R<u8, PBL_A>
[src]
pub fn variant(&self) -> Variant<u8, PBL_A>
[src]
Get enumerated values variant
pub fn is_pbl1(&self) -> bool
[src]
Checks if the value of the field is PBL1
pub fn is_pbl2(&self) -> bool
[src]
Checks if the value of the field is PBL2
pub fn is_pbl4(&self) -> bool
[src]
Checks if the value of the field is PBL4
pub fn is_pbl8(&self) -> bool
[src]
Checks if the value of the field is PBL8
pub fn is_pbl16(&self) -> bool
[src]
Checks if the value of the field is PBL16
pub fn is_pbl32(&self) -> bool
[src]
Checks if the value of the field is PBL32
impl R<u8, PM_A>
[src]
pub fn variant(&self) -> PM_A
[src]
Get enumerated values variant
pub fn is_one_to_one(&self) -> bool
[src]
Checks if the value of the field is ONETOONE
pub fn is_two_to_one(&self) -> bool
[src]
Checks if the value of the field is TWOTOONE
pub fn is_three_to_one(&self) -> bool
[src]
Checks if the value of the field is THREETOONE
pub fn is_four_to_one(&self) -> bool
[src]
Checks if the value of the field is FOURTOONE
impl R<bool, FB_A>
[src]
pub fn variant(&self) -> FB_A
[src]
Get enumerated values variant
pub fn is_variable(&self) -> bool
[src]
Checks if the value of the field is VARIABLE
pub fn is_fixed(&self) -> bool
[src]
Checks if the value of the field is FIXED
impl R<u8, RDP_A>
[src]
pub fn variant(&self) -> Variant<u8, RDP_A>
[src]
Get enumerated values variant
pub fn is_rdp1(&self) -> bool
[src]
Checks if the value of the field is RDP1
pub fn is_rdp2(&self) -> bool
[src]
Checks if the value of the field is RDP2
pub fn is_rdp4(&self) -> bool
[src]
Checks if the value of the field is RDP4
pub fn is_rdp8(&self) -> bool
[src]
Checks if the value of the field is RDP8
pub fn is_rdp16(&self) -> bool
[src]
Checks if the value of the field is RDP16
pub fn is_rdp32(&self) -> bool
[src]
Checks if the value of the field is RDP32
impl R<bool, USP_A>
[src]
pub fn variant(&self) -> USP_A
[src]
Get enumerated values variant
pub fn is_combined(&self) -> bool
[src]
Checks if the value of the field is COMBINED
pub fn is_separate(&self) -> bool
[src]
Checks if the value of the field is SEPARATE
impl R<bool, FPM_A>
[src]
pub fn variant(&self) -> FPM_A
[src]
Get enumerated values variant
pub fn is_x1(&self) -> bool
[src]
Checks if the value of the field is X1
pub fn is_x4(&self) -> bool
[src]
Checks if the value of the field is X4
impl R<bool, AAB_A>
[src]
pub fn variant(&self) -> AAB_A
[src]
Get enumerated values variant
pub fn is_unaligned(&self) -> bool
[src]
Checks if the value of the field is UNALIGNED
pub fn is_aligned(&self) -> bool
[src]
Checks if the value of the field is ALIGNED
impl R<u32, Reg<u32, _DMABMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 0 - Software reset
pub fn da(&self) -> DA_R
[src]
Bit 1 - DMA arbitration
pub fn dsl(&self) -> DSL_R
[src]
Bits 2:6 - Descriptor skip length
pub fn pbl(&self) -> PBL_R
[src]
Bits 8:13 - Programmable burst length
pub fn pm(&self) -> PM_R
[src]
Bits 14:15 - Rx-Tx priority ratio
pub fn fb(&self) -> FB_R
[src]
Bit 16 - Fixed burst
pub fn rdp(&self) -> RDP_R
[src]
Bits 17:22 - Rx DMA PBL
pub fn usp(&self) -> USP_R
[src]
Bit 23 - Use separate PBL
pub fn fpm(&self) -> FPM_R
[src]
Bit 24 - 4xPBL mode
pub fn aab(&self) -> AAB_R
[src]
Bit 25 - Address-aligned beats
impl R<u32, TPD_A>
[src]
pub fn variant(&self) -> Variant<u32, TPD_A>
[src]
Get enumerated values variant
pub fn is_poll(&self) -> bool
[src]
Checks if the value of the field is POLL
impl R<u32, Reg<u32, _DMATPDR>>
[src]
impl R<u32, RPD_A>
[src]
pub fn variant(&self) -> Variant<u32, RPD_A>
[src]
Get enumerated values variant
pub fn is_poll(&self) -> bool
[src]
Checks if the value of the field is POLL
impl R<u32, Reg<u32, _DMARPDR>>
[src]
impl R<u32, Reg<u32, _DMARDLAR>>
[src]
impl R<u32, Reg<u32, _DMATDLAR>>
[src]
impl R<u8, RPS_A>
[src]
pub fn variant(&self) -> Variant<u8, RPS_A>
[src]
Get enumerated values variant
pub fn is_stopped(&self) -> bool
[src]
Checks if the value of the field is STOPPED
pub fn is_running_fetching(&self) -> bool
[src]
Checks if the value of the field is RUNNINGFETCHING
pub fn is_running_waiting(&self) -> bool
[src]
Checks if the value of the field is RUNNINGWAITING
pub fn is_suspended(&self) -> bool
[src]
Checks if the value of the field is SUSPENDED
pub fn is_running_writing(&self) -> bool
[src]
Checks if the value of the field is RUNNINGWRITING
impl R<u8, TPS_A>
[src]
pub fn variant(&self) -> Variant<u8, TPS_A>
[src]
Get enumerated values variant
pub fn is_stopped(&self) -> bool
[src]
Checks if the value of the field is STOPPED
pub fn is_running_fetching(&self) -> bool
[src]
Checks if the value of the field is RUNNINGFETCHING
pub fn is_running_waiting(&self) -> bool
[src]
Checks if the value of the field is RUNNINGWAITING
pub fn is_running_reading(&self) -> bool
[src]
Checks if the value of the field is RUNNINGREADING
pub fn is_suspended(&self) -> bool
[src]
Checks if the value of the field is SUSPENDED
pub fn is_running(&self) -> bool
[src]
Checks if the value of the field is RUNNING
impl R<u32, Reg<u32, _DMASR>>
[src]
pub fn ts(&self) -> TS_R
[src]
Bit 0 - Transmit status
pub fn tpss(&self) -> TPSS_R
[src]
Bit 1 - Transmit process stopped status
pub fn tbus(&self) -> TBUS_R
[src]
Bit 2 - Transmit buffer unavailable status
pub fn tjts(&self) -> TJTS_R
[src]
Bit 3 - Transmit jabber timeout status
pub fn ros(&self) -> ROS_R
[src]
Bit 4 - Receive overflow status
pub fn tus(&self) -> TUS_R
[src]
Bit 5 - Transmit underflow status
pub fn rs(&self) -> RS_R
[src]
Bit 6 - Receive status
pub fn rbus(&self) -> RBUS_R
[src]
Bit 7 - Receive buffer unavailable status
pub fn rpss(&self) -> RPSS_R
[src]
Bit 8 - Receive process stopped status
pub fn pwts(&self) -> PWTS_R
[src]
Bit 9 - Receive watchdog timeout status
pub fn ets(&self) -> ETS_R
[src]
Bit 10 - Early transmit status
pub fn fbes(&self) -> FBES_R
[src]
Bit 13 - Fatal bus error status
pub fn ers(&self) -> ERS_R
[src]
Bit 14 - Early receive status
pub fn ais(&self) -> AIS_R
[src]
Bit 15 - Abnormal interrupt summary
pub fn nis(&self) -> NIS_R
[src]
Bit 16 - Normal interrupt summary
pub fn rps(&self) -> RPS_R
[src]
Bits 17:19 - Receive process state
pub fn tps(&self) -> TPS_R
[src]
Bits 20:22 - Transmit process state
pub fn ebs(&self) -> EBS_R
[src]
Bits 23:25 - Error bits status
pub fn mmcs(&self) -> MMCS_R
[src]
Bit 27 - MMC status
pub fn pmts(&self) -> PMTS_R
[src]
Bit 28 - PMT status
pub fn tsts(&self) -> TSTS_R
[src]
Bit 29 - Time stamp trigger status
impl R<bool, SR_A>
[src]
pub fn variant(&self) -> SR_A
[src]
Get enumerated values variant
pub fn is_stopped(&self) -> bool
[src]
Checks if the value of the field is STOPPED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<u8, RTC_A>
[src]
pub fn variant(&self) -> RTC_A
[src]
Get enumerated values variant
pub fn is_rtc64(&self) -> bool
[src]
Checks if the value of the field is RTC64
pub fn is_rtc32(&self) -> bool
[src]
Checks if the value of the field is RTC32
pub fn is_rtc96(&self) -> bool
[src]
Checks if the value of the field is RTC96
pub fn is_rtc128(&self) -> bool
[src]
Checks if the value of the field is RTC128
impl R<bool, FUGF_A>
[src]
pub fn variant(&self) -> FUGF_A
[src]
Get enumerated values variant
pub fn is_drop(&self) -> bool
[src]
Checks if the value of the field is DROP
pub fn is_forward(&self) -> bool
[src]
Checks if the value of the field is FORWARD
impl R<bool, FEF_A>
[src]
pub fn variant(&self) -> FEF_A
[src]
Get enumerated values variant
pub fn is_drop(&self) -> bool
[src]
Checks if the value of the field is DROP
pub fn is_forward(&self) -> bool
[src]
Checks if the value of the field is FORWARD
impl R<bool, ST_A>
[src]
pub fn variant(&self) -> ST_A
[src]
Get enumerated values variant
pub fn is_stopped(&self) -> bool
[src]
Checks if the value of the field is STOPPED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<u8, TTC_A>
[src]
pub fn variant(&self) -> TTC_A
[src]
Get enumerated values variant
pub fn is_ttc64(&self) -> bool
[src]
Checks if the value of the field is TTC64
pub fn is_ttc128(&self) -> bool
[src]
Checks if the value of the field is TTC128
pub fn is_ttc192(&self) -> bool
[src]
Checks if the value of the field is TTC192
pub fn is_ttc256(&self) -> bool
[src]
Checks if the value of the field is TTC256
pub fn is_ttc40(&self) -> bool
[src]
Checks if the value of the field is TTC40
pub fn is_ttc32(&self) -> bool
[src]
Checks if the value of the field is TTC32
pub fn is_ttc24(&self) -> bool
[src]
Checks if the value of the field is TTC24
pub fn is_ttc16(&self) -> bool
[src]
Checks if the value of the field is TTC16
impl R<bool, FTF_A>
[src]
pub fn variant(&self) -> Variant<bool, FTF_A>
[src]
Get enumerated values variant
pub fn is_flush(&self) -> bool
[src]
Checks if the value of the field is FLUSH
impl R<bool, TSF_A>
[src]
pub fn variant(&self) -> TSF_A
[src]
Get enumerated values variant
pub fn is_cut_through(&self) -> bool
[src]
Checks if the value of the field is CUTTHROUGH
pub fn is_store_forward(&self) -> bool
[src]
Checks if the value of the field is STOREFORWARD
impl R<bool, RSF_A>
[src]
pub fn variant(&self) -> RSF_A
[src]
Get enumerated values variant
pub fn is_cut_through(&self) -> bool
[src]
Checks if the value of the field is CUTTHROUGH
pub fn is_store_forward(&self) -> bool
[src]
Checks if the value of the field is STOREFORWARD
impl R<bool, DTCEFD_A>
[src]
pub fn variant(&self) -> DTCEFD_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u32, Reg<u32, _DMAOMR>>
[src]
pub fn sr(&self) -> SR_R
[src]
Bit 1 - Start/stop receive
pub fn osf(&self) -> OSF_R
[src]
Bit 2 - Operate on second frame
pub fn rtc(&self) -> RTC_R
[src]
Bits 3:4 - Receive threshold control
pub fn fugf(&self) -> FUGF_R
[src]
Bit 6 - Forward undersized good frames
pub fn fef(&self) -> FEF_R
[src]
Bit 7 - Forward error frames
pub fn st(&self) -> ST_R
[src]
Bit 13 - Start/stop transmission
pub fn ttc(&self) -> TTC_R
[src]
Bits 14:16 - Transmit threshold control
pub fn ftf(&self) -> FTF_R
[src]
Bit 20 - Flush transmit FIFO
pub fn tsf(&self) -> TSF_R
[src]
Bit 21 - Transmit store and forward
pub fn dfrf(&self) -> DFRF_R
[src]
Bit 24 - Disable flushing of received frames
pub fn rsf(&self) -> RSF_R
[src]
Bit 25 - Receive store and forward
pub fn dtcefd(&self) -> DTCEFD_R
[src]
Bit 26 - Dropping of TCP/IP checksum error frames disable
impl R<u32, Reg<u32, _DMAIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 0 - Transmit interrupt enable
pub fn tpsie(&self) -> TPSIE_R
[src]
Bit 1 - Transmit process stopped interrupt enable
pub fn tbuie(&self) -> TBUIE_R
[src]
Bit 2 - Transmit buffer unavailable interrupt enable
pub fn tjtie(&self) -> TJTIE_R
[src]
Bit 3 - Transmit jabber timeout interrupt enable
pub fn roie(&self) -> ROIE_R
[src]
Bit 4 - Receive overflow interrupt enable
pub fn tuie(&self) -> TUIE_R
[src]
Bit 5 - Transmit underflow interrupt enable
pub fn rie(&self) -> RIE_R
[src]
Bit 6 - Receive interrupt enable
pub fn rbuie(&self) -> RBUIE_R
[src]
Bit 7 - Receive buffer unavailable interrupt enable
pub fn rpsie(&self) -> RPSIE_R
[src]
Bit 8 - Receive process stopped interrupt enable
pub fn rwtie(&self) -> RWTIE_R
[src]
Bit 9 - Receive watchdog timeout interrupt enable
pub fn etie(&self) -> ETIE_R
[src]
Bit 10 - Early transmit interrupt enable
pub fn fbeie(&self) -> FBEIE_R
[src]
Bit 13 - Fatal bus error interrupt enable
pub fn erie(&self) -> ERIE_R
[src]
Bit 14 - Early receive interrupt enable
pub fn aise(&self) -> AISE_R
[src]
Bit 15 - Abnormal interrupt summary enable
pub fn nise(&self) -> NISE_R
[src]
Bit 16 - Normal interrupt summary enable
impl R<u32, Reg<u32, _DMAMFBOCR>>
[src]
pub fn mfc(&self) -> MFC_R
[src]
Bits 0:15 - Missed frames by the controller
pub fn omfc(&self) -> OMFC_R
[src]
Bit 16 - Overflow bit for missed frame counter
pub fn mfa(&self) -> MFA_R
[src]
Bits 17:27 - Missed frames by the application
pub fn ofoc(&self) -> OFOC_R
[src]
Bit 28 - Overflow bit for FIFO overflow counter
impl R<u32, Reg<u32, _DMACHTDR>>
[src]
impl R<u32, Reg<u32, _DMACHRDR>>
[src]
impl R<u32, Reg<u32, _DMACHTBAR>>
[src]
impl R<u32, Reg<u32, _DMACHRBAR>>
[src]
impl R<u32, Reg<u32, _FS_GOTGCTL>>
[src]
pub fn srqscs(&self) -> SRQSCS_R
[src]
Bit 0 - Session request success
pub fn srq(&self) -> SRQ_R
[src]
Bit 1 - Session request
pub fn hngscs(&self) -> HNGSCS_R
[src]
Bit 8 - Host negotiation success
pub fn hnprq(&self) -> HNPRQ_R
[src]
Bit 9 - HNP request
pub fn hshnpen(&self) -> HSHNPEN_R
[src]
Bit 10 - Host set HNP enable
pub fn dhnpen(&self) -> DHNPEN_R
[src]
Bit 11 - Device HNP enabled
pub fn cidsts(&self) -> CIDSTS_R
[src]
Bit 16 - Connector ID status
pub fn dbct(&self) -> DBCT_R
[src]
Bit 17 - Long/short debounce time
pub fn asvld(&self) -> ASVLD_R
[src]
Bit 18 - A-session valid
pub fn bsvld(&self) -> BSVLD_R
[src]
Bit 19 - B-session valid
impl R<u32, Reg<u32, _FS_GOTGINT>>
[src]
pub fn sedet(&self) -> SEDET_R
[src]
Bit 2 - Session end detected
pub fn srsschg(&self) -> SRSSCHG_R
[src]
Bit 8 - Session request success status change
pub fn hnsschg(&self) -> HNSSCHG_R
[src]
Bit 9 - Host negotiation success status change
pub fn hngdet(&self) -> HNGDET_R
[src]
Bit 17 - Host negotiation detected
pub fn adtochg(&self) -> ADTOCHG_R
[src]
Bit 18 - A-device timeout change
pub fn dbcdne(&self) -> DBCDNE_R
[src]
Bit 19 - Debounce done
impl R<u32, Reg<u32, _FS_GAHBCFG>>
[src]
pub fn gint(&self) -> GINT_R
[src]
Bit 0 - Global interrupt mask
pub fn txfelvl(&self) -> TXFELVL_R
[src]
Bit 7 - TxFIFO empty level
pub fn ptxfelvl(&self) -> PTXFELVL_R
[src]
Bit 8 - Periodic TxFIFO empty level
impl R<u32, Reg<u32, _FS_GUSBCFG>>
[src]
pub fn tocal(&self) -> TOCAL_R
[src]
Bits 0:2 - FS timeout calibration
pub fn srpcap(&self) -> SRPCAP_R
[src]
Bit 8 - SRP-capable
pub fn hnpcap(&self) -> HNPCAP_R
[src]
Bit 9 - HNP-capable
pub fn trdt(&self) -> TRDT_R
[src]
Bits 10:13 - USB turnaround time
pub fn fhmod(&self) -> FHMOD_R
[src]
Bit 29 - Force host mode
pub fn fdmod(&self) -> FDMOD_R
[src]
Bit 30 - Force device mode
pub fn ctxpkt(&self) -> CTXPKT_R
[src]
Bit 31 - Corrupt Tx packet
impl R<u32, Reg<u32, _FS_GRSTCTL>>
[src]
pub fn csrst(&self) -> CSRST_R
[src]
Bit 0 - Core soft reset
pub fn hsrst(&self) -> HSRST_R
[src]
Bit 1 - HCLK soft reset
pub fn fcrst(&self) -> FCRST_R
[src]
Bit 2 - Host frame counter reset
pub fn rxfflsh(&self) -> RXFFLSH_R
[src]
Bit 4 - RxFIFO flush
pub fn txfflsh(&self) -> TXFFLSH_R
[src]
Bit 5 - TxFIFO flush
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 6:10 - TxFIFO number
pub fn ahbidl(&self) -> AHBIDL_R
[src]
Bit 31 - AHB master idle
impl R<u32, Reg<u32, _FS_GINTSTS>>
[src]
pub fn cmod(&self) -> CMOD_R
[src]
Bit 0 - Current mode of operation
pub fn mmis(&self) -> MMIS_R
[src]
Bit 1 - Mode mismatch interrupt
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt
pub fn sof(&self) -> SOF_R
[src]
Bit 3 - Start of frame
pub fn rxflvl(&self) -> RXFLVL_R
[src]
Bit 4 - RxFIFO non-empty
pub fn nptxfe(&self) -> NPTXFE_R
[src]
Bit 5 - Non-periodic TxFIFO empty
pub fn ginakeff(&self) -> GINAKEFF_R
[src]
Bit 6 - Global IN non-periodic NAK effective
pub fn goutnakeff(&self) -> GOUTNAKEFF_R
[src]
Bit 7 - Global OUT NAK effective
pub fn esusp(&self) -> ESUSP_R
[src]
Bit 10 - Early suspend
pub fn usbsusp(&self) -> USBSUSP_R
[src]
Bit 11 - USB suspend
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset
pub fn enumdne(&self) -> ENUMDNE_R
[src]
Bit 13 - Enumeration done
pub fn isoodrp(&self) -> ISOODRP_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt
pub fn eopf(&self) -> EOPF_R
[src]
Bit 15 - End of periodic frame interrupt
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoint interrupt
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoint interrupt
pub fn iisoixfr(&self) -> IISOIXFR_R
[src]
Bit 20 - Incomplete isochronous IN transfer
pub fn ipxfr_incompisoout(&self) -> IPXFR_INCOMPISOOUT_R
[src]
Bit 21 - Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)
pub fn hprtint(&self) -> HPRTINT_R
[src]
Bit 24 - Host port interrupt
pub fn hcint(&self) -> HCINT_R
[src]
Bit 25 - Host channels interrupt
pub fn ptxfe(&self) -> PTXFE_R
[src]
Bit 26 - Periodic TxFIFO empty
pub fn cidschg(&self) -> CIDSCHG_R
[src]
Bit 28 - Connector ID status change
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt
pub fn srqint(&self) -> SRQINT_R
[src]
Bit 30 - Session request/new session detected interrupt
pub fn wkupint(&self) -> WKUPINT_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt
impl R<u32, Reg<u32, _FS_GINTMSK>>
[src]
pub fn mmism(&self) -> MMISM_R
[src]
Bit 1 - Mode mismatch interrupt mask
pub fn otgint(&self) -> OTGINT_R
[src]
Bit 2 - OTG interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 3 - Start of frame mask
pub fn rxflvlm(&self) -> RXFLVLM_R
[src]
Bit 4 - Receive FIFO non-empty mask
pub fn nptxfem(&self) -> NPTXFEM_R
[src]
Bit 5 - Non-periodic TxFIFO empty mask
pub fn ginakeffm(&self) -> GINAKEFFM_R
[src]
Bit 6 - Global non-periodic IN NAK effective mask
pub fn gonakeffm(&self) -> GONAKEFFM_R
[src]
Bit 7 - Global OUT NAK effective mask
pub fn esuspm(&self) -> ESUSPM_R
[src]
Bit 10 - Early suspend mask
pub fn usbsuspm(&self) -> USBSUSPM_R
[src]
Bit 11 - USB suspend mask
pub fn usbrst(&self) -> USBRST_R
[src]
Bit 12 - USB reset mask
pub fn enumdnem(&self) -> ENUMDNEM_R
[src]
Bit 13 - Enumeration done mask
pub fn isoodrpm(&self) -> ISOODRPM_R
[src]
Bit 14 - Isochronous OUT packet dropped interrupt mask
pub fn eopfm(&self) -> EOPFM_R
[src]
Bit 15 - End of periodic frame interrupt mask
pub fn epmism(&self) -> EPMISM_R
[src]
Bit 17 - Endpoint mismatch interrupt mask
pub fn iepint(&self) -> IEPINT_R
[src]
Bit 18 - IN endpoints interrupt mask
pub fn oepint(&self) -> OEPINT_R
[src]
Bit 19 - OUT endpoints interrupt mask
pub fn iisoixfrm(&self) -> IISOIXFRM_R
[src]
Bit 20 - Incomplete isochronous IN transfer mask
pub fn ipxfrm_iisooxfrm(&self) -> IPXFRM_IISOOXFRM_R
[src]
Bit 21 - Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)
pub fn prtim(&self) -> PRTIM_R
[src]
Bit 24 - Host port interrupt mask
pub fn hcim(&self) -> HCIM_R
[src]
Bit 25 - Host channels interrupt mask
pub fn ptxfem(&self) -> PTXFEM_R
[src]
Bit 26 - Periodic TxFIFO empty mask
pub fn cidschgm(&self) -> CIDSCHGM_R
[src]
Bit 28 - Connector ID status change mask
pub fn discint(&self) -> DISCINT_R
[src]
Bit 29 - Disconnect detected interrupt mask
pub fn srqim(&self) -> SRQIM_R
[src]
Bit 30 - Session request/new session detected interrupt mask
pub fn wuim(&self) -> WUIM_R
[src]
Bit 31 - Resume/remote wakeup detected interrupt mask
impl R<u32, Reg<u32, _FS_GRXSTSR_DEVICE>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXSTSR_HOST>>
[src]
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 0:3 - Endpoint number
pub fn bcnt(&self) -> BCNT_R
[src]
Bits 4:14 - Byte count
pub fn dpid(&self) -> DPID_R
[src]
Bits 15:16 - Data PID
pub fn pktsts(&self) -> PKTSTS_R
[src]
Bits 17:20 - Packet status
pub fn frmnum(&self) -> FRMNUM_R
[src]
Bits 21:24 - Frame number
impl R<u32, Reg<u32, _FS_GRXFSIZ>>
[src]
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_DEVICE>>
[src]
pub fn tx0fsa(&self) -> TX0FSA_R
[src]
Bits 0:15 - Endpoint 0 transmit RAM start address
pub fn tx0fd(&self) -> TX0FD_R
[src]
Bits 16:31 - Endpoint 0 TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXFSIZ_HOST>>
[src]
pub fn nptxfsa(&self) -> NPTXFSA_R
[src]
Bits 0:15 - Non-periodic transmit RAM start address
pub fn nptxfd(&self) -> NPTXFD_R
[src]
Bits 16:31 - Non-periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_GNPTXSTS>>
[src]
pub fn nptxfsav(&self) -> NPTXFSAV_R
[src]
Bits 0:15 - Non-periodic TxFIFO space available
pub fn nptqxsav(&self) -> NPTQXSAV_R
[src]
Bits 16:23 - Non-periodic transmit request queue space available
pub fn nptxqtop(&self) -> NPTXQTOP_R
[src]
Bits 24:30 - Top of the non-periodic transmit request queue
impl R<u32, Reg<u32, _FS_GCCFG>>
[src]
pub fn pwrdwn(&self) -> PWRDWN_R
[src]
Bit 16 - Power down
pub fn vbusasen(&self) -> VBUSASEN_R
[src]
Bit 18 - Enable the VBUS sensing device
pub fn vbusbsen(&self) -> VBUSBSEN_R
[src]
Bit 19 - Enable the VBUS sensing device
pub fn sofouten(&self) -> SOFOUTEN_R
[src]
Bit 20 - SOF output enable
impl R<u32, Reg<u32, _FS_CID>>
[src]
pub fn product_id(&self) -> PRODUCT_ID_R
[src]
Bits 0:31 - Product ID field
impl R<u32, Reg<u32, _FS_HPTXFSIZ>>
[src]
pub fn ptxsa(&self) -> PTXSA_R
[src]
Bits 0:15 - Host periodic TxFIFO start address
pub fn ptxfsiz(&self) -> PTXFSIZ_R
[src]
Bits 16:31 - Host periodic TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF1>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO2 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF2>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO3 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_DIEPTXF3>>
[src]
pub fn ineptxsa(&self) -> INEPTXSA_R
[src]
Bits 0:15 - IN endpoint FIFO4 transmit RAM start address
pub fn ineptxfd(&self) -> INEPTXFD_R
[src]
Bits 16:31 - IN endpoint TxFIFO depth
impl R<u32, Reg<u32, _FS_HCFG>>
[src]
pub fn fslspcs(&self) -> FSLSPCS_R
[src]
Bits 0:1 - FS/LS PHY clock select
pub fn fslss(&self) -> FSLSS_R
[src]
Bit 2 - FS- and LS-only support
impl R<u32, Reg<u32, _HFIR>>
[src]
impl R<u32, Reg<u32, _FS_HFNUM>>
[src]
pub fn frnum(&self) -> FRNUM_R
[src]
Bits 0:15 - Frame number
pub fn ftrem(&self) -> FTREM_R
[src]
Bits 16:31 - Frame time remaining
impl R<u32, Reg<u32, _FS_HPTXSTS>>
[src]
pub fn ptxfsavl(&self) -> PTXFSAVL_R
[src]
Bits 0:15 - Periodic transmit data FIFO space available
pub fn ptxqsav(&self) -> PTXQSAV_R
[src]
Bits 16:23 - Periodic transmit request queue space available
pub fn ptxqtop(&self) -> PTXQTOP_R
[src]
Bits 24:31 - Top of the periodic transmit request queue
impl R<u32, Reg<u32, _HAINT>>
[src]
impl R<u32, Reg<u32, _HAINTMSK>>
[src]
impl R<u32, Reg<u32, _FS_HPRT>>
[src]
pub fn pcsts(&self) -> PCSTS_R
[src]
Bit 0 - Port connect status
pub fn pcdet(&self) -> PCDET_R
[src]
Bit 1 - Port connect detected
pub fn pena(&self) -> PENA_R
[src]
Bit 2 - Port enable
pub fn penchng(&self) -> PENCHNG_R
[src]
Bit 3 - Port enable/disable change
pub fn poca(&self) -> POCA_R
[src]
Bit 4 - Port overcurrent active
pub fn pocchng(&self) -> POCCHNG_R
[src]
Bit 5 - Port overcurrent change
pub fn pres(&self) -> PRES_R
[src]
Bit 6 - Port resume
pub fn psusp(&self) -> PSUSP_R
[src]
Bit 7 - Port suspend
pub fn prst(&self) -> PRST_R
[src]
Bit 8 - Port reset
pub fn plsts(&self) -> PLSTS_R
[src]
Bits 10:11 - Port line status
pub fn ppwr(&self) -> PPWR_R
[src]
Bit 12 - Port power
pub fn ptctl(&self) -> PTCTL_R
[src]
Bits 13:16 - Port test control
pub fn pspd(&self) -> PSPD_R
[src]
Bits 17:18 - Port speed
impl R<u32, Reg<u32, _FS_HCCHAR0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR1>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR2>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR3>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR4>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR5>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR6>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCCHAR7>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - Maximum packet size
pub fn epnum(&self) -> EPNUM_R
[src]
Bits 11:14 - Endpoint number
pub fn epdir(&self) -> EPDIR_R
[src]
Bit 15 - Endpoint direction
pub fn lsdev(&self) -> LSDEV_R
[src]
Bit 17 - Low-speed device
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 20:21 - Multicount
pub fn dad(&self) -> DAD_R
[src]
Bits 22:28 - Device address
pub fn oddfrm(&self) -> ODDFRM_R
[src]
Bit 29 - Odd frame
pub fn chdis(&self) -> CHDIS_R
[src]
Bit 30 - Channel disable
pub fn chena(&self) -> CHENA_R
[src]
Bit 31 - Channel enable
impl R<u32, Reg<u32, _FS_HCINT0>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT1>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT2>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT3>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT4>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT5>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT6>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINT7>>
[src]
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - Transfer completed
pub fn chh(&self) -> CHH_R
[src]
Bit 1 - Channel halted
pub fn stall(&self) -> STALL_R
[src]
Bit 3 - STALL response received interrupt
pub fn nak(&self) -> NAK_R
[src]
Bit 4 - NAK response received interrupt
pub fn ack(&self) -> ACK_R
[src]
Bit 5 - ACK response received/transmitted interrupt
pub fn txerr(&self) -> TXERR_R
[src]
Bit 7 - Transaction error
pub fn bberr(&self) -> BBERR_R
[src]
Bit 8 - Babble error
pub fn frmor(&self) -> FRMOR_R
[src]
Bit 9 - Frame overrun
pub fn dterr(&self) -> DTERR_R
[src]
Bit 10 - Data toggle error
impl R<u32, Reg<u32, _FS_HCINTMSK0>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK1>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK2>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK3>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK4>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK5>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK6>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCINTMSK7>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed mask
pub fn chhm(&self) -> CHHM_R
[src]
Bit 1 - Channel halted mask
pub fn stallm(&self) -> STALLM_R
[src]
Bit 3 - STALL response received interrupt mask
pub fn nakm(&self) -> NAKM_R
[src]
Bit 4 - NAK response received interrupt mask
pub fn ackm(&self) -> ACKM_R
[src]
Bit 5 - ACK response received/transmitted interrupt mask
pub fn nyet(&self) -> NYET_R
[src]
Bit 6 - response received interrupt mask
pub fn txerrm(&self) -> TXERRM_R
[src]
Bit 7 - Transaction error mask
pub fn bberrm(&self) -> BBERRM_R
[src]
Bit 8 - Babble error mask
pub fn frmorm(&self) -> FRMORM_R
[src]
Bit 9 - Frame overrun mask
pub fn dterrm(&self) -> DTERRM_R
[src]
Bit 10 - Data toggle error mask
impl R<u32, Reg<u32, _FS_HCTSIZ0>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ1>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ2>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ3>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ4>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ5>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ6>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_HCTSIZ7>>
[src]
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn dpid(&self) -> DPID_R
[src]
Bits 29:30 - Data PID
impl R<u32, Reg<u32, _FS_DCFG>>
[src]
pub fn dspd(&self) -> DSPD_R
[src]
Bits 0:1 - Device speed
pub fn nzlsohsk(&self) -> NZLSOHSK_R
[src]
Bit 2 - Non-zero-length status OUT handshake
pub fn dad(&self) -> DAD_R
[src]
Bits 4:10 - Device address
pub fn pfivl(&self) -> PFIVL_R
[src]
Bits 11:12 - Periodic frame interval
impl R<u32, Reg<u32, _FS_DCTL>>
[src]
pub fn rwusig(&self) -> RWUSIG_R
[src]
Bit 0 - Remote wakeup signaling
pub fn sdis(&self) -> SDIS_R
[src]
Bit 1 - Soft disconnect
pub fn ginsts(&self) -> GINSTS_R
[src]
Bit 2 - Global IN NAK status
pub fn gonsts(&self) -> GONSTS_R
[src]
Bit 3 - Global OUT NAK status
pub fn tctl(&self) -> TCTL_R
[src]
Bits 4:6 - Test control
pub fn sginak(&self) -> SGINAK_R
[src]
Bit 7 - Set global IN NAK
pub fn cginak(&self) -> CGINAK_R
[src]
Bit 8 - Clear global IN NAK
pub fn sgonak(&self) -> SGONAK_R
[src]
Bit 9 - Set global OUT NAK
pub fn cgonak(&self) -> CGONAK_R
[src]
Bit 10 - Clear global OUT NAK
pub fn poprgdne(&self) -> POPRGDNE_R
[src]
Bit 11 - Power-on programming done
impl R<u32, Reg<u32, _FS_DSTS>>
[src]
pub fn suspsts(&self) -> SUSPSTS_R
[src]
Bit 0 - Suspend status
pub fn enumspd(&self) -> ENUMSPD_R
[src]
Bits 1:2 - Enumerated speed
pub fn eerr(&self) -> EERR_R
[src]
Bit 3 - Erratic error
pub fn fnsof(&self) -> FNSOF_R
[src]
Bits 8:21 - Frame number of the received SOF
impl R<u32, Reg<u32, _FS_DIEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn tom(&self) -> TOM_R
[src]
Bit 3 - Timeout condition mask (Non-isochronous endpoints)
pub fn ittxfemsk(&self) -> ITTXFEMSK_R
[src]
Bit 4 - IN token received when TxFIFO empty mask
pub fn inepnmm(&self) -> INEPNMM_R
[src]
Bit 5 - IN token received with EP mismatch mask
pub fn inepnem(&self) -> INEPNEM_R
[src]
Bit 6 - IN endpoint NAK effective mask
impl R<u32, Reg<u32, _FS_DOEPMSK>>
[src]
pub fn xfrcm(&self) -> XFRCM_R
[src]
Bit 0 - Transfer completed interrupt mask
pub fn epdm(&self) -> EPDM_R
[src]
Bit 1 - Endpoint disabled interrupt mask
pub fn stupm(&self) -> STUPM_R
[src]
Bit 3 - SETUP phase done mask
pub fn otepdm(&self) -> OTEPDM_R
[src]
Bit 4 - OUT token received when endpoint disabled mask
impl R<u32, Reg<u32, _FS_DAINT>>
[src]
pub fn iepint(&self) -> IEPINT_R
[src]
Bits 0:15 - IN endpoint interrupt bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _FS_DAINTMSK>>
[src]
pub fn iepm(&self) -> IEPM_R
[src]
Bits 0:15 - IN EP interrupt mask bits
pub fn oepint(&self) -> OEPINT_R
[src]
Bits 16:31 - OUT endpoint interrupt bits
impl R<u32, Reg<u32, _DVBUSDIS>>
[src]
impl R<u32, Reg<u32, _DVBUSPULSE>>
[src]
impl R<u32, Reg<u32, _DIEPEMPMSK>>
[src]
pub fn ineptxfem(&self) -> INEPTXFEM_R
[src]
Bits 0:15 - IN EP Tx FIFO empty interrupt mask bits
impl R<u32, Reg<u32, _FS_DIEPCTL0>>
[src]
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - Maximum packet size
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USB active endpoint
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAK status
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - Endpoint type
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - STALL handshake
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TxFIFO number
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - Endpoint disable
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - Endpoint enable
impl R<u32, Reg<u32, _DIEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn txfnum(&self) -> TXFNUM_R
[src]
Bits 22:25 - TXFNUM
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL0>>
[src]
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:1 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL1>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL2>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DOEPCTL3>>
[src]
pub fn epena(&self) -> EPENA_R
[src]
Bit 31 - EPENA
pub fn epdis(&self) -> EPDIS_R
[src]
Bit 30 - EPDIS
pub fn stall(&self) -> STALL_R
[src]
Bit 21 - Stall
pub fn snpm(&self) -> SNPM_R
[src]
Bit 20 - SNPM
pub fn eptyp(&self) -> EPTYP_R
[src]
Bits 18:19 - EPTYP
pub fn naksts(&self) -> NAKSTS_R
[src]
Bit 17 - NAKSTS
pub fn eonum_dpid(&self) -> EONUM_DPID_R
[src]
Bit 16 - EONUM/DPID
pub fn usbaep(&self) -> USBAEP_R
[src]
Bit 15 - USBAEP
pub fn mpsiz(&self) -> MPSIZ_R
[src]
Bits 0:10 - MPSIZ
impl R<u32, Reg<u32, _DIEPINT0>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT1>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT2>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPINT3>>
[src]
pub fn txfe(&self) -> TXFE_R
[src]
Bit 7 - TXFE
pub fn inepne(&self) -> INEPNE_R
[src]
Bit 6 - INEPNE
pub fn ittxfe(&self) -> ITTXFE_R
[src]
Bit 4 - ITTXFE
pub fn toc(&self) -> TOC_R
[src]
Bit 3 - TOC
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT0>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT1>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT2>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DOEPINT3>>
[src]
pub fn b2bstup(&self) -> B2BSTUP_R
[src]
Bit 6 - B2BSTUP
pub fn otepdis(&self) -> OTEPDIS_R
[src]
Bit 4 - OTEPDIS
pub fn stup(&self) -> STUP_R
[src]
Bit 3 - STUP
pub fn epdisd(&self) -> EPDISD_R
[src]
Bit 1 - EPDISD
pub fn xfrc(&self) -> XFRC_R
[src]
Bit 0 - XFRC
impl R<u32, Reg<u32, _DIEPTSIZ0>>
[src]
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:20 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ0>>
[src]
pub fn stupcnt(&self) -> STUPCNT_R
[src]
Bits 29:30 - SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bit 19 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:6 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ1>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ2>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DIEPTSIZ3>>
[src]
pub fn mcnt(&self) -> MCNT_R
[src]
Bits 29:30 - Multi count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DTXFSTS0>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS1>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS2>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DTXFSTS3>>
[src]
pub fn ineptfsav(&self) -> INEPTFSAV_R
[src]
Bits 0:15 - IN endpoint TxFIFO space available
impl R<u32, Reg<u32, _DOEPTSIZ1>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ2>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _DOEPTSIZ3>>
[src]
pub fn rxdpid_stupcnt(&self) -> RXDPID_STUPCNT_R
[src]
Bits 29:30 - Received data PID/SETUP packet count
pub fn pktcnt(&self) -> PKTCNT_R
[src]
Bits 19:28 - Packet count
pub fn xfrsiz(&self) -> XFRSIZ_R
[src]
Bits 0:18 - Transfer size
impl R<u32, Reg<u32, _FS_PCGCCTL>>
[src]
pub fn stppclk(&self) -> STPPCLK_R
[src]
Bit 0 - Stop PHY clock
pub fn gatehclk(&self) -> GATEHCLK_R
[src]
Bit 1 - Gate HCLK
pub fn physusp(&self) -> PHYSUSP_R
[src]
Bit 4 - PHY Suspended
impl R<bool, EN1_A>
[src]
pub fn variant(&self) -> EN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, BOFF1_A>
[src]
pub fn variant(&self) -> BOFF1_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, TEN1_A>
[src]
pub fn variant(&self) -> TEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL1_A>
[src]
pub fn variant(&self) -> Variant<u8, TSEL1_A>
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim3_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM3_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim15_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM15_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE1_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE1_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<bool, DMAEN1_A>
[src]
pub fn variant(&self) -> DMAEN1_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, TSEL2_A>
[src]
pub fn variant(&self) -> TSEL2_A
[src]
Get enumerated values variant
pub fn is_tim6_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM6_TRGO
pub fn is_tim8_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8_TRGO
pub fn is_tim7_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM7_TRGO
pub fn is_tim5_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5_TRGO
pub fn is_tim2_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM2_TRGO
pub fn is_tim4_trgo(&self) -> bool
[src]
Checks if the value of the field is TIM4_TRGO
pub fn is_exti9(&self) -> bool
[src]
Checks if the value of the field is EXTI9
pub fn is_software(&self) -> bool
[src]
Checks if the value of the field is SOFTWARE
impl R<u8, WAVE2_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVE2_A>
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_noise(&self) -> bool
[src]
Checks if the value of the field is NOISE
pub fn is_triangle(&self) -> bool
[src]
Checks if the value of the field is TRIANGLE
impl R<u32, Reg<u32, _CR>>
[src]
pub fn en1(&self) -> EN1_R
[src]
Bit 0 - DAC channel1 enable
pub fn boff1(&self) -> BOFF1_R
[src]
Bit 1 - DAC channel1 output buffer disable
pub fn ten1(&self) -> TEN1_R
[src]
Bit 2 - DAC channel1 trigger enable
pub fn tsel1(&self) -> TSEL1_R
[src]
Bits 3:5 - DAC channel1 trigger selection
pub fn wave1(&self) -> WAVE1_R
[src]
Bits 6:7 - DAC channel1 noise/triangle wave generation enable
pub fn mamp1(&self) -> MAMP1_R
[src]
Bits 8:11 - DAC channel1 mask/amplitude selector
pub fn dmaen1(&self) -> DMAEN1_R
[src]
Bit 12 - DAC channel1 DMA enable
pub fn en2(&self) -> EN2_R
[src]
Bit 16 - DAC channel2 enable
pub fn boff2(&self) -> BOFF2_R
[src]
Bit 17 - DAC channel2 output buffer disable
pub fn ten2(&self) -> TEN2_R
[src]
Bit 18 - DAC channel2 trigger enable
pub fn tsel2(&self) -> TSEL2_R
[src]
Bits 19:21 - DAC channel2 trigger selection
pub fn wave2(&self) -> WAVE2_R
[src]
Bits 22:23 - DAC channel2 noise/triangle wave generation enable
pub fn mamp2(&self) -> MAMP2_R
[src]
Bits 24:27 - DAC channel2 mask/amplitude selector
pub fn dmaen2(&self) -> DMAEN2_R
[src]
Bit 28 - DAC channel2 DMA enable
impl R<u32, Reg<u32, _DHR12R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R1>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:11 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12L2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 4:15 - DAC channel2 12-bit left-aligned data
impl R<u32, Reg<u32, _DHR8R2>>
[src]
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 0:7 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DHR12RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:11 - DAC channel1 12-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 16:27 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR12LD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 4:15 - DAC channel1 12-bit left-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 20:31 - DAC channel2 12-bit right-aligned data
impl R<u32, Reg<u32, _DHR8RD>>
[src]
pub fn dacc1dhr(&self) -> DACC1DHR_R
[src]
Bits 0:7 - DAC channel1 8-bit right-aligned data
pub fn dacc2dhr(&self) -> DACC2DHR_R
[src]
Bits 8:15 - DAC channel2 8-bit right-aligned data
impl R<u32, Reg<u32, _DOR1>>
[src]
pub fn dacc1dor(&self) -> DACC1DOR_R
[src]
Bits 0:11 - DAC channel1 data output
impl R<u32, Reg<u32, _DOR2>>
[src]
pub fn dacc2dor(&self) -> DACC2DOR_R
[src]
Bits 0:11 - DAC channel2 data output
impl R<u32, Reg<u32, _IDCODE>>
[src]
pub fn dev_id(&self) -> DEV_ID_R
[src]
Bits 0:11 - DEV_ID
pub fn rev_id(&self) -> REV_ID_R
[src]
Bits 16:31 - REV_ID
impl R<u32, Reg<u32, _CR>>
[src]
pub fn dbg_sleep(&self) -> DBG_SLEEP_R
[src]
Bit 0 - DBG_SLEEP
pub fn dbg_stop(&self) -> DBG_STOP_R
[src]
Bit 1 - DBG_STOP
pub fn dbg_standby(&self) -> DBG_STANDBY_R
[src]
Bit 2 - DBG_STANDBY
pub fn trace_ioen(&self) -> TRACE_IOEN_R
[src]
Bit 5 - TRACE_IOEN
pub fn trace_mode(&self) -> TRACE_MODE_R
[src]
Bits 6:7 - TRACE_MODE
pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R
[src]
Bit 8 - DBG_IWDG_STOP
pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R
[src]
Bit 9 - DBG_WWDG_STOP
pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R
[src]
Bit 10 - DBG_TIM1_STOP
pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R
[src]
Bit 11 - DBG_TIM2_STOP
pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R
[src]
Bit 12 - DBG_TIM3_STOP
pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R
[src]
Bit 13 - DBG_TIM4_STOP
pub fn dbg_can1_stop(&self) -> DBG_CAN1_STOP_R
[src]
Bit 14 - DBG_CAN1_STOP
pub fn dbg_i2c1_smbus_timeout(&self) -> DBG_I2C1_SMBUS_TIMEOUT_R
[src]
Bit 15 - DBG_I2C1_SMBUS_TIMEOUT
pub fn dbg_i2c2_smbus_timeout(&self) -> DBG_I2C2_SMBUS_TIMEOUT_R
[src]
Bit 16 - DBG_I2C2_SMBUS_TIMEOUT
pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R
[src]
Bit 18 - DBG_TIM5_STOP
pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R
[src]
Bit 19 - DBG_TIM6_STOP
pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R
[src]
Bit 20 - DBG_TIM7_STOP
pub fn dbg_can2_stop(&self) -> DBG_CAN2_STOP_R
[src]
Bit 21 - DBG_CAN2_STOP
impl R<u32, Reg<u32, _SR>>
[src]
pub fn pe(&self) -> PE_R
[src]
Bit 0 - Parity error
pub fn fe(&self) -> FE_R
[src]
Bit 1 - Framing error
pub fn ne(&self) -> NE_R
[src]
Bit 2 - Noise error flag
pub fn ore(&self) -> ORE_R
[src]
Bit 3 - Overrun error
pub fn idle(&self) -> IDLE_R
[src]
Bit 4 - IDLE line detected
pub fn rxne(&self) -> RXNE_R
[src]
Bit 5 - Read data register not empty
pub fn tc(&self) -> TC_R
[src]
Bit 6 - Transmission complete
pub fn txe(&self) -> TXE_R
[src]
Bit 7 - Transmit data register empty
pub fn lbd(&self) -> LBD_R
[src]
Bit 8 - LIN break detection flag
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _BRR>>
[src]
pub fn div_fraction(&self) -> DIV_FRACTION_R
[src]
Bits 0:3 - DIV_Fraction
pub fn div_mantissa(&self) -> DIV_MANTISSA_R
[src]
Bits 4:15 - DIV_Mantissa
impl R<bool, SBK_A>
[src]
pub fn variant(&self) -> SBK_A
[src]
Get enumerated values variant
pub fn is_no_break(&self) -> bool
[src]
Checks if the value of the field is NOBREAK
pub fn is_break_(&self) -> bool
[src]
Checks if the value of the field is BREAK
impl R<bool, RWU_A>
[src]
pub fn variant(&self) -> RWU_A
[src]
Get enumerated values variant
pub fn is_active(&self) -> bool
[src]
Checks if the value of the field is ACTIVE
pub fn is_mute(&self) -> bool
[src]
Checks if the value of the field is MUTE
impl R<bool, RE_A>
[src]
pub fn variant(&self) -> RE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TE_A>
[src]
pub fn variant(&self) -> TE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>
[src]
pub fn variant(&self) -> IDLEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RXNEIE_A>
[src]
pub fn variant(&self) -> RXNEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>
[src]
pub fn variant(&self) -> TCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TXEIE_A>
[src]
pub fn variant(&self) -> TXEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PEIE_A>
[src]
pub fn variant(&self) -> PEIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PS_A>
[src]
pub fn variant(&self) -> PS_A
[src]
Get enumerated values variant
pub fn is_even(&self) -> bool
[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool
[src]
Checks if the value of the field is ODD
impl R<bool, PCE_A>
[src]
pub fn variant(&self) -> PCE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WAKE_A>
[src]
pub fn variant(&self) -> WAKE_A
[src]
Get enumerated values variant
pub fn is_idle_line(&self) -> bool
[src]
Checks if the value of the field is IDLELINE
pub fn is_address_mark(&self) -> bool
[src]
Checks if the value of the field is ADDRESSMARK
impl R<bool, M_A>
[src]
pub fn variant(&self) -> M_A
[src]
Get enumerated values variant
pub fn is_m8(&self) -> bool
[src]
Checks if the value of the field is M8
pub fn is_m9(&self) -> bool
[src]
Checks if the value of the field is M9
impl R<bool, UE_A>
[src]
pub fn variant(&self) -> UE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn sbk(&self) -> SBK_R
[src]
Bit 0 - Send break
pub fn rwu(&self) -> RWU_R
[src]
Bit 1 - Receiver wakeup
pub fn re(&self) -> RE_R
[src]
Bit 2 - Receiver enable
pub fn te(&self) -> TE_R
[src]
Bit 3 - Transmitter enable
pub fn idleie(&self) -> IDLEIE_R
[src]
Bit 4 - IDLE interrupt enable
pub fn rxneie(&self) -> RXNEIE_R
[src]
Bit 5 - RXNE interrupt enable
pub fn tcie(&self) -> TCIE_R
[src]
Bit 6 - Transmission complete interrupt enable
pub fn txeie(&self) -> TXEIE_R
[src]
Bit 7 - TXE interrupt enable
pub fn peie(&self) -> PEIE_R
[src]
Bit 8 - PE interrupt enable
pub fn ps(&self) -> PS_R
[src]
Bit 9 - Parity selection
pub fn pce(&self) -> PCE_R
[src]
Bit 10 - Parity control enable
pub fn wake(&self) -> WAKE_R
[src]
Bit 11 - Wakeup method
pub fn m(&self) -> M_R
[src]
Bit 12 - Word length
pub fn ue(&self) -> UE_R
[src]
Bit 13 - USART enable
impl R<bool, LBDL_A>
[src]
pub fn variant(&self) -> LBDL_A
[src]
Get enumerated values variant
pub fn is_lbdl10(&self) -> bool
[src]
Checks if the value of the field is LBDL10
pub fn is_lbdl11(&self) -> bool
[src]
Checks if the value of the field is LBDL11
impl R<bool, LBDIE_A>
[src]
pub fn variant(&self) -> LBDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, STOP_A>
[src]
pub fn variant(&self) -> Variant<u8, STOP_A>
[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool
[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool
[src]
Checks if the value of the field is STOP2
impl R<bool, LINEN_A>
[src]
pub fn variant(&self) -> LINEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:3 - Address of the USART node
pub fn lbdl(&self) -> LBDL_R
[src]
Bit 5 - lin break detection length
pub fn lbdie(&self) -> LBDIE_R
[src]
Bit 6 - LIN break detection interrupt enable
pub fn stop(&self) -> STOP_R
[src]
Bits 12:13 - STOP bits
pub fn linen(&self) -> LINEN_R
[src]
Bit 14 - LIN mode enable
impl R<bool, EIE_A>
[src]
pub fn variant(&self) -> EIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IREN_A>
[src]
pub fn variant(&self) -> IREN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, IRLP_A>
[src]
pub fn variant(&self) -> IRLP_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOWPOWER
impl R<bool, HDSEL_A>
[src]
pub fn variant(&self) -> HDSEL_A
[src]
Get enumerated values variant
pub fn is_full_duplex(&self) -> bool
[src]
Checks if the value of the field is FULLDUPLEX
pub fn is_half_duplex(&self) -> bool
[src]
Checks if the value of the field is HALFDUPLEX
impl R<bool, DMAR_A>
[src]
pub fn variant(&self) -> DMAR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DMAT_A>
[src]
pub fn variant(&self) -> DMAT_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR3>>
[src]
pub fn eie(&self) -> EIE_R
[src]
Bit 0 - Error interrupt enable
pub fn iren(&self) -> IREN_R
[src]
Bit 1 - IrDA mode enable
pub fn irlp(&self) -> IRLP_R
[src]
Bit 2 - IrDA low-power
pub fn hdsel(&self) -> HDSEL_R
[src]
Bit 3 - Half-duplex selection
pub fn dmar(&self) -> DMAR_R
[src]
Bit 6 - DMA enable receiver
pub fn dmat(&self) -> DMAT_R
[src]
Bit 7 - DMA enable transmitter
impl R<u32, Reg<u32, _DR>>
[src]
impl R<u32, Reg<u32, _IDR>>
[src]
impl R<u8, LATENCY_A>
[src]
pub fn variant(&self) -> Variant<u8, LATENCY_A>
[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool
[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool
[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool
[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _ACR>>
[src]
pub fn latency(&self) -> LATENCY_R
[src]
Bits 0:2 - Latency
pub fn hlfcya(&self) -> HLFCYA_R
[src]
Bit 3 - Flash half cycle access enable
pub fn prftbe(&self) -> PRFTBE_R
[src]
Bit 4 - Prefetch buffer enable
pub fn prftbs(&self) -> PRFTBS_R
[src]
Bit 5 - Prefetch buffer status
impl R<u32, Reg<u32, _SR>>
[src]
pub fn eop(&self) -> EOP_R
[src]
Bit 5 - End of operation
pub fn wrprterr(&self) -> WRPRTERR_R
[src]
Bit 4 - Write protection error
pub fn pgerr(&self) -> PGERR_R
[src]
Bit 2 - Programming error
pub fn bsy(&self) -> BSY_R
[src]
Bit 0 - Busy
impl R<u32, Reg<u32, _CR>>
[src]
pub fn pg(&self) -> PG_R
[src]
Bit 0 - Programming
pub fn per(&self) -> PER_R
[src]
Bit 1 - Page Erase
pub fn mer(&self) -> MER_R
[src]
Bit 2 - Mass Erase
pub fn optpg(&self) -> OPTPG_R
[src]
Bit 4 - Option byte programming
pub fn opter(&self) -> OPTER_R
[src]
Bit 5 - Option byte erase
pub fn strt(&self) -> STRT_R
[src]
Bit 6 - Start
pub fn lock(&self) -> LOCK_R
[src]
Bit 7 - Lock
pub fn optwre(&self) -> OPTWRE_R
[src]
Bit 9 - Option bytes write enable
pub fn errie(&self) -> ERRIE_R
[src]
Bit 10 - Error interrupt enable
pub fn eopie(&self) -> EOPIE_R
[src]
Bit 12 - End of operation interrupt enable
impl R<u32, Reg<u32, _OBR>>
[src]
pub fn opterr(&self) -> OPTERR_R
[src]
Bit 0 - Option byte error
pub fn rdprt(&self) -> RDPRT_R
[src]
Bit 1 - Read protection
pub fn wdg_sw(&self) -> WDG_SW_R
[src]
Bit 2 - WDG_SW
pub fn n_rst_stop(&self) -> NRST_STOP_R
[src]
Bit 3 - nRST_STOP
pub fn n_rst_stdby(&self) -> NRST_STDBY_R
[src]
Bit 4 - nRST_STDBY
pub fn data0(&self) -> DATA0_R
[src]
Bits 10:17 - Data0
pub fn data1(&self) -> DATA1_R
[src]
Bits 18:25 - Data1
impl R<u32, Reg<u32, _WRPR>>
[src]
impl R<u32, Reg<u32, _BCR1>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
impl R<u32, Reg<u32, _BTR1>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BCR2>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
impl R<u32, Reg<u32, _BTR2>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BCR3>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
impl R<u32, Reg<u32, _BTR3>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BCR4>>
[src]
pub fn cburstrw(&self) -> CBURSTRW_R
[src]
Bit 19 - CBURSTRW
pub fn asyncwait(&self) -> ASYNCWAIT_R
[src]
Bit 15 - ASYNCWAIT
pub fn extmod(&self) -> EXTMOD_R
[src]
Bit 14 - EXTMOD
pub fn waiten(&self) -> WAITEN_R
[src]
Bit 13 - WAITEN
pub fn wren(&self) -> WREN_R
[src]
Bit 12 - WREN
pub fn waitcfg(&self) -> WAITCFG_R
[src]
Bit 11 - WAITCFG
pub fn wrapmod(&self) -> WRAPMOD_R
[src]
Bit 10 - WRAPMOD
pub fn waitpol(&self) -> WAITPOL_R
[src]
Bit 9 - WAITPOL
pub fn bursten(&self) -> BURSTEN_R
[src]
Bit 8 - BURSTEN
pub fn faccen(&self) -> FACCEN_R
[src]
Bit 6 - FACCEN
pub fn mwid(&self) -> MWID_R
[src]
Bits 4:5 - MWID
pub fn mtyp(&self) -> MTYP_R
[src]
Bits 2:3 - MTYP
pub fn muxen(&self) -> MUXEN_R
[src]
Bit 1 - MUXEN
pub fn mbken(&self) -> MBKEN_R
[src]
Bit 0 - MBKEN
impl R<u32, Reg<u32, _BTR4>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn busturn(&self) -> BUSTURN_R
[src]
Bits 16:19 - BUSTURN
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _PCR2>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR2>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM2>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT2>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - Attribute memory x databus HiZ time
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - Attribute memory x hold time
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - Attribute memory x wait time
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - Attribute memory x setup time
impl R<u32, Reg<u32, _ECCR2>>
[src]
impl R<u32, Reg<u32, _PCR3>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR3>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM3>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT3>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _ECCR3>>
[src]
impl R<u32, Reg<u32, _PCR4>>
[src]
pub fn eccps(&self) -> ECCPS_R
[src]
Bits 17:19 - ECCPS
pub fn tar(&self) -> TAR_R
[src]
Bits 13:16 - TAR
pub fn tclr(&self) -> TCLR_R
[src]
Bits 9:12 - TCLR
pub fn eccen(&self) -> ECCEN_R
[src]
Bit 6 - ECCEN
pub fn pwid(&self) -> PWID_R
[src]
Bits 4:5 - PWID
pub fn ptyp(&self) -> PTYP_R
[src]
Bit 3 - PTYP
pub fn pbken(&self) -> PBKEN_R
[src]
Bit 2 - PBKEN
pub fn pwaiten(&self) -> PWAITEN_R
[src]
Bit 1 - PWAITEN
impl R<u32, Reg<u32, _SR4>>
[src]
pub fn fempt(&self) -> FEMPT_R
[src]
Bit 6 - FEMPT
pub fn ifen(&self) -> IFEN_R
[src]
Bit 5 - IFEN
pub fn ilen(&self) -> ILEN_R
[src]
Bit 4 - ILEN
pub fn iren(&self) -> IREN_R
[src]
Bit 3 - IREN
pub fn ifs(&self) -> IFS_R
[src]
Bit 2 - IFS
pub fn ils(&self) -> ILS_R
[src]
Bit 1 - ILS
pub fn irs(&self) -> IRS_R
[src]
Bit 0 - IRS
impl R<u32, Reg<u32, _PMEM4>>
[src]
pub fn memhizx(&self) -> MEMHIZX_R
[src]
Bits 24:31 - MEMHIZx
pub fn memholdx(&self) -> MEMHOLDX_R
[src]
Bits 16:23 - MEMHOLDx
pub fn memwaitx(&self) -> MEMWAITX_R
[src]
Bits 8:15 - MEMWAITx
pub fn memsetx(&self) -> MEMSETX_R
[src]
Bits 0:7 - MEMSETx
impl R<u32, Reg<u32, _PATT4>>
[src]
pub fn atthizx(&self) -> ATTHIZX_R
[src]
Bits 24:31 - ATTHIZx
pub fn attholdx(&self) -> ATTHOLDX_R
[src]
Bits 16:23 - ATTHOLDx
pub fn attwaitx(&self) -> ATTWAITX_R
[src]
Bits 8:15 - ATTWAITx
pub fn attsetx(&self) -> ATTSETX_R
[src]
Bits 0:7 - ATTSETx
impl R<u32, Reg<u32, _PIO4>>
[src]
pub fn iohizx(&self) -> IOHIZX_R
[src]
Bits 24:31 - IOHIZx
pub fn ioholdx(&self) -> IOHOLDX_R
[src]
Bits 16:23 - IOHOLDx
pub fn iowaitx(&self) -> IOWAITX_R
[src]
Bits 8:15 - IOWAITx
pub fn iosetx(&self) -> IOSETX_R
[src]
Bits 0:7 - IOSETx
impl R<u32, Reg<u32, _BWTR1>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BWTR2>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BWTR3>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _BWTR4>>
[src]
pub fn accmod(&self) -> ACCMOD_R
[src]
Bits 28:29 - ACCMOD
pub fn datlat(&self) -> DATLAT_R
[src]
Bits 24:27 - DATLAT
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 20:23 - CLKDIV
pub fn datast(&self) -> DATAST_R
[src]
Bits 8:15 - DATAST
pub fn addhld(&self) -> ADDHLD_R
[src]
Bits 4:7 - ADDHLD
pub fn addset(&self) -> ADDSET_R
[src]
Bits 0:3 - ADDSET
impl R<u32, Reg<u32, _POWER>>
[src]
impl R<u32, Reg<u32, _CLKCR>>
[src]
pub fn hwfc_en(&self) -> HWFC_EN_R
[src]
Bit 14 - HW Flow Control enable
pub fn negedge(&self) -> NEGEDGE_R
[src]
Bit 13 - SDIO_CK dephasing selection bit
pub fn widbus(&self) -> WIDBUS_R
[src]
Bits 11:12 - Wide bus mode enable bit
pub fn bypass(&self) -> BYPASS_R
[src]
Bit 10 - Clock divider bypass enable bit
pub fn pwrsav(&self) -> PWRSAV_R
[src]
Bit 9 - Power saving configuration bit
pub fn clken(&self) -> CLKEN_R
[src]
Bit 8 - Clock enable bit
pub fn clkdiv(&self) -> CLKDIV_R
[src]
Bits 0:7 - Clock divide factor
impl R<u32, Reg<u32, _ARG>>
[src]
impl R<u32, Reg<u32, _CMD>>
[src]
pub fn ce_atacmd(&self) -> CE_ATACMD_R
[src]
Bit 14 - CE-ATA command
pub fn n_ien(&self) -> NIEN_R
[src]
Bit 13 - not Interrupt Enable
pub fn encmdcompl(&self) -> ENCMDCOMPL_R
[src]
Bit 12 - Enable CMD completion
pub fn sdiosuspend(&self) -> SDIOSUSPEND_R
[src]
Bit 11 - SD I/O suspend command
pub fn cpsmen(&self) -> CPSMEN_R
[src]
Bit 10 - Command path state machine (CPSM) Enable bit
pub fn waitpend(&self) -> WAITPEND_R
[src]
Bit 9 - CPSM Waits for ends of data transfer (CmdPend internal signal).
pub fn waitint(&self) -> WAITINT_R
[src]
Bit 8 - CPSM waits for interrupt request
pub fn waitresp(&self) -> WAITRESP_R
[src]
Bits 6:7 - Wait for response bits
pub fn cmdindex(&self) -> CMDINDEX_R
[src]
Bits 0:5 - Command index
impl R<u32, Reg<u32, _RESPCMD>>
[src]
impl R<u32, Reg<u32, _RESP1>>
[src]
pub fn cardstatus1(&self) -> CARDSTATUS1_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP2>>
[src]
pub fn cardstatus2(&self) -> CARDSTATUS2_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP3>>
[src]
pub fn cardstatus3(&self) -> CARDSTATUS3_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _RESP4>>
[src]
pub fn cardstatus4(&self) -> CARDSTATUS4_R
[src]
Bits 0:31 - Card Status
impl R<u32, Reg<u32, _DTIMER>>
[src]
pub fn datatime(&self) -> DATATIME_R
[src]
Bits 0:31 - Data timeout period
impl R<u32, Reg<u32, _DLEN>>
[src]
pub fn datalength(&self) -> DATALENGTH_R
[src]
Bits 0:24 - Data length value
impl R<u32, Reg<u32, _DCTRL>>
[src]
pub fn sdioen(&self) -> SDIOEN_R
[src]
Bit 11 - SD I/O enable functions
pub fn rwmod(&self) -> RWMOD_R
[src]
Bit 10 - Read wait mode
pub fn rwstop(&self) -> RWSTOP_R
[src]
Bit 9 - Read wait stop
pub fn rwstart(&self) -> RWSTART_R
[src]
Bit 8 - Read wait start
pub fn dblocksize(&self) -> DBLOCKSIZE_R
[src]
Bits 4:7 - Data block size
pub fn dmaen(&self) -> DMAEN_R
[src]
Bit 3 - DMA enable bit
pub fn dtmode(&self) -> DTMODE_R
[src]
Bit 2 - Data transfer mode selection 1: Stream or SDIO multibyte data transfer.
pub fn dtdir(&self) -> DTDIR_R
[src]
Bit 1 - Data transfer direction selection
pub fn dten(&self) -> DTEN_R
[src]
Bit 0 - DTEN
impl R<u32, Reg<u32, _DCOUNT>>
[src]
pub fn datacount(&self) -> DATACOUNT_R
[src]
Bits 0:24 - Data count value
impl R<u32, Reg<u32, _STA>>
[src]
pub fn ceataend(&self) -> CEATAEND_R
[src]
Bit 23 - CE-ATA command completion signal received for CMD61
pub fn sdioit(&self) -> SDIOIT_R
[src]
Bit 22 - SDIO interrupt received
pub fn rxdavl(&self) -> RXDAVL_R
[src]
Bit 21 - Data available in receive FIFO
pub fn txdavl(&self) -> TXDAVL_R
[src]
Bit 20 - Data available in transmit FIFO
pub fn rxfifoe(&self) -> RXFIFOE_R
[src]
Bit 19 - Receive FIFO empty
pub fn txfifoe(&self) -> TXFIFOE_R
[src]
Bit 18 - Transmit FIFO empty
pub fn rxfifof(&self) -> RXFIFOF_R
[src]
Bit 17 - Receive FIFO full
pub fn txfifof(&self) -> TXFIFOF_R
[src]
Bit 16 - Transmit FIFO full
pub fn rxfifohf(&self) -> RXFIFOHF_R
[src]
Bit 15 - Receive FIFO half full: there are at least 8 words in the FIFO
pub fn txfifohe(&self) -> TXFIFOHE_R
[src]
Bit 14 - Transmit FIFO half empty: at least 8 words can be written into the FIFO
pub fn rxact(&self) -> RXACT_R
[src]
Bit 13 - Data receive in progress
pub fn txact(&self) -> TXACT_R
[src]
Bit 12 - Data transmit in progress
pub fn cmdact(&self) -> CMDACT_R
[src]
Bit 11 - Command transfer in progress
pub fn dbckend(&self) -> DBCKEND_R
[src]
Bit 10 - Data block sent/received (CRC check passed)
pub fn stbiterr(&self) -> STBITERR_R
[src]
Bit 9 - Start bit not detected on all data signals in wide bus mode
pub fn dataend(&self) -> DATAEND_R
[src]
Bit 8 - Data end (data counter, SDIDCOUNT, is zero)
pub fn cmdsent(&self) -> CMDSENT_R
[src]
Bit 7 - Command sent (no response required)
pub fn cmdrend(&self) -> CMDREND_R
[src]
Bit 6 - Command response received (CRC check passed)
pub fn rxoverr(&self) -> RXOVERR_R
[src]
Bit 5 - Received FIFO overrun error
pub fn txunderr(&self) -> TXUNDERR_R
[src]
Bit 4 - Transmit FIFO underrun error
pub fn dtimeout(&self) -> DTIMEOUT_R
[src]
Bit 3 - Data timeout
pub fn ctimeout(&self) -> CTIMEOUT_R
[src]
Bit 2 - Command response timeout
pub fn dcrcfail(&self) -> DCRCFAIL_R
[src]
Bit 1 - Data block sent/received (CRC check failed)
pub fn ccrcfail(&self) -> CCRCFAIL_R
[src]
Bit 0 - Command response received (CRC check failed)
impl R<u32, Reg<u32, _ICR>>
[src]
pub fn ceataendc(&self) -> CEATAENDC_R
[src]
Bit 23 - CEATAEND flag clear bit
pub fn sdioitc(&self) -> SDIOITC_R
[src]
Bit 22 - SDIOIT flag clear bit
pub fn dbckendc(&self) -> DBCKENDC_R
[src]
Bit 10 - DBCKEND flag clear bit
pub fn stbiterrc(&self) -> STBITERRC_R
[src]
Bit 9 - STBITERR flag clear bit
pub fn dataendc(&self) -> DATAENDC_R
[src]
Bit 8 - DATAEND flag clear bit
pub fn cmdsentc(&self) -> CMDSENTC_R
[src]
Bit 7 - CMDSENT flag clear bit
pub fn cmdrendc(&self) -> CMDRENDC_R
[src]
Bit 6 - CMDREND flag clear bit
pub fn rxoverrc(&self) -> RXOVERRC_R
[src]
Bit 5 - RXOVERR flag clear bit
pub fn txunderrc(&self) -> TXUNDERRC_R
[src]
Bit 4 - TXUNDERR flag clear bit
pub fn dtimeoutc(&self) -> DTIMEOUTC_R
[src]
Bit 3 - DTIMEOUT flag clear bit
pub fn ctimeoutc(&self) -> CTIMEOUTC_R
[src]
Bit 2 - CTIMEOUT flag clear bit
pub fn dcrcfailc(&self) -> DCRCFAILC_R
[src]
Bit 1 - DCRCFAIL flag clear bit
pub fn ccrcfailc(&self) -> CCRCFAILC_R
[src]
Bit 0 - CCRCFAIL flag clear bit
impl R<u32, Reg<u32, _MASK>>
[src]
pub fn ceataendie(&self) -> CEATAENDIE_R
[src]
Bit 23 - CE-ATA command completion signal received interrupt enable
pub fn sdioitie(&self) -> SDIOITIE_R
[src]
Bit 22 - SDIO mode interrupt received interrupt enable
pub fn rxdavlie(&self) -> RXDAVLIE_R
[src]
Bit 21 - Data available in Rx FIFO interrupt enable
pub fn txdavlie(&self) -> TXDAVLIE_R
[src]
Bit 20 - Data available in Tx FIFO interrupt enable
pub fn rxfifoeie(&self) -> RXFIFOEIE_R
[src]
Bit 19 - Rx FIFO empty interrupt enable
pub fn txfifoeie(&self) -> TXFIFOEIE_R
[src]
Bit 18 - Tx FIFO empty interrupt enable
pub fn rxfifofie(&self) -> RXFIFOFIE_R
[src]
Bit 17 - Rx FIFO full interrupt enable
pub fn txfifofie(&self) -> TXFIFOFIE_R
[src]
Bit 16 - Tx FIFO full interrupt enable
pub fn rxfifohfie(&self) -> RXFIFOHFIE_R
[src]
Bit 15 - Rx FIFO half full interrupt enable
pub fn txfifoheie(&self) -> TXFIFOHEIE_R
[src]
Bit 14 - Tx FIFO half empty interrupt enable
pub fn rxactie(&self) -> RXACTIE_R
[src]
Bit 13 - Data receive acting interrupt enable
pub fn txactie(&self) -> TXACTIE_R
[src]
Bit 12 - Data transmit acting interrupt enable
pub fn cmdactie(&self) -> CMDACTIE_R
[src]
Bit 11 - Command acting interrupt enable
pub fn dbckendie(&self) -> DBCKENDIE_R
[src]
Bit 10 - Data block end interrupt enable
pub fn stbiterrie(&self) -> STBITERRIE_R
[src]
Bit 9 - Start bit error interrupt enable
pub fn dataendie(&self) -> DATAENDIE_R
[src]
Bit 8 - Data end interrupt enable
pub fn cmdsentie(&self) -> CMDSENTIE_R
[src]
Bit 7 - Command sent interrupt enable
pub fn cmdrendie(&self) -> CMDRENDIE_R
[src]
Bit 6 - Command response received interrupt enable
pub fn rxoverrie(&self) -> RXOVERRIE_R
[src]
Bit 5 - Rx FIFO overrun error interrupt enable
pub fn txunderrie(&self) -> TXUNDERRIE_R
[src]
Bit 4 - Tx FIFO underrun error interrupt enable
pub fn dtimeoutie(&self) -> DTIMEOUTIE_R
[src]
Bit 3 - Data timeout interrupt enable
pub fn ctimeoutie(&self) -> CTIMEOUTIE_R
[src]
Bit 2 - Command timeout interrupt enable
pub fn dcrcfailie(&self) -> DCRCFAILIE_R
[src]
Bit 1 - Data CRC fail interrupt enable
pub fn ccrcfailie(&self) -> CCRCFAILIE_R
[src]
Bit 0 - Command CRC fail interrupt enable
impl R<u32, Reg<u32, _FIFOCNT>>
[src]
pub fn fifocount(&self) -> FIFOCOUNT_R
[src]
Bits 0:23 - Remaining number of words to be written to or read from the FIFO.
impl R<u32, Reg<u32, _FIFO>>
[src]
pub fn fifodata(&self) -> FIFODATA_R
[src]
Bits 0:31 - Receive and transmit FIFO data
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<u32, Reg<u32, _CR2>>
[src]
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 12:15 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CMS_A>
[src]
pub fn variant(&self) -> CMS_A
[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool
[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned1(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED1
pub fn is_center_aligned2(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED2
pub fn is_center_aligned3(&self) -> bool
[src]
Checks if the value of the field is CENTERALIGNED3
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_up(&self) -> bool
[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool
[src]
Checks if the value of the field is DOWN
impl R<bool, OPM_A>
[src]
pub fn variant(&self) -> OPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn cms(&self) -> CMS_R
[src]
Bits 5:6 - Center-aligned mode selection
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction
pub fn opm(&self) -> OPM_R
[src]
Bit 3 - One-pulse mode
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, TI1S_A>
[src]
pub fn variant(&self) -> TI1S_A
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool
[src]
Checks if the value of the field is XOR
impl R<u8, MMS_A>
[src]
pub fn variant(&self) -> MMS_A
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_compare_pulse(&self) -> bool
[src]
Checks if the value of the field is COMPAREPULSE
pub fn is_compare_oc1(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC1
pub fn is_compare_oc2(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC2
pub fn is_compare_oc3(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC3
pub fn is_compare_oc4(&self) -> bool
[src]
Checks if the value of the field is COMPAREOC4
impl R<bool, CCDS_A>
[src]
pub fn variant(&self) -> CCDS_A
[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool
[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool
[src]
Checks if the value of the field is ONUPDATE
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn ois4(&self) -> OIS4_R
[src]
Bit 14 - Output Idle state 4
pub fn ois3n(&self) -> OIS3N_R
[src]
Bit 13 - Output Idle state 3
pub fn ois3(&self) -> OIS3_R
[src]
Bit 12 - Output Idle state 3
pub fn ois2n(&self) -> OIS2N_R
[src]
Bit 11 - Output Idle state 2
pub fn ois2(&self) -> OIS2_R
[src]
Bit 10 - Output Idle state 2
pub fn ois1n(&self) -> OIS1N_R
[src]
Bit 9 - Output Idle state 1
pub fn ois1(&self) -> OIS1_R
[src]
Bit 8 - Output Idle state 1
pub fn ti1s(&self) -> TI1S_R
[src]
Bit 7 - TI1 selection
pub fn mms(&self) -> MMS_R
[src]
Bits 4:6 - Master mode selection
pub fn ccds(&self) -> CCDS_R
[src]
Bit 3 - Capture/compare DMA selection
pub fn ccus(&self) -> CCUS_R
[src]
Bit 2 - Capture/compare control update selection
pub fn ccpc(&self) -> CCPC_R
[src]
Bit 0 - Capture/compare preloaded control
impl R<bool, ETP_A>
[src]
pub fn variant(&self) -> ETP_A
[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool
[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool
[src]
Checks if the value of the field is INVERTED
impl R<bool, ECE_A>
[src]
pub fn variant(&self) -> ECE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPS_A>
[src]
pub fn variant(&self) -> ETPS_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
impl R<u8, ETF_A>
[src]
pub fn variant(&self) -> ETF_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>
[src]
pub fn variant(&self) -> MSM_A
[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool
[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool
[src]
Checks if the value of the field is SYNC
impl R<u8, TS_A>
[src]
pub fn variant(&self) -> Variant<u8, TS_A>
[src]
Get enumerated values variant
pub fn is_itr0(&self) -> bool
[src]
Checks if the value of the field is ITR0
pub fn is_itr1(&self) -> bool
[src]
Checks if the value of the field is ITR1
pub fn is_itr2(&self) -> bool
[src]
Checks if the value of the field is ITR2
pub fn is_ti1f_ed(&self) -> bool
[src]
Checks if the value of the field is TI1F_ED
pub fn is_ti1fp1(&self) -> bool
[src]
Checks if the value of the field is TI1FP1
pub fn is_ti2fp2(&self) -> bool
[src]
Checks if the value of the field is TI2FP2
pub fn is_etrf(&self) -> bool
[src]
Checks if the value of the field is ETRF
impl R<u8, SMS_A>
[src]
pub fn variant(&self) -> SMS_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_encoder_mode_1(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_1
pub fn is_encoder_mode_2(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_2
pub fn is_encoder_mode_3(&self) -> bool
[src]
Checks if the value of the field is ENCODER_MODE_3
pub fn is_reset_mode(&self) -> bool
[src]
Checks if the value of the field is RESET_MODE
pub fn is_gated_mode(&self) -> bool
[src]
Checks if the value of the field is GATED_MODE
pub fn is_trigger_mode(&self) -> bool
[src]
Checks if the value of the field is TRIGGER_MODE
pub fn is_ext_clock_mode(&self) -> bool
[src]
Checks if the value of the field is EXT_CLOCK_MODE
impl R<u32, Reg<u32, _SMCR>>
[src]
pub fn etp(&self) -> ETP_R
[src]
Bit 15 - External trigger polarity
pub fn ece(&self) -> ECE_R
[src]
Bit 14 - External clock enable
pub fn etps(&self) -> ETPS_R
[src]
Bits 12:13 - External trigger prescaler
pub fn etf(&self) -> ETF_R
[src]
Bits 8:11 - External trigger filter
pub fn msm(&self) -> MSM_R
[src]
Bit 7 - Master/Slave mode
pub fn ts(&self) -> TS_R
[src]
Bits 4:6 - Trigger selection
pub fn sms(&self) -> SMS_R
[src]
Bits 0:2 - Slave mode selection
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1IE_A>
[src]
pub fn variant(&self) -> CC1IE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TIE_A>
[src]
pub fn variant(&self) -> TIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, UDE_A>
[src]
pub fn variant(&self) -> UDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CC1DE_A>
[src]
pub fn variant(&self) -> CC1DE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, TDE_A>
[src]
pub fn variant(&self) -> TDE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn cc2ie(&self) -> CC2IE_R
[src]
Bit 2 - Capture/Compare 2 interrupt enable
pub fn cc3ie(&self) -> CC3IE_R
[src]
Bit 3 - Capture/Compare 3 interrupt enable
pub fn cc4ie(&self) -> CC4IE_R
[src]
Bit 4 - Capture/Compare 4 interrupt enable
pub fn comie(&self) -> COMIE_R
[src]
Bit 5 - COM interrupt enable
pub fn tie(&self) -> TIE_R
[src]
Bit 6 - Trigger interrupt enable
pub fn bie(&self) -> BIE_R
[src]
Bit 7 - Break interrupt enable
pub fn ude(&self) -> UDE_R
[src]
Bit 8 - Update DMA request enable
pub fn cc1de(&self) -> CC1DE_R
[src]
Bit 9 - Capture/Compare 1 DMA request enable
pub fn cc2de(&self) -> CC2DE_R
[src]
Bit 10 - Capture/Compare 2 DMA request enable
pub fn cc3de(&self) -> CC3DE_R
[src]
Bit 11 - Capture/Compare 3 DMA request enable
pub fn cc4de(&self) -> CC4DE_R
[src]
Bit 12 - Capture/Compare 4 DMA request enable
pub fn comde(&self) -> COMDE_R
[src]
Bit 13 - COM DMA request enable
pub fn tde(&self) -> TDE_R
[src]
Bit 14 - Trigger DMA request enable
impl R<bool, CC4OF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4OF_A>
[src]
Get enumerated values variant
pub fn is_overcapture(&self) -> bool
[src]
Checks if the value of the field is OVERCAPTURE
impl R<bool, TIF_A>
[src]
pub fn variant(&self) -> TIF_A
[src]
Get enumerated values variant
pub fn is_no_trigger(&self) -> bool
[src]
Checks if the value of the field is NOTRIGGER
pub fn is_trigger(&self) -> bool
[src]
Checks if the value of the field is TRIGGER
impl R<bool, CC4IF_A>
[src]
pub fn variant(&self) -> Variant<bool, CC4IF_A>
[src]
Get enumerated values variant
pub fn is_match_(&self) -> bool
[src]
Checks if the value of the field is MATCH
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc4of(&self) -> CC4OF_R
[src]
Bit 12 - Capture/Compare 4 overcapture flag
pub fn cc3of(&self) -> CC3OF_R
[src]
Bit 11 - Capture/Compare 3 overcapture flag
pub fn cc2of(&self) -> CC2OF_R
[src]
Bit 10 - Capture/compare 2 overcapture flag
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn bif(&self) -> BIF_R
[src]
Bit 7 - Break interrupt flag
pub fn tif(&self) -> TIF_R
[src]
Bit 6 - Trigger interrupt flag
pub fn comif(&self) -> COMIF_R
[src]
Bit 5 - COM interrupt flag
pub fn cc4if(&self) -> CC4IF_R
[src]
Bit 4 - Capture/Compare 4 interrupt flag
pub fn cc3if(&self) -> CC3IF_R
[src]
Bit 3 - Capture/Compare 3 interrupt flag
pub fn cc2if(&self) -> CC2IF_R
[src]
Bit 2 - Capture/Compare 2 interrupt flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u8, OC2M_A>
[src]
pub fn variant(&self) -> OC2M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC2PE_A>
[src]
pub fn variant(&self) -> OC2PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC1PE_A>
[src]
pub fn variant(&self) -> OC1PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn oc2ce(&self) -> OC2CE_R
[src]
Bit 15 - Output Compare 2 clear enable
pub fn oc2m(&self) -> OC2M_R
[src]
Bits 12:14 - Output Compare 2 mode
pub fn oc2pe(&self) -> OC2PE_R
[src]
Bit 11 - Output Compare 2 preload enable
pub fn oc2fe(&self) -> OC2FE_R
[src]
Bit 10 - Output Compare 2 fast enable
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn oc1ce(&self) -> OC1CE_R
[src]
Bit 7 - Output Compare 1 clear enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output Compare 1 fast enable
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, CC2S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC2S_A>
[src]
Get enumerated values variant
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, IC1F_A>
[src]
pub fn variant(&self) -> IC1F_A
[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool
[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool
[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool
[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<u8, CC1S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC1S_A>
[src]
Get enumerated values variant
pub fn is_ti1(&self) -> bool
[src]
Checks if the value of the field is TI1
pub fn is_ti2(&self) -> bool
[src]
Checks if the value of the field is TI2
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic2f(&self) -> IC2F_R
[src]
Bits 15:18 - Input capture 2 filter
pub fn ic2psc(&self) -> IC2PSC_R
[src]
Bits 10:11 - Input capture 2 prescaler
pub fn cc2s(&self) -> CC2S_R
[src]
Bits 8:9 - Capture/Compare 2 selection
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u8, OC4M_A>
[src]
pub fn variant(&self) -> OC4M_A
[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool
[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool
[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool
[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool
[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool
[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool
[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool
[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool
[src]
Checks if the value of the field is PWMMODE2
impl R<bool, OC4PE_A>
[src]
pub fn variant(&self) -> OC4PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<bool, OC3PE_A>
[src]
pub fn variant(&self) -> OC3PE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_output(&self) -> bool
[src]
Checks if the value of the field is OUTPUT
impl R<u32, Reg<u32, _CCMR2_OUTPUT>>
[src]
pub fn oc4ce(&self) -> OC4CE_R
[src]
Bit 15 - Output compare 4 clear enable
pub fn oc4m(&self) -> OC4M_R
[src]
Bits 12:14 - Output compare 4 mode
pub fn oc4pe(&self) -> OC4PE_R
[src]
Bit 11 - Output compare 4 preload enable
pub fn oc4fe(&self) -> OC4FE_R
[src]
Bit 10 - Output compare 4 fast enable
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn oc3ce(&self) -> OC3CE_R
[src]
Bit 7 - Output compare 3 clear enable
pub fn oc3m(&self) -> OC3M_R
[src]
Bits 4:6 - Output compare 3 mode
pub fn oc3pe(&self) -> OC3PE_R
[src]
Bit 3 - Output compare 3 preload enable
pub fn oc3fe(&self) -> OC3FE_R
[src]
Bit 2 - Output compare 3 fast enable
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/Compare 3 selection
impl R<u8, CC4S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC4S_A>
[src]
Get enumerated values variant
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u8, CC3S_A>
[src]
pub fn variant(&self) -> Variant<u8, CC3S_A>
[src]
Get enumerated values variant
pub fn is_ti3(&self) -> bool
[src]
Checks if the value of the field is TI3
pub fn is_ti4(&self) -> bool
[src]
Checks if the value of the field is TI4
pub fn is_trc(&self) -> bool
[src]
Checks if the value of the field is TRC
impl R<u32, Reg<u32, _CCMR2_INPUT>>
[src]
pub fn ic4f(&self) -> IC4F_R
[src]
Bits 15:18 - Input capture 4 filter
pub fn ic4psc(&self) -> IC4PSC_R
[src]
Bits 10:11 - Input capture 4 prescaler
pub fn cc4s(&self) -> CC4S_R
[src]
Bits 8:9 - Capture/Compare 4 selection
pub fn ic3f(&self) -> IC3F_R
[src]
Bits 4:7 - Input capture 3 filter
pub fn ic3psc(&self) -> IC3PSC_R
[src]
Bits 2:3 - Input capture 3 prescaler
pub fn cc3s(&self) -> CC3S_R
[src]
Bits 0:1 - Capture/compare 3 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc4p(&self) -> CC4P_R
[src]
Bit 13 - Capture/Compare 3 output Polarity
pub fn cc4e(&self) -> CC4E_R
[src]
Bit 12 - Capture/Compare 4 output enable
pub fn cc3np(&self) -> CC3NP_R
[src]
Bit 11 - Capture/Compare 3 output Polarity
pub fn cc3ne(&self) -> CC3NE_R
[src]
Bit 10 - Capture/Compare 3 complementary output enable
pub fn cc3p(&self) -> CC3P_R
[src]
Bit 9 - Capture/Compare 3 output Polarity
pub fn cc3e(&self) -> CC3E_R
[src]
Bit 8 - Capture/Compare 3 output enable
pub fn cc2np(&self) -> CC2NP_R
[src]
Bit 7 - Capture/Compare 2 output Polarity
pub fn cc2ne(&self) -> CC2NE_R
[src]
Bit 6 - Capture/Compare 2 complementary output enable
pub fn cc2p(&self) -> CC2P_R
[src]
Bit 5 - Capture/Compare 2 output Polarity
pub fn cc2e(&self) -> CC2E_R
[src]
Bit 4 - Capture/Compare 2 output enable
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1ne(&self) -> CC1NE_R
[src]
Bit 2 - Capture/Compare 1 complementary output enable
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _DCR>>
[src]
pub fn dbl(&self) -> DBL_R
[src]
Bits 8:12 - DMA burst length
pub fn dba(&self) -> DBA_R
[src]
Bits 0:4 - DMA base address
impl R<u32, Reg<u32, _DMAR>>
[src]
impl R<u32, Reg<u32, _RCR>>
[src]
impl R<bool, MOE_A>
[src]
pub fn variant(&self) -> MOE_A
[src]
Get enumerated values variant
pub fn is_disabled_idle(&self) -> bool
[src]
Checks if the value of the field is DISABLEDIDLE
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, OSSR_A>
[src]
pub fn variant(&self) -> OSSR_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<bool, OSSI_A>
[src]
pub fn variant(&self) -> OSSI_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_idle_level(&self) -> bool
[src]
Checks if the value of the field is IDLELEVEL
impl R<u32, Reg<u32, _BDTR>>
[src]
pub fn moe(&self) -> MOE_R
[src]
Bit 15 - Main output enable
pub fn aoe(&self) -> AOE_R
[src]
Bit 14 - Automatic output enable
pub fn bkp(&self) -> BKP_R
[src]
Bit 13 - Break polarity
pub fn bke(&self) -> BKE_R
[src]
Bit 12 - Break enable
pub fn ossr(&self) -> OSSR_R
[src]
Bit 11 - Off-state selection for Run mode
pub fn ossi(&self) -> OSSI_R
[src]
Bit 10 - Off-state selection for Idle mode
pub fn lock(&self) -> LOCK_R
[src]
Bits 8:9 - Lock configuration
pub fn dtg(&self) -> DTG_R
[src]
Bits 0:7 - Dead-time generator setup
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP0R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP1R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP2R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP3R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP4R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP5R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP6R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<u8, STAT_TX_A>
[src]
pub fn variant(&self) -> STAT_TX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u8, EP_TYPE_A>
[src]
pub fn variant(&self) -> EP_TYPE_A
[src]
Get enumerated values variant
pub fn is_bulk(&self) -> bool
[src]
Checks if the value of the field is BULK
pub fn is_control(&self) -> bool
[src]
Checks if the value of the field is CONTROL
pub fn is_iso(&self) -> bool
[src]
Checks if the value of the field is ISO
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, STAT_RX_A>
[src]
pub fn variant(&self) -> STAT_RX_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
pub fn is_nak(&self) -> bool
[src]
Checks if the value of the field is NAK
pub fn is_valid(&self) -> bool
[src]
Checks if the value of the field is VALID
impl R<u32, Reg<u32, _EP7R>>
[src]
pub fn ea(&self) -> EA_R
[src]
Bits 0:3 - Endpoint address
pub fn stat_tx(&self) -> STAT_TX_R
[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn dtog_tx(&self) -> DTOG_TX_R
[src]
Bit 6 - Data Toggle, for transmission transfers
pub fn ctr_tx(&self) -> CTR_TX_R
[src]
Bit 7 - Correct Transfer for transmission
pub fn ep_kind(&self) -> EP_KIND_R
[src]
Bit 8 - Endpoint kind
pub fn ep_type(&self) -> EP_TYPE_R
[src]
Bits 9:10 - Endpoint type
pub fn setup(&self) -> SETUP_R
[src]
Bit 11 - Setup transaction completed
pub fn stat_rx(&self) -> STAT_RX_R
[src]
Bits 12:13 - Status bits, for reception transfers
pub fn dtog_rx(&self) -> DTOG_RX_R
[src]
Bit 14 - Data Toggle, for reception transfers
pub fn ctr_rx(&self) -> CTR_RX_R
[src]
Bit 15 - Correct transfer for reception
impl R<bool, FRES_A>
[src]
pub fn variant(&self) -> FRES_A
[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool
[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, PDWN_A>
[src]
pub fn variant(&self) -> PDWN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, LPMODE_A>
[src]
pub fn variant(&self) -> LPMODE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, FSUSP_A>
[src]
pub fn variant(&self) -> FSUSP_A
[src]
Get enumerated values variant
pub fn is_no_effect(&self) -> bool
[src]
Checks if the value of the field is NOEFFECT
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, RESUME_A>
[src]
pub fn variant(&self) -> Variant<bool, RESUME_A>
[src]
Get enumerated values variant
pub fn is_requested(&self) -> bool
[src]
Checks if the value of the field is REQUESTED
impl R<bool, ESOFM_A>
[src]
pub fn variant(&self) -> ESOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SOFM_A>
[src]
pub fn variant(&self) -> SOFM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RESETM_A>
[src]
pub fn variant(&self) -> RESETM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SUSPM_A>
[src]
pub fn variant(&self) -> SUSPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, WKUPM_A>
[src]
pub fn variant(&self) -> WKUPM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRM_A>
[src]
pub fn variant(&self) -> ERRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, PMAOVRM_A>
[src]
pub fn variant(&self) -> PMAOVRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, CTRM_A>
[src]
pub fn variant(&self) -> CTRM_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CNTR>>
[src]
pub fn fres(&self) -> FRES_R
[src]
Bit 0 - Force USB Reset
pub fn pdwn(&self) -> PDWN_R
[src]
Bit 1 - Power down
pub fn lpmode(&self) -> LPMODE_R
[src]
Bit 2 - Low-power mode
pub fn fsusp(&self) -> FSUSP_R
[src]
Bit 3 - Force suspend
pub fn resume(&self) -> RESUME_R
[src]
Bit 4 - Resume request
pub fn esofm(&self) -> ESOFM_R
[src]
Bit 8 - Expected start of frame interrupt mask
pub fn sofm(&self) -> SOFM_R
[src]
Bit 9 - Start of frame interrupt mask
pub fn resetm(&self) -> RESETM_R
[src]
Bit 10 - USB reset interrupt mask
pub fn suspm(&self) -> SUSPM_R
[src]
Bit 11 - Suspend mode interrupt mask
pub fn wkupm(&self) -> WKUPM_R
[src]
Bit 12 - Wakeup interrupt mask
pub fn errm(&self) -> ERRM_R
[src]
Bit 13 - Error interrupt mask
pub fn pmaovrm(&self) -> PMAOVRM_R
[src]
Bit 14 - Packet memory area over / underrun interrupt mask
pub fn ctrm(&self) -> CTRM_R
[src]
Bit 15 - Correct transfer interrupt mask
impl R<bool, DIR_A>
[src]
pub fn variant(&self) -> DIR_A
[src]
Get enumerated values variant
pub fn is_to(&self) -> bool
[src]
Checks if the value of the field is TO
pub fn is_from(&self) -> bool
[src]
Checks if the value of the field is FROM
impl R<bool, ESOF_A>
[src]
pub fn variant(&self) -> Variant<bool, ESOF_A>
[src]
Get enumerated values variant
pub fn is_expected_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is EXPECTEDSTARTOFFRAME
impl R<bool, SOF_A>
[src]
pub fn variant(&self) -> Variant<bool, SOF_A>
[src]
Get enumerated values variant
pub fn is_start_of_frame(&self) -> bool
[src]
Checks if the value of the field is STARTOFFRAME
impl R<bool, RESET_A>
[src]
pub fn variant(&self) -> Variant<bool, RESET_A>
[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<bool, SUSP_A>
[src]
pub fn variant(&self) -> Variant<bool, SUSP_A>
[src]
Get enumerated values variant
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
impl R<bool, WKUP_A>
[src]
pub fn variant(&self) -> Variant<bool, WKUP_A>
[src]
Get enumerated values variant
pub fn is_wakeup(&self) -> bool
[src]
Checks if the value of the field is WAKEUP
impl R<bool, ERR_A>
[src]
pub fn variant(&self) -> Variant<bool, ERR_A>
[src]
Get enumerated values variant
pub fn is_error(&self) -> bool
[src]
Checks if the value of the field is ERROR
impl R<bool, PMAOVR_A>
[src]
pub fn variant(&self) -> Variant<bool, PMAOVR_A>
[src]
Get enumerated values variant
pub fn is_overrun(&self) -> bool
[src]
Checks if the value of the field is OVERRUN
impl R<bool, CTR_A>
[src]
pub fn variant(&self) -> Variant<bool, CTR_A>
[src]
Get enumerated values variant
pub fn is_completed(&self) -> bool
[src]
Checks if the value of the field is COMPLETED
impl R<u32, Reg<u32, _ISTR>>
[src]
pub fn ep_id(&self) -> EP_ID_R
[src]
Bits 0:3 - Endpoint Identifier
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Direction of transaction
pub fn esof(&self) -> ESOF_R
[src]
Bit 8 - Expected start frame
pub fn sof(&self) -> SOF_R
[src]
Bit 9 - start of frame
pub fn reset(&self) -> RESET_R
[src]
Bit 10 - reset request
pub fn susp(&self) -> SUSP_R
[src]
Bit 11 - Suspend mode request
pub fn wkup(&self) -> WKUP_R
[src]
Bit 12 - Wakeup
pub fn err(&self) -> ERR_R
[src]
Bit 13 - Error
pub fn pmaovr(&self) -> PMAOVR_R
[src]
Bit 14 - Packet memory area over / underrun
pub fn ctr(&self) -> CTR_R
[src]
Bit 15 - Correct transfer
impl R<bool, LCK_A>
[src]
pub fn variant(&self) -> Variant<bool, LCK_A>
[src]
Get enumerated values variant
pub fn is_locked(&self) -> bool
[src]
Checks if the value of the field is LOCKED
impl R<bool, RXDM_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDM_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<bool, RXDP_A>
[src]
pub fn variant(&self) -> Variant<bool, RXDP_A>
[src]
Get enumerated values variant
pub fn is_received(&self) -> bool
[src]
Checks if the value of the field is RECEIVED
impl R<u32, Reg<u32, _FNR>>
[src]
pub fn fn_(&self) -> FN_R
[src]
Bits 0:10 - Frame number
pub fn lsof(&self) -> LSOF_R
[src]
Bits 11:12 - Lost SOF
pub fn lck(&self) -> LCK_R
[src]
Bit 13 - Locked
pub fn rxdm(&self) -> RXDM_R
[src]
Bit 14 - Receive data - line status
pub fn rxdp(&self) -> RXDP_R
[src]
Bit 15 - Receive data + line status
impl R<bool, EF_A>
[src]
pub fn variant(&self) -> EF_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DADDR>>
[src]
pub fn add(&self) -> ADD_R
[src]
Bits 0:6 - Device address
pub fn ef(&self) -> EF_R
[src]
Bit 7 - Enable function
impl R<u32, Reg<u32, _BTABLE>>
[src]
impl R<u8, CKD_A>
[src]
pub fn variant(&self) -> Variant<u8, CKD_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
impl R<bool, ARPE_A>
[src]
pub fn variant(&self) -> ARPE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, URS_A>
[src]
pub fn variant(&self) -> URS_A
[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool
[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool
[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UDIS_A>
[src]
pub fn variant(&self) -> UDIS_A
[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>
[src]
pub fn variant(&self) -> CEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn ckd(&self) -> CKD_R
[src]
Bits 8:9 - Clock division
pub fn arpe(&self) -> ARPE_R
[src]
Bit 7 - Auto-reload preload enable
pub fn urs(&self) -> URS_R
[src]
Bit 2 - Update request source
pub fn udis(&self) -> UDIS_R
[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R
[src]
Bit 0 - Counter enable
impl R<bool, UIE_A>
[src]
pub fn variant(&self) -> UIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DIER>>
[src]
pub fn cc1ie(&self) -> CC1IE_R
[src]
Bit 1 - Capture/Compare 1 interrupt enable
pub fn uie(&self) -> UIE_R
[src]
Bit 0 - Update interrupt enable
impl R<bool, UIF_A>
[src]
pub fn variant(&self) -> UIF_A
[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool
[src]
Checks if the value of the field is UPDATEPENDING
impl R<u32, Reg<u32, _SR>>
[src]
pub fn cc1of(&self) -> CC1OF_R
[src]
Bit 9 - Capture/Compare 1 overcapture flag
pub fn cc1if(&self) -> CC1IF_R
[src]
Bit 1 - Capture/compare 1 interrupt flag
pub fn uif(&self) -> UIF_R
[src]
Bit 0 - Update interrupt flag
impl R<u32, Reg<u32, _CCMR1_OUTPUT>>
[src]
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
pub fn oc1fe(&self) -> OC1FE_R
[src]
Bit 2 - Output compare 1 fast enable
pub fn oc1pe(&self) -> OC1PE_R
[src]
Bit 3 - Output Compare 1 preload enable
pub fn oc1m(&self) -> OC1M_R
[src]
Bits 4:6 - Output Compare 1 mode
impl R<u32, Reg<u32, _CCMR1_INPUT>>
[src]
pub fn ic1f(&self) -> IC1F_R
[src]
Bits 4:7 - Input capture 1 filter
pub fn ic1psc(&self) -> IC1PSC_R
[src]
Bits 2:3 - Input capture 1 prescaler
pub fn cc1s(&self) -> CC1S_R
[src]
Bits 0:1 - Capture/Compare 1 selection
impl R<u32, Reg<u32, _CCER>>
[src]
pub fn cc1np(&self) -> CC1NP_R
[src]
Bit 3 - Capture/Compare 1 output Polarity
pub fn cc1p(&self) -> CC1P_R
[src]
Bit 1 - Capture/Compare 1 output Polarity
pub fn cc1e(&self) -> CC1E_R
[src]
Bit 0 - Capture/Compare 1 output enable
impl R<u32, Reg<u32, _CNT>>
[src]
impl R<u32, Reg<u32, _PSC>>
[src]
impl R<u32, Reg<u32, _ARR>>
[src]
impl R<u32, Reg<u32, _CCR>>
[src]
impl R<u32, Reg<u32, _ACTRL>>
[src]
pub fn disfold(&self) -> DISFOLD_R
[src]
Bit 2 - DISFOLD
pub fn fpexcodis(&self) -> FPEXCODIS_R
[src]
Bit 10 - FPEXCODIS
pub fn disramode(&self) -> DISRAMODE_R
[src]
Bit 11 - DISRAMODE
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R
[src]
Bit 12 - DISITMATBFLUSH
impl R<u32, Reg<u32, _STIR>>
[src]
impl R<u32, Reg<u32, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 0 - Counter enable
pub fn tickint(&self) -> TICKINT_R
[src]
Bit 1 - SysTick exception request enable
pub fn clksource(&self) -> CLKSOURCE_R
[src]
Bit 2 - Clock source selection
pub fn countflag(&self) -> COUNTFLAG_R
[src]
Bit 16 - COUNTFLAG
impl R<u32, Reg<u32, _LOAD_>>
[src]
impl R<u32, Reg<u32, _VAL>>
[src]
impl R<u32, Reg<u32, _CALIB>>
[src]
impl R<bool, STRT_A>
[src]
pub fn variant(&self) -> STRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JSTRT_A>
[src]
pub fn variant(&self) -> JSTRT_A
[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
impl R<bool, JEOC_A>
[src]
pub fn variant(&self) -> JEOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>
[src]
pub fn variant(&self) -> EOC_A
[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
impl R<bool, AWD_A>
[src]
pub fn variant(&self) -> AWD_A
[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool
[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool
[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _SR>>
[src]
pub fn strt(&self) -> STRT_R
[src]
Bit 4 - Regular channel start flag
pub fn jstrt(&self) -> JSTRT_R
[src]
Bit 3 - Injected channel start flag
pub fn jeoc(&self) -> JEOC_R
[src]
Bit 2 - Injected channel end of conversion
pub fn eoc(&self) -> EOC_R
[src]
Bit 1 - Regular channel end of conversion
pub fn awd(&self) -> AWD_R
[src]
Bit 0 - Analog watchdog flag
impl R<bool, AWDEN_A>
[src]
pub fn variant(&self) -> AWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAWDEN_A>
[src]
pub fn variant(&self) -> JAWDEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JDISCEN_A>
[src]
pub fn variant(&self) -> JDISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, DISCEN_A>
[src]
pub fn variant(&self) -> DISCEN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JAUTO_A>
[src]
pub fn variant(&self) -> JAUTO_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDSGL_A>
[src]
pub fn variant(&self) -> AWDSGL_A
[src]
Get enumerated values variant
pub fn is_all(&self) -> bool
[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
impl R<bool, SCAN_A>
[src]
pub fn variant(&self) -> SCAN_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, JEOCIE_A>
[src]
pub fn variant(&self) -> JEOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, AWDIE_A>
[src]
pub fn variant(&self) -> AWDIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>
[src]
pub fn variant(&self) -> EOCIE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR1>>
[src]
pub fn awden(&self) -> AWDEN_R
[src]
Bit 23 - Analog watchdog enable on regular channels
pub fn jawden(&self) -> JAWDEN_R
[src]
Bit 22 - Analog watchdog enable on injected channels
pub fn discnum(&self) -> DISCNUM_R
[src]
Bits 13:15 - Discontinuous mode channel count
pub fn jdiscen(&self) -> JDISCEN_R
[src]
Bit 12 - Discontinuous mode on injected channels
pub fn discen(&self) -> DISCEN_R
[src]
Bit 11 - Discontinuous mode on regular channels
pub fn jauto(&self) -> JAUTO_R
[src]
Bit 10 - Automatic injected group conversion
pub fn awdsgl(&self) -> AWDSGL_R
[src]
Bit 9 - Enable the watchdog on a single channel in scan mode
pub fn scan(&self) -> SCAN_R
[src]
Bit 8 - Scan mode
pub fn jeocie(&self) -> JEOCIE_R
[src]
Bit 7 - Interrupt enable for injected channels
pub fn awdie(&self) -> AWDIE_R
[src]
Bit 6 - Analog watchdog interrupt enable
pub fn eocie(&self) -> EOCIE_R
[src]
Bit 5 - Interrupt enable for EOC
pub fn awdch(&self) -> AWDCH_R
[src]
Bits 0:4 - Analog watchdog channel select bits
impl R<bool, TSVREFE_A>
[src]
pub fn variant(&self) -> TSVREFE_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, SWSTART_A>
[src]
pub fn variant(&self) -> SWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, JSWSTART_A>
[src]
pub fn variant(&self) -> JSWSTART_A
[src]
Get enumerated values variant
pub fn is_started(&self) -> bool
[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool
[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, EXTTRIG_A>
[src]
pub fn variant(&self) -> EXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, EXTSEL_A>
[src]
pub fn variant(&self) -> EXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim3cc1(&self) -> bool
[src]
Checks if the value of the field is TIM3CC1
pub fn is_tim2cc3(&self) -> bool
[src]
Checks if the value of the field is TIM2CC3
pub fn is_tim1cc3(&self) -> bool
[src]
Checks if the value of the field is TIM1CC3
pub fn is_tim8cc1(&self) -> bool
[src]
Checks if the value of the field is TIM8CC1
pub fn is_tim8trgo(&self) -> bool
[src]
Checks if the value of the field is TIM8TRGO
pub fn is_tim5cc1(&self) -> bool
[src]
Checks if the value of the field is TIM5CC1
pub fn is_tim5cc3(&self) -> bool
[src]
Checks if the value of the field is TIM5CC3
pub fn is_swstart(&self) -> bool
[src]
Checks if the value of the field is SWSTART
impl R<bool, JEXTTRIG_A>
[src]
pub fn variant(&self) -> JEXTTRIG_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u8, JEXTSEL_A>
[src]
pub fn variant(&self) -> JEXTSEL_A
[src]
Get enumerated values variant
pub fn is_tim1trgo(&self) -> bool
[src]
Checks if the value of the field is TIM1TRGO
pub fn is_tim1cc4(&self) -> bool
[src]
Checks if the value of the field is TIM1CC4
pub fn is_tim4cc3(&self) -> bool
[src]
Checks if the value of the field is TIM4CC3
pub fn is_tim8cc2(&self) -> bool
[src]
Checks if the value of the field is TIM8CC2
pub fn is_tim8cc4(&self) -> bool
[src]
Checks if the value of the field is TIM8CC4
pub fn is_tim5trgo(&self) -> bool
[src]
Checks if the value of the field is TIM5TRGO
pub fn is_tim5cc4(&self) -> bool
[src]
Checks if the value of the field is TIM5CC4
pub fn is_jswstart(&self) -> bool
[src]
Checks if the value of the field is JSWSTART
impl R<bool, ALIGN_A>
[src]
pub fn variant(&self) -> ALIGN_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCAL_A>
[src]
pub fn variant(&self) -> RSTCAL_A
[src]
Get enumerated values variant
pub fn is_initialized(&self) -> bool
[src]
Checks if the value of the field is INITIALIZED
pub fn is_not_initialized(&self) -> bool
[src]
Checks if the value of the field is NOTINITIALIZED
impl R<bool, CAL_A>
[src]
pub fn variant(&self) -> CAL_A
[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool
[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool
[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CONT_A>
[src]
pub fn variant(&self) -> CONT_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool
[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADON_A>
[src]
pub fn variant(&self) -> ADON_A
[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool
[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CR2>>
[src]
pub fn tsvrefe(&self) -> TSVREFE_R
[src]
Bit 23 - Temperature sensor and VREFINT enable
pub fn swstart(&self) -> SWSTART_R
[src]
Bit 22 - Start conversion of regular channels
pub fn jswstart(&self) -> JSWSTART_R
[src]
Bit 21 - Start conversion of injected channels
pub fn exttrig(&self) -> EXTTRIG_R
[src]
Bit 20 - External trigger conversion mode for regular channels
pub fn extsel(&self) -> EXTSEL_R
[src]
Bits 17:19 - External event select for regular group
pub fn jexttrig(&self) -> JEXTTRIG_R
[src]
Bit 15 - External trigger conversion mode for injected channels
pub fn jextsel(&self) -> JEXTSEL_R
[src]
Bits 12:14 - External event select for injected group
pub fn align(&self) -> ALIGN_R
[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R
[src]
Bit 8 - Direct memory access mode
pub fn rstcal(&self) -> RSTCAL_R
[src]
Bit 3 - Reset calibration
pub fn cal(&self) -> CAL_R
[src]
Bit 2 - A/D calibration
pub fn cont(&self) -> CONT_R
[src]
Bit 1 - Continuous conversion
pub fn adon(&self) -> ADON_R
[src]
Bit 0 - A/D converter ON / OFF
impl R<u8, SMP10_A>
[src]
pub fn variant(&self) -> SMP10_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR1>>
[src]
pub fn smp10(&self) -> SMP10_R
[src]
Bits 0:2 - Channel 10 sampling time selection
pub fn smp11(&self) -> SMP11_R
[src]
Bits 3:5 - Channel 11 sampling time selection
pub fn smp12(&self) -> SMP12_R
[src]
Bits 6:8 - Channel 12 sampling time selection
pub fn smp13(&self) -> SMP13_R
[src]
Bits 9:11 - Channel 13 sampling time selection
pub fn smp14(&self) -> SMP14_R
[src]
Bits 12:14 - Channel 14 sampling time selection
pub fn smp15(&self) -> SMP15_R
[src]
Bits 15:17 - Channel 15 sampling time selection
pub fn smp16(&self) -> SMP16_R
[src]
Bits 18:20 - Channel 16 sampling time selection
pub fn smp17(&self) -> SMP17_R
[src]
Bits 21:23 - Channel 17 sampling time selection
impl R<u8, SMP0_A>
[src]
pub fn variant(&self) -> SMP0_A
[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool
[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool
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Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SMPR2>>
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pub fn smp0(&self) -> SMP0_R
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Bits 0:2 - Channel 0 sampling time selection
pub fn smp1(&self) -> SMP1_R
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Bits 3:5 - Channel 1 sampling time selection
pub fn smp2(&self) -> SMP2_R
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Bits 6:8 - Channel 2 sampling time selection
pub fn smp3(&self) -> SMP3_R
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Bits 9:11 - Channel 3 sampling time selection
pub fn smp4(&self) -> SMP4_R
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Bits 12:14 - Channel 4 sampling time selection
pub fn smp5(&self) -> SMP5_R
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Bits 15:17 - Channel 5 sampling time selection
pub fn smp6(&self) -> SMP6_R
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Bits 18:20 - Channel 6 sampling time selection
pub fn smp7(&self) -> SMP7_R
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Bits 21:23 - Channel 7 sampling time selection
pub fn smp8(&self) -> SMP8_R
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Bits 24:26 - Channel 8 sampling time selection
pub fn smp9(&self) -> SMP9_R
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Bits 27:29 - Channel 9 sampling time selection
impl R<u32, Reg<u32, _JOFR1>>
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pub fn joffset1(&self) -> JOFFSET1_R
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Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR2>>
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pub fn joffset2(&self) -> JOFFSET2_R
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Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR3>>
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pub fn joffset3(&self) -> JOFFSET3_R
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Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _JOFR4>>
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pub fn joffset4(&self) -> JOFFSET4_R
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Bits 0:11 - Data offset for injected channel x
impl R<u32, Reg<u32, _HTR>>
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impl R<u32, Reg<u32, _LTR>>
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impl R<u32, Reg<u32, _SQR1>>
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pub fn l(&self) -> L_R
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Bits 20:23 - Regular channel sequence length
pub fn sq16(&self) -> SQ16_R
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Bits 15:19 - 16th conversion in regular sequence
pub fn sq15(&self) -> SQ15_R
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Bits 10:14 - 15th conversion in regular sequence
pub fn sq14(&self) -> SQ14_R
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Bits 5:9 - 14th conversion in regular sequence
pub fn sq13(&self) -> SQ13_R
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Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _SQR2>>
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pub fn sq12(&self) -> SQ12_R
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Bits 25:29 - 12th conversion in regular sequence
pub fn sq11(&self) -> SQ11_R
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Bits 20:24 - 11th conversion in regular sequence
pub fn sq10(&self) -> SQ10_R
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Bits 15:19 - 10th conversion in regular sequence
pub fn sq9(&self) -> SQ9_R
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Bits 10:14 - 9th conversion in regular sequence
pub fn sq8(&self) -> SQ8_R
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Bits 5:9 - 8th conversion in regular sequence
pub fn sq7(&self) -> SQ7_R
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Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _SQR3>>
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pub fn sq6(&self) -> SQ6_R
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Bits 25:29 - 6th conversion in regular sequence
pub fn sq5(&self) -> SQ5_R
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Bits 20:24 - 5th conversion in regular sequence
pub fn sq4(&self) -> SQ4_R
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Bits 15:19 - 4th conversion in regular sequence
pub fn sq3(&self) -> SQ3_R
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Bits 10:14 - 3rd conversion in regular sequence
pub fn sq2(&self) -> SQ2_R
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Bits 5:9 - 2nd conversion in regular sequence
pub fn sq1(&self) -> SQ1_R
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Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _JSQR>>
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pub fn jl(&self) -> JL_R
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Bits 20:21 - Injected sequence length
pub fn jsq4(&self) -> JSQ4_R
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Bits 15:19 - 4th conversion in injected sequence
pub fn jsq3(&self) -> JSQ3_R
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Bits 10:14 - 3rd conversion in injected sequence
pub fn jsq2(&self) -> JSQ2_R
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Bits 5:9 - 2nd conversion in injected sequence
pub fn jsq1(&self) -> JSQ1_R
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Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _JDR1>>
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impl R<u32, Reg<u32, _JDR2>>
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impl R<u32, Reg<u32, _JDR3>>
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impl R<u32, Reg<u32, _JDR4>>
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impl R<u32, Reg<u32, _DR>>
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Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
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T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
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T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
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T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,