[][src]Type Definition stm32f1::stm32f101::dbgmcu::cr::W

type W = W<u32, CR>;

Writer for register CR

Methods

impl W[src]

pub fn dbg_sleep(&mut self) -> DBG_SLEEP_W[src]

Bit 0 - DBG_SLEEP

pub fn dbg_stop(&mut self) -> DBG_STOP_W[src]

Bit 1 - DBG_STOP

pub fn dbg_standby(&mut self) -> DBG_STANDBY_W[src]

Bit 2 - DBG_STANDBY

pub fn trace_ioen(&mut self) -> TRACE_IOEN_W[src]

Bit 5 - TRACE_IOEN

pub fn trace_mode(&mut self) -> TRACE_MODE_W[src]

Bits 6:7 - TRACE_MODE

pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W[src]

Bit 8 - DBG_IWDG_STOP

pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W[src]

Bit 9 - DBG_WWDG_STOP

pub fn dbg_tim1_stop(&mut self) -> DBG_TIM1_STOP_W[src]

Bit 10 - DBG_TIM1_STOP

pub fn dbg_tim2_stop(&mut self) -> DBG_TIM2_STOP_W[src]

Bit 11 - DBG_TIM2_STOP

pub fn dbg_tim3_stop(&mut self) -> DBG_TIM3_STOP_W[src]

Bit 12 - DBG_TIM3_STOP

pub fn dbg_tim4_stop(&mut self) -> DBG_TIM4_STOP_W[src]

Bit 13 - DBG_TIM4_STOP

pub fn dbg_i2c1_smbus_timeout(&mut self) -> DBG_I2C1_SMBUS_TIMEOUT_W[src]

Bit 15 - DBG_I2C1_SMBUS_TIMEOUT

pub fn dbg_i2c2_smbus_timeout(&mut self) -> DBG_I2C2_SMBUS_TIMEOUT_W[src]

Bit 16 - DBG_I2C2_SMBUS_TIMEOUT

pub fn dbg_tim5_stop(&mut self) -> DBG_TIM5_STOP_W[src]

Bit 18 - DBG_TIM5_STOP

pub fn dbg_tim6_stop(&mut self) -> DBG_TIM6_STOP_W[src]

Bit 19 - DBG_TIM6_STOP

pub fn dbg_tim7_stop(&mut self) -> DBG_TIM7_STOP_W[src]

Bit 20 - DBG_TIM7_STOP

pub fn dbg_tim15_stop(&mut self) -> DBG_TIM15_STOP_W[src]

Bit 22 - TIM15 counter stopped when core is halted

pub fn dbg_tim16_stop(&mut self) -> DBG_TIM16_STOP_W[src]

Bit 23 - TIM16 counter stopped when core is halted

pub fn dbg_tim17_stop(&mut self) -> DBG_TIM17_STOP_W[src]

Bit 24 - TIM17 counter stopped when core is halted

pub fn dbg_tim12_stop(&mut self) -> DBG_TIM12_STOP_W[src]

Bit 25 - TIM12 counter stopped when core is halted

pub fn dbg_tim13_stop(&mut self) -> DBG_TIM13_STOP_W[src]

Bit 26 - TIM13 counter stopped when core is halted

pub fn dbg_tim14_stop(&mut self) -> DBG_TIM14_STOP_W[src]

Bit 27 - TIM14 counter stopped when core is halted