Module dac 

Digital to analog converter

Modules

cr

Control register (DAC_CR)

dhr8r1

DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1)

dhr8r2

DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2)

dhr8rd

DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits 31:16 Reserved

dhr12l1

DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)

dhr12l2

DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2)

dhr12ld

DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 Reserved

dhr12r1

DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1)

dhr12r2

DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2)

dhr12rd

Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 Reserved

dor1

DAC channel1 data output register (DAC_DOR1)

dor2

DAC channel2 data output register (DAC_DOR2)

swtrigr

DAC software trigger register (DAC_SWTRIGR)

Structs

RegisterBlock

Register block

Type Aliases

CR

CR (rw) register accessor: Control register (DAC_CR)

DHR8R1

DHR8R1 (rw) register accessor: DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1)

DHR8R2

DHR8R2 (rw) register accessor: DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2)

DHR8RD

DHR8RD (rw) register accessor: DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits 31:16 Reserved

DHR12L1

DHR12L1 (rw) register accessor: DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)

DHR12L2

DHR12L2 (rw) register accessor: DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2)

DHR12LD

DHR12LD (rw) register accessor: DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0 Reserved

DHR12R1

DHR12R1 (rw) register accessor: DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1)

DHR12R2

DHR12R2 (rw) register accessor: DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2)

DHR12RD

DHR12RD (rw) register accessor: Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12 Reserved

DOR1

DOR1 (r) register accessor: DAC channel1 data output register (DAC_DOR1)

DOR2

DOR2 (r) register accessor: DAC channel2 data output register (DAC_DOR2)

SWTRIGR

SWTRIGR (w) register accessor: DAC software trigger register (DAC_SWTRIGR)