pub enum PLLSRC {
HsiDiv2 = 0,
HseDivPrediv = 1,
}Expand description
PLL entry clock source
Value on reset: 0
Variants§
HsiDiv2 = 0
0: HSI divided by 2 selected as PLL input clock
HseDivPrediv = 1
1: HSE divided by PREDIV selected as PLL input clock
Trait Implementations§
impl Copy for PLLSRC
impl Eq for PLLSRC
impl StructuralPartialEq for PLLSRC
Auto Trait Implementations§
impl Freeze for PLLSRC
impl RefUnwindSafe for PLLSRC
impl Send for PLLSRC
impl Sync for PLLSRC
impl Unpin for PLLSRC
impl UnwindSafe for PLLSRC
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more