Type Alias UART5 

pub type UART5 = Periph<RegisterBlock, 1073762304>;

Universal asynchronous receiver transmitter

See peripheral structure

Aliased Type

pub struct UART5 { /* private fields */ }

Trait Implementations

impl Enable for UART5

fn enable(rcc: &mut RCC)

Enables peripheral

fn disable(rcc: &mut RCC)

Disables peripheral

fn is_enabled() -> bool

Check if peripheral enabled

fn is_disabled() -> bool

Check if peripheral disabled

unsafe fn enable_unchecked()

Safety

unsafe fn disable_unchecked()

Safety

impl RccBus for UART5

type Bus = APB1

Bus type;

impl Reset for UART5

fn reset(rcc: &mut RCC)

Resets peripheral

unsafe fn reset_unchecked()

Safety

impl SerialAsync for UART5

type Rx<PULL> = Rx<PULL>

Receive

type Tx<Otype> = Tx<Otype>

Transmit

impl UartInit<Periph<RegisterBlock, 1073762304>> for UART5

fn constrain(self) -> Uart<UART5>

impl UartPeriph for UART5

fn clear_err_flag(&self)

In order to clear that error flag, you have to do a read from the sr register followed by a read from the dr register.

fn set_dma_tx(&mut self, enable: bool)

fn set_dma_rx(&mut self, enable: bool)

fn is_tx_empty(&self) -> bool

fn is_tx_complete(&self) -> bool

fn write(&mut self, word: u16) -> Result<(), Error>

fn read(&mut self) -> Result<u16, Error>

fn get_tx_data_reg_addr(&self) -> u32

fn get_rx_data_reg_addr(&self) -> u32

fn set_interrupt(&mut self, event: UartEvent, enable: bool)

fn is_interrupt_enable(&mut self, event: UartEvent) -> bool

fn is_interrupted(&mut self, event: UartEvent) -> bool

fn is_rx_not_empty(&self) -> bool

impl UartPeriphExt for UART5

fn config(&mut self, config: Config, mcu: &mut Mcu)

fn enable_comm(&mut self, tx: bool, rx: bool)

fn set_stop_bits(&mut self, bits: StopBits)