[−][src]Type Definition stm32f0::stm32f0x2::rcc::cfgr::R
type R = R<u32, CFGR>;
Reader of register CFGR
Methods
impl R
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pub fn sw(&self) -> SW_R
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Bits 0:1 - System clock Switch
pub fn sws(&self) -> SWS_R
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Bits 2:3 - System Clock Switch Status
pub fn hpre(&self) -> HPRE_R
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Bits 4:7 - AHB prescaler
pub fn ppre(&self) -> PPRE_R
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Bits 8:10 - APB Low speed prescaler (APB1)
pub fn adcpre(&self) -> ADCPRE_R
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Bit 14 - APCPRE is deprecated. See ADC field in CFGR2 register.
pub fn pllsrc(&self) -> PLLSRC_R
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Bits 15:16 - PLL input clock source
pub fn pllxtpre(&self) -> PLLXTPRE_R
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Bit 17 - HSE divider for PLL entry. Same bit as PREDIC[0] from CFGR2 register. Refer to it for its meaning
pub fn pllmul(&self) -> PLLMUL_R
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Bits 18:21 - PLL Multiplication Factor
pub fn mco(&self) -> MCO_R
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Bits 24:26 - Microcontroller clock output
pub fn mcopre(&self) -> MCOPRE_R
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Bits 28:30 - Microcontroller Clock Output Prescaler
pub fn pllnodiv(&self) -> PLLNODIV_R
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Bit 31 - PLL clock not divided for MCO