Module stm32f0::stm32f0x2::rcc::cfgr

Clock configuration register (RCC_CFGR)

Structs

ADCPRE_W	Write proxy for field ADCPRE
HPRE_W	Write proxy for field HPRE
MCOPRE_W	Write proxy for field MCOPRE
MCO_W	Write proxy for field MCO
PLLMUL_W	Write proxy for field PLLMUL
PLLNODIV_W	Write proxy for field PLLNODIV
PLLSRC_W	Write proxy for field PLLSRC
PLLXTPRE_W	Write proxy for field PLLXTPRE
PPRE_W	Write proxy for field PPRE
SW_W	Write proxy for field SW

Enums

HPRE_A	AHB prescaler
MCOPRE_A	Microcontroller Clock Output Prescaler
MCO_A	Microcontroller clock output
PLLMUL_A	PLL Multiplication Factor
PLLNODIV_A	PLL clock not divided for MCO
PLLSRC_A	PLL input clock source
PLLXTPRE_A	HSE divider for PLL entry. Same bit as PREDIC[0] from CFGR2 register. Refer to it for its meaning
PPRE_A	APB Low speed prescaler (APB1)
SWS_A	System Clock Switch Status
SW_A	System clock Switch

Type Definitions

ADCPRE_R	Reader of field ADCPRE
HPRE_R	Reader of field HPRE
MCOPRE_R	Reader of field MCOPRE
MCO_R	Reader of field MCO
PLLMUL_R	Reader of field PLLMUL
PLLNODIV_R	Reader of field PLLNODIV
PLLSRC_R	Reader of field PLLSRC
PLLXTPRE_R	Reader of field PLLXTPRE
PPRE_R	Reader of field PPRE
R	Reader of register CFGR
SWS_R	Reader of field SWS
SW_R	Reader of field SW
W	Writer for register CFGR