Module stm32_hal2::adc

Support for the ADC (Analog to Digital Converter) peripheral.

Structs

• Adc
  Represents an Analog to Digital Converter (ADC) peripheral.
• AdcConfig
  Initial configuration data for the ADC peripheral.

Enums

• AdcDevice
• AdcInterrupt
  ADC interrupts. See L44 RM, section 16.5: ADC interrupts. Set in the IER register, and cleared in the ISR register.
• Align
  ADC data register alignment
• ClockMode
  ADC Clock mode (L44 RM, Section 16.4.3) The input clock is the same for the three ADCs and can be selected between two different clock sources (see Figure 40: ADC clock scheme):
• InputType
  Select single-ended, or differential inputs. Sets bits in the ADC[x]_DIFSEL register.
• OperationMode
  ADC operation mode
• Prescaler
  Sets ADC clock prescaler; ADCx_CCR register, PRESC field.
• SampleTime
  ADC sampling time. Sets ADC_SMPRx register, SMPy field.
• Trigger
  Select a trigger. Sets CFGR reg, EXTSEL field. See G4 RM, table 163: ADC1/2 - External triggers for regular channels.
• TriggerEdge
  Select a trigger. Sets CFGR reg, EXTEN field. See G4 RM, table 161: Configuring the trigger polarity for regular external triggers (Also applies for injected)