pub struct R(/* private fields */);
Expand description
Register SDCR
reader
Implementations§
source§impl R
impl R
sourcepub fn nc(&self) -> FieldReaderRaw<u8, u8>
pub fn nc(&self) -> FieldReaderRaw<u8, u8>
Bits 0:1 - Number of column address bits These bits define the number of bits of a column address.
sourcepub fn nr(&self) -> FieldReaderRaw<u8, u8>
pub fn nr(&self) -> FieldReaderRaw<u8, u8>
Bits 2:3 - Number of row address bits These bits define the number of bits of a row address.
sourcepub fn mwid(&self) -> FieldReaderRaw<u8, u8>
pub fn mwid(&self) -> FieldReaderRaw<u8, u8>
Bits 4:5 - Memory data bus width. These bits define the memory device width.
sourcepub fn nb(&self) -> BitReaderRaw<bool>
pub fn nb(&self) -> BitReaderRaw<bool>
Bit 6 - Number of internal banks This bit sets the number of internal banks.
sourcepub fn cas(&self) -> FieldReaderRaw<u8, u8>
pub fn cas(&self) -> FieldReaderRaw<u8, u8>
Bits 7:8 - CAS Latency This bits sets the SDRAM CAS latency in number of memory clock cycles
sourcepub fn wp(&self) -> BitReaderRaw<bool>
pub fn wp(&self) -> BitReaderRaw<bool>
Bit 9 - Write protection This bit enables write mode access to the SDRAM bank.
sourcepub fn sdclk(&self) -> FieldReaderRaw<u8, u8>
pub fn sdclk(&self) -> FieldReaderRaw<u8, u8>
Bits 10:11 - SDRAM clock configuration These bits define the SDRAM clock period for both SDRAM banks and allow disabling the clock before changing the frequency. In this case the SDRAM must be re-initialized. Note: The corresponding bits in the FMC_SDCR2 register is read only.
Methods from Deref<Target = R<SDCR_SPEC>>§
sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.