Struct stm32_hal2::pac::Peripherals
source · pub struct Peripherals {Show 126 fields
pub AC: AC,
pub ADC1: ADC1,
pub ADC3: ADC3,
pub ADC12_COMMON: ADC12_COMMON,
pub ADC3_COMMON: ADC3_COMMON,
pub AXI: AXI,
pub CAN_CCU: CAN_CCU,
pub CEC: CEC,
pub COMP1: COMP1,
pub CRC: CRC,
pub CRS: CRS,
pub CRYP: CRYP,
pub DAC: DAC,
pub DBGMCU: DBGMCU,
pub DCMI: DCMI,
pub DELAY_BLOCK_SDMMC1: DELAY_BLOCK_SDMMC1,
pub DELAY_BLOCK_SDMMC2: DELAY_BLOCK_SDMMC2,
pub DFSDM: DFSDM,
pub DMA1: DMA1,
pub DMA2D: DMA2D,
pub DMAMUX1: DMAMUX1,
pub DMAMUX2: DMAMUX2,
pub DELAY_BLOCK_OCTOSPI1: DELAY_BLOCK_OCTOSPI1,
pub DELAY_BLOCK_OCTOSPI2: DELAY_BLOCK_OCTOSPI2,
pub EXTI: EXTI,
pub ETHERNET_MAC: ETHERNET_MAC,
pub FDCAN1: FDCAN1,
pub FDCAN2: FDCAN2,
pub FMC: FMC,
pub FPU_CPACR: FPU_CPACR,
pub FLASH: FLASH,
pub GPIOA: GPIOA,
pub GPIOB: GPIOB,
pub GPIOC: GPIOC,
pub GPIOD: GPIOD,
pub GPIOE: GPIOE,
pub GPIOF: GPIOF,
pub GPIOG: GPIOG,
pub GPIOH: GPIOH,
pub GPIOJ: GPIOJ,
pub GPIOK: GPIOK,
pub HSEM: HSEM,
pub I2C1: I2C1,
pub I2C2: I2C2,
pub I2C3: I2C3,
pub I2C4: I2C4,
pub IWDG1: IWDG1,
pub LPTIM1: LPTIM1,
pub LPTIM2: LPTIM2,
pub LPTIM3: LPTIM3,
pub LPTIM4: LPTIM4,
pub LPTIM5: LPTIM5,
pub LPUART1: LPUART1,
pub LTDC: LTDC,
pub MDIOS: MDIOS,
pub MDMA: MDMA,
pub NVIC_STIR: NVIC_STIR,
pub OCTOSPI1: OCTOSPI1,
pub OCTOSPI2: OCTOSPI2,
pub OPAMP: OPAMP,
pub OTG1_HS_DEVICE: OTG1_HS_DEVICE,
pub OTG2_HS_DEVICE: OTG2_HS_DEVICE,
pub OTG1_HS_GLOBAL: OTG1_HS_GLOBAL,
pub OTG1_HS_HOST: OTG1_HS_HOST,
pub OTG2_HS_HOST: OTG2_HS_HOST,
pub OTG1_HS_PWRCLK: OTG1_HS_PWRCLK,
pub OTG2_HS_PWRCLK: OTG2_HS_PWRCLK,
pub OCTOSPII_O_MANAGER: OCTOSPII_O_MANAGER,
pub PF: PF,
pub PWR: PWR,
pub RAMECC1: RAMECC1,
pub RAMECC2: RAMECC2,
pub RAMECC3: RAMECC3,
pub RCC: RCC,
pub RNG: RNG,
pub RTC: RTC,
pub SAI1: SAI1,
pub SAI4: SAI4,
pub SCB_ACTRL: SCB_ACTRL,
pub SDMMC1: SDMMC1,
pub SDMMC2: SDMMC2,
pub SPDIFRX: SPDIFRX,
pub SPI1: SPI1,
pub SPI2: SPI2,
pub SPI3: SPI3,
pub SPI4: SPI4,
pub SPI5: SPI5,
pub SPI6: SPI6,
pub STK: STK,
pub SWPMI: SWPMI,
pub SYSCFG: SYSCFG,
pub TIM1: TIM1,
pub TIM2: TIM2,
pub TIM3: TIM3,
pub TIM4: TIM4,
pub TIM5: TIM5,
pub TIM6: TIM6,
pub TIM7: TIM7,
pub TIM8: TIM8,
pub TIM12: TIM12,
pub TIM13: TIM13,
pub TIM14: TIM14,
pub TIM15: TIM15,
pub TIM16: TIM16,
pub TIM17: TIM17,
pub USART1: USART1,
pub USART2: USART2,
pub USART3: USART3,
pub UART4: UART4,
pub UART5: UART5,
pub USART6: USART6,
pub UART7: UART7,
pub UART8: UART8,
pub VREFBUF: VREFBUF,
pub WWDG1: WWDG1,
pub ADC2: ADC2,
pub BDMA: BDMA,
pub UART9: UART9,
pub USART10: USART10,
pub TIM23: TIM23,
pub TIM24: TIM24,
pub CORDIC: CORDIC,
pub FMAC: FMAC,
pub DMA2: DMA2,
pub ETHERNET_DMA: ETHERNET_DMA,
pub ETHERNET_MTL: ETHERNET_MTL,
}Expand description
All the peripherals
Fields§
§AC: ACAC
ADC1: ADC1ADC1
ADC3: ADC3ADC3
ADC12_COMMON: ADC12_COMMONADC12_COMMON
ADC3_COMMON: ADC3_COMMONADC3_COMMON
AXI: AXIAXI
CAN_CCU: CAN_CCUCAN_CCU
CEC: CECCEC
COMP1: COMP1COMP1
CRC: CRCCRC
CRS: CRSCRS
CRYP: CRYPCRYP
DAC: DACDAC
DBGMCU: DBGMCUDBGMCU
DCMI: DCMIDCMI
DELAY_BLOCK_SDMMC1: DELAY_BLOCK_SDMMC1DELAY_BLOCK_SDMMC1
DELAY_BLOCK_SDMMC2: DELAY_BLOCK_SDMMC2DELAY_BLOCK_SDMMC2
DFSDM: DFSDMDFSDM
DMA1: DMA1DMA1
DMA2D: DMA2DDMA2D
DMAMUX1: DMAMUX1DMAMUX1
DMAMUX2: DMAMUX2DMAMUX2
DELAY_BLOCK_OCTOSPI1: DELAY_BLOCK_OCTOSPI1DELAY_BLOCK_OCTOSPI1
DELAY_BLOCK_OCTOSPI2: DELAY_BLOCK_OCTOSPI2DELAY_BLOCK_OCTOSPI2
EXTI: EXTIEXTI
ETHERNET_MAC: ETHERNET_MACETHERNET_MAC
FDCAN1: FDCAN1FDCAN1
FDCAN2: FDCAN2FDCAN2
FMC: FMCFMC
FPU_CPACR: FPU_CPACRFPU_CPACR
FLASH: FLASHFLASH
GPIOA: GPIOAGPIOA
GPIOB: GPIOBGPIOB
GPIOC: GPIOCGPIOC
GPIOD: GPIODGPIOD
GPIOE: GPIOEGPIOE
GPIOF: GPIOFGPIOF
GPIOG: GPIOGGPIOG
GPIOH: GPIOHGPIOH
GPIOJ: GPIOJGPIOJ
GPIOK: GPIOKGPIOK
HSEM: HSEMHSEM
I2C1: I2C1I2C1
I2C2: I2C2I2C2
I2C3: I2C3I2C3
I2C4: I2C4I2C4
IWDG1: IWDG1IWDG1
LPTIM1: LPTIM1LPTIM1
LPTIM2: LPTIM2LPTIM2
LPTIM3: LPTIM3LPTIM3
LPTIM4: LPTIM4LPTIM4
LPTIM5: LPTIM5LPTIM5
LPUART1: LPUART1LPUART1
LTDC: LTDCLTDC
MDIOS: MDIOSMDIOS
MDMA: MDMAMDMA
NVIC_STIR: NVIC_STIRNVIC_STIR
OCTOSPI1: OCTOSPI1OCTOSPI1
OCTOSPI2: OCTOSPI2OCTOSPI2
OPAMP: OPAMPOPAMP
OTG1_HS_DEVICE: OTG1_HS_DEVICEOTG1_HS_DEVICE
OTG2_HS_DEVICE: OTG2_HS_DEVICEOTG2_HS_DEVICE
OTG1_HS_GLOBAL: OTG1_HS_GLOBALOTG1_HS_GLOBAL
OTG1_HS_HOST: OTG1_HS_HOSTOTG1_HS_HOST
OTG2_HS_HOST: OTG2_HS_HOSTOTG2_HS_HOST
OTG1_HS_PWRCLK: OTG1_HS_PWRCLKOTG1_HS_PWRCLK
OTG2_HS_PWRCLK: OTG2_HS_PWRCLKOTG2_HS_PWRCLK
OCTOSPII_O_MANAGER: OCTOSPII_O_MANAGEROCTOSPII_O_MANAGER
PF: PFPF
PWR: PWRPWR
RAMECC1: RAMECC1RAMECC1
RAMECC2: RAMECC2RAMECC2
RAMECC3: RAMECC3RAMECC3
RCC: RCCRCC
RNG: RNGRNG
RTC: RTCRTC
SAI1: SAI1SAI1
SAI4: SAI4SAI4
SCB_ACTRL: SCB_ACTRLSCB_ACTRL
SDMMC1: SDMMC1SDMMC1
SDMMC2: SDMMC2SDMMC2
SPDIFRX: SPDIFRXSPDIFRX
SPI1: SPI1SPI1
SPI2: SPI2SPI2
SPI3: SPI3SPI3
SPI4: SPI4SPI4
SPI5: SPI5SPI5
SPI6: SPI6SPI6
STK: STKSTK
SWPMI: SWPMISWPMI
SYSCFG: SYSCFGSYSCFG
TIM1: TIM1TIM1
TIM2: TIM2TIM2
TIM3: TIM3TIM3
TIM4: TIM4TIM4
TIM5: TIM5TIM5
TIM6: TIM6TIM6
TIM7: TIM7TIM7
TIM8: TIM8TIM8
TIM12: TIM12TIM12
TIM13: TIM13TIM13
TIM14: TIM14TIM14
TIM15: TIM15TIM15
TIM16: TIM16TIM16
TIM17: TIM17TIM17
USART1: USART1USART1
USART2: USART2USART2
USART3: USART3USART3
UART4: UART4UART4
UART5: UART5UART5
USART6: USART6USART6
UART7: UART7UART7
UART8: UART8UART8
VREFBUF: VREFBUFVREFBUF
WWDG1: WWDG1WWDG1
ADC2: ADC2ADC2
BDMA: BDMABDMA
UART9: UART9UART9
USART10: USART10USART10
TIM23: TIM23TIM23
TIM24: TIM24TIM24
CORDIC: CORDICCORDIC
FMAC: FMACFMAC
DMA2: DMA2DMA2
ETHERNET_DMA: ETHERNET_DMAETHERNET_DMA
ETHERNET_MTL: ETHERNET_MTLETHERNET_MTL
Implementations§
source§impl Peripherals
impl Peripherals
sourcepub fn take() -> Option<Peripherals>
pub fn take() -> Option<Peripherals>
Returns all the peripherals once
sourcepub unsafe fn steal() -> Peripherals
pub unsafe fn steal() -> Peripherals
Unchecked version of Peripherals::take