pub struct W(_);Expand description
Register DCTRL writer
Implementations§
source§impl W
impl W
sourcepub fn dten(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 0>
pub fn dten(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 0>
Bit 0 - Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.
sourcepub fn dtdir(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 1>
pub fn dtdir(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 1>
Bit 1 - Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
sourcepub fn dtmode(
&mut self
) -> FieldWriterRaw<'_, u32, DCTRL_SPEC, u8, u8, Unsafe, 2, 2>
pub fn dtmode( &mut self ) -> FieldWriterRaw<'_, u32, DCTRL_SPEC, u8, u8, Unsafe, 2, 2>
Bits 2:3 - Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
sourcepub fn dblocksize(
&mut self
) -> FieldWriterRaw<'_, u32, DCTRL_SPEC, u8, u8, Unsafe, 4, 4>
pub fn dblocksize( &mut self ) -> FieldWriterRaw<'_, u32, DCTRL_SPEC, u8, u8, Unsafe, 4, 4>
Bits 4:7 - Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)
sourcepub fn rwstart(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 8>
pub fn rwstart(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 8>
Bit 8 - Read wait start. If this bit is set, read wait operation starts.
sourcepub fn rwstop(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 9>
pub fn rwstop(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 9>
Bit 9 - Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.
sourcepub fn rwmod(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 10>
pub fn rwmod(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 10>
Bit 10 - Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
sourcepub fn sdioen(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 11>
pub fn sdioen(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 11>
Bit 11 - SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.
sourcepub fn bootacken(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 12>
pub fn bootacken(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 12>
Bit 12 - Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
sourcepub fn fiforst(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 13>
pub fn fiforst(&mut self) -> BitWriterRaw<'_, u32, DCTRL_SPEC, bool, BitM, 13>
Bit 13 - FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.
Methods from Deref<Target = W<DCTRL_SPEC>>§
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.