Struct stm32_hal2::pac::exti::cpuemr2::R

pub struct R(_);

Register CPUEMR2 reader

Implementations

impl R

pub fn mr32(&self) -> BitReaderRaw<MR32_A>

Bit 0 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr33(&self) -> BitReaderRaw<MR32_A>

Bit 1 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr34(&self) -> BitReaderRaw<MR32_A>

Bit 2 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr35(&self) -> BitReaderRaw<MR32_A>

Bit 3 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr36(&self) -> BitReaderRaw<MR32_A>

Bit 4 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr37(&self) -> BitReaderRaw<MR32_A>

Bit 5 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr38(&self) -> BitReaderRaw<MR32_A>

Bit 6 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr39(&self) -> BitReaderRaw<MR32_A>

Bit 7 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr40(&self) -> BitReaderRaw<MR32_A>

Bit 8 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr41(&self) -> BitReaderRaw<MR32_A>

Bit 9 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr42(&self) -> BitReaderRaw<MR32_A>

Bit 10 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr43(&self) -> BitReaderRaw<MR32_A>

Bit 11 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr44(&self) -> BitReaderRaw<MR32_A>

Bit 12 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr46(&self) -> BitReaderRaw<MR32_A>

Bit 14 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr47(&self) -> BitReaderRaw<MR32_A>

Bit 15 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr48(&self) -> BitReaderRaw<MR32_A>

Bit 16 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr49(&self) -> BitReaderRaw<MR32_A>

Bit 17 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr50(&self) -> BitReaderRaw<MR32_A>

Bit 18 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr51(&self) -> BitReaderRaw<MR32_A>

Bit 19 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr52(&self) -> BitReaderRaw<MR32_A>

Bit 20 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr53(&self) -> BitReaderRaw<MR32_A>

Bit 21 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr54(&self) -> BitReaderRaw<MR32_A>

Bit 22 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr55(&self) -> BitReaderRaw<MR32_A>

Bit 23 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr56(&self) -> BitReaderRaw<MR32_A>

Bit 24 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr57(&self) -> BitReaderRaw<MR32_A>

Bit 25 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr58(&self) -> BitReaderRaw<MR32_A>

Bit 26 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr59(&self) -> BitReaderRaw<MR32_A>

Bit 27 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr60(&self) -> BitReaderRaw<MR32_A>

Bit 28 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr61(&self) -> BitReaderRaw<MR32_A>

Bit 29 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr62(&self) -> BitReaderRaw<MR32_A>

Bit 30 - CPU Interrupt Mask on Direct Event input x+32

pub fn mr63(&self) -> BitReaderRaw<MR32_A>

Bit 31 - CPU Interrupt Mask on Direct Event input x+32

Methods from Deref<Target = R<CPUEMR2_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CPUEMR2_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CPUEMR2_SPEC>> for R

fn from(reader: R<CPUEMR2_SPEC>) -> R

Converts to this type from the input type.