Struct stm32_hal2::clocks::PllCfg
source · pub struct PllCfg {
pub enabled: bool,
pub pllp_en: bool,
pub pllq_en: bool,
pub pllr_en: bool,
pub divm: u8,
pub divn: u16,
pub divp: u8,
pub divq: u8,
pub divr: u8,
}
Expand description
Configures the speeds, and enable status of an individual PLL. Note that the enable
field has no effect for PLL1.
Fields§
§enabled: bool
§pllp_en: bool
§pllq_en: bool
§pllr_en: bool
§divm: u8
§divn: u16
§divp: u8
§divq: u8
§divr: u8