Enum stm32_hal2::timer::InputSlaveMode
source · [−]#[repr(u8)]
pub enum InputSlaveMode {
Disabled,
Encoder1,
Encoder2,
Encoder3,
Reset,
Gated,
Trigger,
ExternalClock1,
CombinedResetTrigger,
}
Expand description
When external signals are selected the active edge of the trigger signal (TRGI) is linked to the polarity selected on the external input (see Input Control register and Control Register description. Sets SMCR register, SMS field.
Variants
Disabled
Slave mode disabled - if CEN = ‘1 then the prescaler is clocked directly by the internal clock
Encoder1
Encoder mode 1 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level
Encoder2
Encoder mode 2 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level.
Encoder3
Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input.
Reset
Reset mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers.
Gated
Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled.
Trigger
Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled.
ExternalClock1
External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
CombinedResetTrigger
Combined reset + trigger mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter, generates an update of the registers and starts the counter.
Trait Implementations
sourceimpl Clone for InputSlaveMode
impl Clone for InputSlaveMode
sourcefn clone(&self) -> InputSlaveMode
fn clone(&self) -> InputSlaveMode
1.0.0 · sourcefn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
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