Struct stm32_hal2::pac::syscfg::cfgr::W

pub struct W(_);

Register CFGR writer

Implementations

impl W

pub fn pvdl(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 2>

Bit 2 - Programmable voltage detector lockup bit

pub fn flashl(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 3>

Bit 3 - FLASH double error lockup bit

pub fn cm7l(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 6>

Bit 6 - CPU lockup bit

pub fn bkraml(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 7>

Bit 7 - Backup RAM Double error lockup bit

pub fn sram4l(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 9>

Bit 9 - SRAM4 Double error lockup bit

pub fn sram2l(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 11>

Bit 11 - SRAM2 Double error lockup bit

pub fn sram1l(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 12>

Bit 12 - SRAM1 Double error lockup bit

pub fn dtcml(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 13>

Bit 13 - DTCM-RAM Double error lockup bit

pub fn itcml(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 14>

Bit 14 - ITCM-RAM Double error lockup bit

pub fn axiraml(&mut self) -> BitWriterRaw<'_, u32, CFGR_SPEC, bool, BitM, 15>

Bit 15 - AXISRAM Double error lockup bit

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CFGR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CFGR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CFGR_SPEC>> for W

fn from(writer: W<CFGR_SPEC>) -> W

Converts to this type from the input type.