pub struct R(_);Expand description
Register STAR reader
Implementations
sourceimpl R
impl R
sourcepub fn ccrcfail(&self) -> BitReaderRaw<bool>
pub fn ccrcfail(&self) -> BitReaderRaw<bool>
Bit 0 - Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dcrcfail(&self) -> BitReaderRaw<bool>
pub fn dcrcfail(&self) -> BitReaderRaw<bool>
Bit 1 - Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn ctimeout(&self) -> BitReaderRaw<bool>
pub fn ctimeout(&self) -> BitReaderRaw<bool>
Bit 2 - Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods.
sourcepub fn dtimeout(&self) -> BitReaderRaw<bool>
pub fn dtimeout(&self) -> BitReaderRaw<bool>
Bit 3 - Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn txunderr(&self) -> BitReaderRaw<bool>
pub fn txunderr(&self) -> BitReaderRaw<bool>
Bit 4 - Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn rxoverr(&self) -> BitReaderRaw<bool>
pub fn rxoverr(&self) -> BitReaderRaw<bool>
Bit 5 - Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn cmdrend(&self) -> BitReaderRaw<bool>
pub fn cmdrend(&self) -> BitReaderRaw<bool>
Bit 6 - Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn cmdsent(&self) -> BitReaderRaw<bool>
pub fn cmdsent(&self) -> BitReaderRaw<bool>
Bit 7 - Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dataend(&self) -> BitReaderRaw<bool>
pub fn dataend(&self) -> BitReaderRaw<bool>
Bit 8 - Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dhold(&self) -> BitReaderRaw<bool>
pub fn dhold(&self) -> BitReaderRaw<bool>
Bit 9 - Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dbckend(&self) -> BitReaderRaw<bool>
pub fn dbckend(&self) -> BitReaderRaw<bool>
Bit 10 - Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dabort(&self) -> BitReaderRaw<bool>
pub fn dabort(&self) -> BitReaderRaw<bool>
Bit 11 - Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn dpsmact(&self) -> BitReaderRaw<bool>
pub fn dpsmact(&self) -> BitReaderRaw<bool>
Bit 12 - Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.
sourcepub fn cpsmact(&self) -> BitReaderRaw<bool>
pub fn cpsmact(&self) -> BitReaderRaw<bool>
Bit 13 - Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.
sourcepub fn txfifohe(&self) -> BitReaderRaw<bool>
pub fn txfifohe(&self) -> BitReaderRaw<bool>
Bit 14 - Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full.
sourcepub fn rxfifohf(&self) -> BitReaderRaw<bool>
pub fn rxfifohf(&self) -> BitReaderRaw<bool>
Bit 15 - Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty.
sourcepub fn txfifof(&self) -> BitReaderRaw<bool>
pub fn txfifof(&self) -> BitReaderRaw<bool>
Bit 16 - Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty.
sourcepub fn rxfifof(&self) -> BitReaderRaw<bool>
pub fn rxfifof(&self) -> BitReaderRaw<bool>
Bit 17 - Receive FIFO full This bit is cleared when one FIFO location becomes empty.
sourcepub fn txfifoe(&self) -> BitReaderRaw<bool>
pub fn txfifoe(&self) -> BitReaderRaw<bool>
Bit 18 - Transmit FIFO empty This bit is cleared when one FIFO location becomes full.
sourcepub fn rxfifoe(&self) -> BitReaderRaw<bool>
pub fn rxfifoe(&self) -> BitReaderRaw<bool>
Bit 19 - Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full.
sourcepub fn busyd0(&self) -> BitReaderRaw<bool>
pub fn busyd0(&self) -> BitReaderRaw<bool>
Bit 20 - Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt.
sourcepub fn busyd0end(&self) -> BitReaderRaw<bool>
pub fn busyd0end(&self) -> BitReaderRaw<bool>
Bit 21 - end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn sdioit(&self) -> BitReaderRaw<bool>
pub fn sdioit(&self) -> BitReaderRaw<bool>
Bit 22 - SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn ackfail(&self) -> BitReaderRaw<bool>
pub fn ackfail(&self) -> BitReaderRaw<bool>
Bit 23 - Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn acktimeout(&self) -> BitReaderRaw<bool>
pub fn acktimeout(&self) -> BitReaderRaw<bool>
Bit 24 - Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn vswend(&self) -> BitReaderRaw<bool>
pub fn vswend(&self) -> BitReaderRaw<bool>
Bit 25 - Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
sourcepub fn ckstop(&self) -> BitReaderRaw<bool>
pub fn ckstop(&self) -> BitReaderRaw<bool>
Bit 26 - SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.
Methods from Deref<Target = R<STAR_SPEC>>
sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.