pub struct W(_);Expand description
Register POWER writer
Implementations
sourceimpl W
impl W
sourcepub fn pwrctrl(
&mut self
) -> FieldWriterRaw<'_, u32, POWER_SPEC, u8, u8, Unsafe, 2, 0>
pub fn pwrctrl(
&mut self
) -> FieldWriterRaw<'_, u32, POWER_SPEC, u8, u8, Unsafe, 2, 0>
Bits 0:1 - SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11.
sourcepub fn vswitch(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 2>
pub fn vswitch(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 2>
Bit 2 - Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:
sourcepub fn vswitchen(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 3>
pub fn vswitchen(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 3>
Bit 3 - Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:
sourcepub fn dirpol(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 4>
pub fn dirpol(&mut self) -> BitWriterRaw<'_, u32, POWER_SPEC, bool, BitM, 4>
Bit 4 - Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00).
Methods from Deref<Target = W<POWER_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.