Struct stm32_hal2::pac::rtc::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 18 fields
pub tr: Reg<TR_SPEC>,
pub dr: Reg<DR_SPEC>,
pub cr: Reg<CR_SPEC>,
pub isr: Reg<ISR_SPEC>,
pub prer: Reg<PRER_SPEC>,
pub wutr: Reg<WUTR_SPEC>,
pub alrmr: [Reg<ALRMR_SPEC>; 2],
pub wpr: Reg<WPR_SPEC>,
pub ssr: Reg<SSR_SPEC>,
pub shiftr: Reg<SHIFTR_SPEC>,
pub tstr: Reg<TSTR_SPEC>,
pub tsdr: Reg<TSDR_SPEC>,
pub tsssr: Reg<TSSSR_SPEC>,
pub calr: Reg<CALR_SPEC>,
pub tampcr: Reg<TAMPCR_SPEC>,
pub alrmssr: [Reg<ALRMSSR_SPEC>; 2],
pub or: Reg<OR_SPEC>,
pub bkpr: [Reg<BKPR_SPEC>; 32],
/* private fields */
}
Expand description
Register block
Fields
tr: Reg<TR_SPEC>
0x00 - The RTC_TR is the calendar time shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
dr: Reg<DR_SPEC>
0x04 - The RTC_DR is the calendar date shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
cr: Reg<CR_SPEC>
0x08 - RTC control register
isr: Reg<ISR_SPEC>
0x0c - This register is write protected (except for RTC_ISR[13:8] bits). The write access procedure is described in RTC register write protection on page9.
prer: Reg<PRER_SPEC>
0x10 - This register must be written in initialization mode only. The initialization must be performed in two separate write accesses. Refer to Calendar initialization and configuration on page9.This register is write protected. The write access procedure is described in RTC register write protection on page9.
wutr: Reg<WUTR_SPEC>
0x14 - This register can be written only when WUTWF is set to 1 in RTC_ISR.This register is write protected. The write access procedure is described in RTC register write protection on page9.
alrmr: [Reg<ALRMR_SPEC>; 2]
0x1c..0x24 - This register can be written only when ALRAWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
wpr: Reg<WPR_SPEC>
0x24 - RTC write protection register
ssr: Reg<SSR_SPEC>
0x28 - RTC sub second register
shiftr: Reg<SHIFTR_SPEC>
0x2c - This register is write protected. The write access procedure is described in RTC register write protection on page9.
tstr: Reg<TSTR_SPEC>
0x30 - The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
tsdr: Reg<TSDR_SPEC>
0x34 - The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
tsssr: Reg<TSSSR_SPEC>
0x38 - The content of this register is valid only when RTC_ISR/TSF is set. It is cleared when the RTC_ISR/TSF bit is reset.
calr: Reg<CALR_SPEC>
0x3c - This register is write protected. The write access procedure is described in RTC register write protection on page9.
tampcr: Reg<TAMPCR_SPEC>
0x40 - RTC tamper and alternate function configuration register
alrmssr: [Reg<ALRMSSR_SPEC>; 2]
0x44..0x4c - This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9
or: Reg<OR_SPEC>
0x4c - RTC option register
bkpr: [Reg<BKPR_SPEC>; 32]
0x50..0xd0 - RTC backup registers
Implementations
sourceimpl RegisterBlock
impl RegisterBlock
sourcepub fn alrmar(&self) -> &Reg<ALRMR_SPEC>
pub fn alrmar(&self) -> &Reg<ALRMR_SPEC>
0x1c - This register can be written only when ALRAWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
sourcepub fn alrmbr(&self) -> &Reg<ALRMR_SPEC>
pub fn alrmbr(&self) -> &Reg<ALRMR_SPEC>
0x20 - This register can be written only when ALRAWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
sourcepub fn alrmassr(&self) -> &Reg<ALRMSSR_SPEC>
pub fn alrmassr(&self) -> &Reg<ALRMSSR_SPEC>
0x44 - This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9
sourcepub fn alrmbssr(&self) -> &Reg<ALRMSSR_SPEC>
pub fn alrmbssr(&self) -> &Reg<ALRMSSR_SPEC>
0x48 - This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9