pub struct W(_);
Expand description
Register SHIFTR
writer
Implementations
sourceimpl W
impl W
sourcepub fn subfs(
&mut self
) -> FieldWriterRaw<'_, u32, SHIFTR_SPEC, u16, u16, Safe, 15, 0>
pub fn subfs(
&mut self
) -> FieldWriterRaw<'_, u32, SHIFTR_SPEC, u16, u16, Safe, 15, 0>
Bits 0:14 - Subtract a fraction of a second These bits are write only and is always read as zero. Writing to this bit has no effect when a shift operation is pending (when SHPF=1, in RTC_ISR). The value which is written to SUBFS is added to the synchronous prescaler counter. Since this counter counts down, this operation effectively subtracts from (delays) the clock by: Delay (seconds) = SUBFS / (PREDIV_S + 1) A fraction of a second can effectively be added to the clock (advancing the clock) when the ADD1S function is used in conjunction with SUBFS, effectively advancing the clock by: Advance (seconds) = (1 - (SUBFS / (PREDIV_S + 1))). Note: Writing to SUBFS causes RSF to be cleared. Software can then wait until RSF=1 to be sure that the shadow registers have been updated with the shifted time.
sourcepub fn add1s(
&mut self
) -> BitWriterRaw<'_, u32, SHIFTR_SPEC, ADD1S_AW, BitM, 31>
pub fn add1s(
&mut self
) -> BitWriterRaw<'_, u32, SHIFTR_SPEC, ADD1S_AW, BitM, 31>
Bit 31 - Add one second This bit is write only and is always read as zero. Writing to this bit has no effect when a shift operation is pending (when SHPF=1, in RTC_ISR). This function is intended to be used with SUBFS (see description below) in order to effectively add a fraction of a second to the clock in an atomic operation.
Methods from Deref<Target = W<SHIFTR_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.