Struct stm32_hal2::pac::rcc::apb1llpenr::W
source · [−]pub struct W(_);
Expand description
Register APB1LLPENR
writer
Implementations
sourceimpl W
impl W
sourcepub fn tim2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 0>
pub fn tim2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 0>
Bit 0 - TIM2 peripheral clock enable during CSleep mode
sourcepub fn tim3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 1>
pub fn tim3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 1>
Bit 1 - TIM3 peripheral clock enable during CSleep mode
sourcepub fn tim4lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 2>
pub fn tim4lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 2>
Bit 2 - TIM4 peripheral clock enable during CSleep mode
sourcepub fn tim5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 3>
pub fn tim5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 3>
Bit 3 - TIM5 peripheral clock enable during CSleep mode
sourcepub fn tim6lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 4>
pub fn tim6lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 4>
Bit 4 - TIM6 peripheral clock enable during CSleep mode
sourcepub fn tim7lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 5>
pub fn tim7lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 5>
Bit 5 - TIM7 peripheral clock enable during CSleep mode
sourcepub fn tim12lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 6>
pub fn tim12lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 6>
Bit 6 - TIM12 peripheral clock enable during CSleep mode
sourcepub fn tim13lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 7>
pub fn tim13lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 7>
Bit 7 - TIM13 peripheral clock enable during CSleep mode
sourcepub fn tim14lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 8>
pub fn tim14lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 8>
Bit 8 - TIM14 peripheral clock enable during CSleep mode
sourcepub fn lptim1lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 9>
pub fn lptim1lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 9>
Bit 9 - LPTIM1 Peripheral Clocks Enable During CSleep Mode
sourcepub fn spi2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 14>
pub fn spi2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 14>
Bit 14 - SPI2 Peripheral Clocks Enable During CSleep Mode
sourcepub fn spi3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 15>
pub fn spi3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 15>
Bit 15 - SPI3 Peripheral Clocks Enable During CSleep Mode
sourcepub fn spdifrxlpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 16>
pub fn spdifrxlpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 16>
Bit 16 - SPDIFRX Peripheral Clocks Enable During CSleep Mode
sourcepub fn usart2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 17>
pub fn usart2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 17>
Bit 17 - USART2 Peripheral Clocks Enable During CSleep Mode
sourcepub fn usart3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 18>
pub fn usart3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 18>
Bit 18 - USART3 Peripheral Clocks Enable During CSleep Mode
sourcepub fn uart4lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 19>
pub fn uart4lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 19>
Bit 19 - UART4 Peripheral Clocks Enable During CSleep Mode
sourcepub fn uart5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 20>
pub fn uart5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 20>
Bit 20 - UART5 Peripheral Clocks Enable During CSleep Mode
sourcepub fn i2c1lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 21>
pub fn i2c1lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 21>
Bit 21 - I2C1 Peripheral Clocks Enable During CSleep Mode
sourcepub fn i2c2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 22>
pub fn i2c2lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 22>
Bit 22 - I2C2 Peripheral Clocks Enable During CSleep Mode
sourcepub fn i2c3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 23>
pub fn i2c3lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 23>
Bit 23 - I2C3 Peripheral Clocks Enable During CSleep Mode
sourcepub fn ceclpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 27>
pub fn ceclpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 27>
Bit 27 - HDMI-CEC Peripheral Clocks Enable During CSleep Mode
sourcepub fn dac12lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 29>
pub fn dac12lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 29>
Bit 29 - DAC1/2 peripheral clock enable during CSleep mode
sourcepub fn uart7lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 30>
pub fn uart7lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 30>
Bit 30 - UART7 Peripheral Clocks Enable During CSleep Mode
sourcepub fn uart8lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 31>
pub fn uart8lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 31>
Bit 31 - UART8 Peripheral Clocks Enable During CSleep Mode
sourcepub fn i2c5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 25>
pub fn i2c5lpen(
&mut self
) -> BitWriterRaw<'_, u32, APB1LLPENR_SPEC, TIM2LPEN_A, BitM, 25>
Bit 25 - I2C5 block enable during CSleep Mode
Methods from Deref<Target = W<APB1LLPENR_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.