Struct stm32_hal2::pac::mdma::ch::isr::R

pub struct R(_);

Register ISR reader

Implementations

impl R

pub fn teif(&self) -> BitReaderRaw<bool>

Bit 0 - Channel x transfer error interrupt flag This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the DMA_IFCRy register.

pub fn ctcif(&self) -> BitReaderRaw<bool>

Bit 1 - Channel x Channel Transfer Complete interrupt flag This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the DMA_IFCRy register. CTC is set when the last block was transferred and the channel has been automatically disabled. CTC is also set when the channel is suspended, as a result of writing EN bit to 0.

pub fn brtif(&self) -> BitReaderRaw<bool>

Bit 2 - Channel x block repeat transfer complete interrupt flag This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the DMA_IFCRy register.

pub fn btif(&self) -> BitReaderRaw<bool>

Bit 3 - Channel x block transfer complete interrupt flag This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the DMA_IFCRy register.

pub fn tcif(&self) -> BitReaderRaw<bool>

Bit 4 - channel x buffer transfer complete

pub fn crqa(&self) -> BitReaderRaw<bool>

Bit 16 - channel x request active flag

Methods from Deref<Target = R<ISR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<ISR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<ISR_SPEC>> for R

fn from(reader: R<ISR_SPEC>) -> R

Converts to this type from the input type.