pub struct W(_);
Expand description

Register CR writer

Implementations

Bit 0 - channel enable

Bit 1 - Transfer error interrupt enable This bit is set and cleared by software.

Bit 2 - Channel Transfer Complete interrupt enable This bit is set and cleared by software.

Bit 3 - Block Repeat transfer interrupt enable This bit is set and cleared by software.

Bit 4 - Block Transfer interrupt enable This bit is set and cleared by software.

Bit 5 - buffer Transfer Complete interrupt enable This bit is set and cleared by software.

Bits 6:7 - Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0.

Bit 12 - byte Endianness exchange

Bit 13 - Half word Endianes exchange

Bit 14 - Word Endianness exchange

Bit 16 - SW ReQuest Writing a 1 into this bit sets the CRQAx in MDMA_ISRy register, activating the request on Channel x Note: Either the whole CxCR register or the 8-bit/16-bit register @ Address offset: 0x4E + 0x40 chn may be used for SWRQ activation. In case of a SW request, acknowledge is not generated (neither HW signal, nor CxMAR write access).

Writes raw bits to the register.

Methods from Deref<Target = W<CR_SPEC>>

Writes raw bits to the register.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Mutably dereferences the value.
Converts to this type from the input type.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.