pub struct R(_);
Expand description

Register C1MISR reader

Implementations

Bit 0 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 1 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 2 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 3 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 4 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 5 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 6 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 7 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 8 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 9 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 10 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 11 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 12 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 13 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 14 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 15 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 16 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 17 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 18 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 19 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 20 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 21 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 22 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 23 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 24 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 25 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 26 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 27 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 28 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 29 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 30 - masked interrupt(N) semaphore n status bit after enable (mask)

Bit 31 - masked interrupt(N) semaphore n status bit after enable (mask)

Methods from Deref<Target = R<C1MISR_SPEC>>

Reads raw bits from register.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Converts to this type from the input type.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.