Struct stm32_hal2::pac::exti::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 26 fields
pub rtsr1: Reg<RTSR1_SPEC>,
pub ftsr1: Reg<FTSR1_SPEC>,
pub swier1: Reg<SWIER1_SPEC>,
pub d3pmr1: Reg<D3PMR1_SPEC>,
pub d3pcr1l: Reg<D3PCR1L_SPEC>,
pub d3pcr1h: Reg<D3PCR1H_SPEC>,
pub rtsr2: Reg<RTSR2_SPEC>,
pub ftsr2: Reg<FTSR2_SPEC>,
pub swier2: Reg<SWIER2_SPEC>,
pub d3pmr2: Reg<D3PMR2_SPEC>,
pub d3pcr2l: Reg<D3PCR2L_SPEC>,
pub d3pcr2h: Reg<D3PCR2H_SPEC>,
pub rtsr3: Reg<RTSR3_SPEC>,
pub ftsr3: Reg<FTSR3_SPEC>,
pub swier3: Reg<SWIER3_SPEC>,
pub d3pmr3: Reg<D3PMR3_SPEC>,
pub d3pcr3h: Reg<D3PCR3H_SPEC>,
pub cpuimr1: Reg<CPUIMR1_SPEC>,
pub cpuemr1: Reg<CPUEMR1_SPEC>,
pub cpupr1: Reg<CPUPR1_SPEC>,
pub cpuimr2: Reg<CPUIMR2_SPEC>,
pub cpuemr2: Reg<CPUEMR2_SPEC>,
pub cpupr2: Reg<CPUPR2_SPEC>,
pub cpuimr3: Reg<CPUIMR3_SPEC>,
pub cpuemr3: Reg<CPUEMR3_SPEC>,
pub cpupr3: Reg<CPUPR3_SPEC>,
/* private fields */
}
Expand description
Register block
Fields
rtsr1: Reg<RTSR1_SPEC>
0x00 - EXTI rising trigger selection register
ftsr1: Reg<FTSR1_SPEC>
0x04 - EXTI falling trigger selection register
swier1: Reg<SWIER1_SPEC>
0x08 - EXTI software interrupt event register
d3pmr1: Reg<D3PMR1_SPEC>
0x0c - EXTI D3 pending mask register
d3pcr1l: Reg<D3PCR1L_SPEC>
0x10 - EXTI D3 pending clear selection register low
d3pcr1h: Reg<D3PCR1H_SPEC>
0x14 - EXTI D3 pending clear selection register high
rtsr2: Reg<RTSR2_SPEC>
0x20 - EXTI rising trigger selection register
ftsr2: Reg<FTSR2_SPEC>
0x24 - EXTI falling trigger selection register
swier2: Reg<SWIER2_SPEC>
0x28 - EXTI software interrupt event register
d3pmr2: Reg<D3PMR2_SPEC>
0x2c - EXTI D3 pending mask register
d3pcr2l: Reg<D3PCR2L_SPEC>
0x30 - EXTI D3 pending clear selection register low
d3pcr2h: Reg<D3PCR2H_SPEC>
0x34 - EXTI D3 pending clear selection register high
rtsr3: Reg<RTSR3_SPEC>
0x40 - EXTI rising trigger selection register
ftsr3: Reg<FTSR3_SPEC>
0x44 - EXTI falling trigger selection register
swier3: Reg<SWIER3_SPEC>
0x48 - EXTI software interrupt event register
d3pmr3: Reg<D3PMR3_SPEC>
0x4c - EXTI D3 pending mask register
d3pcr3h: Reg<D3PCR3H_SPEC>
0x54 - EXTI D3 pending clear selection register high
cpuimr1: Reg<CPUIMR1_SPEC>
0x80 - EXTI interrupt mask register
cpuemr1: Reg<CPUEMR1_SPEC>
0x84 - EXTI event mask register
cpupr1: Reg<CPUPR1_SPEC>
0x88 - EXTI pending register
cpuimr2: Reg<CPUIMR2_SPEC>
0x90 - EXTI interrupt mask register
cpuemr2: Reg<CPUEMR2_SPEC>
0x94 - EXTI event mask register
cpupr2: Reg<CPUPR2_SPEC>
0x98 - EXTI pending register
cpuimr3: Reg<CPUIMR3_SPEC>
0xa0 - EXTI interrupt mask register
cpuemr3: Reg<CPUEMR3_SPEC>
0xa4 - EXTI event mask register
cpupr3: Reg<CPUPR3_SPEC>
0xa8 - EXTI pending register