pub struct W(_);
Expand description
Register CPUIMR1
writer
Implementations
sourceimpl W
impl W
sourcepub fn mr0(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 0>
pub fn mr0(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 0>
Bit 0 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr1(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 1>
pub fn mr1(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 1>
Bit 1 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr2(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 2>
pub fn mr2(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 2>
Bit 2 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr3(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 3>
pub fn mr3(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 3>
Bit 3 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr4(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 4>
pub fn mr4(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 4>
Bit 4 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr5(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 5>
pub fn mr5(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 5>
Bit 5 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr6(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 6>
pub fn mr6(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 6>
Bit 6 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr7(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 7>
pub fn mr7(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 7>
Bit 7 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr8(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 8>
pub fn mr8(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 8>
Bit 8 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr9(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 9>
pub fn mr9(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 9>
Bit 9 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr10(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 10>
pub fn mr10(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 10>
Bit 10 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr11(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 11>
pub fn mr11(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 11>
Bit 11 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr12(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 12>
pub fn mr12(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 12>
Bit 12 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr13(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 13>
pub fn mr13(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 13>
Bit 13 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr14(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 14>
pub fn mr14(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 14>
Bit 14 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr15(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 15>
pub fn mr15(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 15>
Bit 15 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr16(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 16>
pub fn mr16(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 16>
Bit 16 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr17(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 17>
pub fn mr17(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 17>
Bit 17 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr18(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 18>
pub fn mr18(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 18>
Bit 18 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr19(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 19>
pub fn mr19(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 19>
Bit 19 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr20(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 20>
pub fn mr20(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 20>
Bit 20 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr21(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 21>
pub fn mr21(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 21>
Bit 21 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr22(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 22>
pub fn mr22(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 22>
Bit 22 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr23(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 23>
pub fn mr23(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 23>
Bit 23 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr24(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 24>
pub fn mr24(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 24>
Bit 24 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr25(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 25>
pub fn mr25(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 25>
Bit 25 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr26(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 26>
pub fn mr26(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 26>
Bit 26 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr27(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 27>
pub fn mr27(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 27>
Bit 27 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr28(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 28>
pub fn mr28(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 28>
Bit 28 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr29(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 29>
pub fn mr29(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 29>
Bit 29 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr30(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 30>
pub fn mr30(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 30>
Bit 30 - Rising trigger event configuration bit of Configurable Event input
sourcepub fn mr31(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 31>
pub fn mr31(&mut self) -> BitWriterRaw<'_, u32, CPUIMR1_SPEC, MR0_A, BitM, 31>
Bit 31 - Rising trigger event configuration bit of Configurable Event input
Methods from Deref<Target = W<CPUIMR1_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.