Struct stm32_hal2::dfsdm::DfsdmConfig

pub struct DfsdmConfig {
    pub clock_src: DfsdmClockSrc,
    pub sampling_freq: u32,
    pub continuous: Continuous,
    pub filter_order: FilterOrder,
    pub filter_oversampling_ratio: u16,
    pub integrator_oversampling_ratio: u8,
    pub right_shift_bits: u8,
    pub offset: u32,
    pub spi_clock: SpiClock,
}

Configuration for the DFSDM peripheral. All operations in the DFSDM peripheral are in signed format (filtering, integration, offset correction, right bit shift).

Fields

clock_src: DfsdmClockSrc

Set the clock source to Sysclk, or Audio clock. Audio clock appears to be the SAI clock source, at least on H7. (?) Defaults to Audio clock.

sampling_freq: u32

Sampling frequency. Used to adjust clock divider. Defaults to 48kHz. (48_000_000)

continuous: Continuous

Sample as one-shot, continuous, or continuous fast-mode. Defaults to continuous fast mode.

filter_order: FilterOrder

Sinc filter order. Defaults to Sinc4.

filter_oversampling_ratio: u16

Sinc filter oversampling ratio. Also known as decimation ratio

integrator_oversampling_ratio: u8

Integrator oversampling ratio. Also known as averaging (?) ratio

right_shift_bits: u8

To have the result aligned to a 24-bit value, each channel defines a number of right bit shifts which will be applied on each conversion result (injected or regular) from a given channel. The data bit shift number is stored in DTRBS[4:0] bits in DFSDM_CHyCFGR2 register. The right bit-shift is rounding the result to nearest integer value. The sign of shifted result is maintained, in order to have valid 24-bit signed format of result data.

offset: u32

The offset correction allows to calibrate the external sigma-delta modulator offset error. The user configures the offset register with a signed 24-bit correction, and this register is automatically added to the output result. The offset correction value is usually the result of a calibration routine embedded within the microcontroller software that performs the offset calibration calculation and stores the correction into the offset register. Defaults to 0. This must be a 24 bit signed integer, which Rust doesn’t support. So, to make it negative, you might use something like this: offset:(1<<24) - 1_000;

spi_clock: SpiClock

SPI clock select for channel y. Ie internal or external.

Trait Implementations

impl Default for DfsdmConfig

fn default() -> Self

Returns the “default value” for a type.