Enum stm32_hal2::adc::SampleTime

#[repr(u8)]
pub enum SampleTime {
    T1,
    T2,
    T4,
    T7,
    T19,
    T61,
    T181,
    T601,
}

ADC sampling time. Sets ADC_SMPRx register, SMPy field.

Each channel can be sampled with a different sample time. There is always an overhead of 13 ADC clock cycles. E.g. For Sampletime T_19 the total conversion time (in ADC clock cycles) is 13 + 19 = 32 ADC Clock Cycles [derive(Clone, Copy)]

Variants

T1

1.5 ADC clock cycles (2.5 on G4)

T2

2.5 ADC clock cycles (6.5 on G4)

T4

4.5 ADC clock cycles (12.5 on G4)

T7

7.5 ADC clock cycles (24.5 on G4)

T19

19.5 ADC clock cycles (47.5 on G4)

T61

61.5 ADC clock cycles (92.5 on G4)

T181

181.5 ADC clock cycles (247.5 on G4)

T601

601.5 ADC clock cycles (640.5 on G4)

Trait Implementations

impl Default for SampleTime

fn default() -> Self

T_1 is also the reset value.