Enum stm32_hal2::spi::ReceptionThresh [−][src]
#[repr(u8)]
pub enum ReceptionThresh {
D16,
D8,
}
Expand description
FIFO reception threshold Sets SPI_CR2
register, FRXTH
field.
Variants
D16
RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)
D8
RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)